[PATCH] D157089: [AMDGPU] Fix dealing with register interval endpoints in SIInsertWaitcnts.

[Ivan Kosarev via Phabricator via llvm-commits]

kosarev updated this revision to Diff 547288.
kosarev added a comment.

Update the commit description.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D157089/new/

https://reviews.llvm.org/D157089

Files:
  llvm/lib/Target/AMDGPU/SIInsertWaitcnts.cpp


Index: llvm/lib/Target/AMDGPU/SIInsertWaitcnts.cpp
===================================================================
--- llvm/lib/Target/AMDGPU/SIInsertWaitcnts.cpp
+++ llvm/lib/Target/AMDGPU/SIInsertWaitcnts.cpp
@@ -518,7 +518,7 @@
   unsigned Reg = getRegPoint(Op.getReg(), *ST);
 
   if (TRI->isVectorRegister(*MRI, Op.getReg())) {
-    assert(Reg >= Intervals.VGPR.Start && Reg <= Intervals.VGPR.End);
+    assert(Reg >= Intervals.VGPR.Start && Reg < Intervals.VGPR.End);
     Result.Start = Reg - Intervals.VGPR.Start;
     if (TRI->isAGPR(*MRI, Op.getReg()))
       Result.Start += AGPR_OFFSET;
@@ -1839,9 +1839,9 @@
 
   RegPoolIntervals Intervals = {};
   Intervals.VGPR.Start = getRegPoint(AMDGPU::VGPR0, *ST);
-  Intervals.VGPR.End = Intervals.VGPR.Start + NumVGPRsMax - 1;
+  Intervals.VGPR.End = Intervals.VGPR.Start + NumVGPRsMax;
   Intervals.SGPR.Start = getRegPoint(AMDGPU::SGPR0, *ST);
-  Intervals.SGPR.End = Intervals.SGPR.Start + NumSGPRsMax - 1;
+  Intervals.SGPR.End = Intervals.SGPR.Start + NumSGPRsMax;
 
   TrackedWaitcntSet.clear();
   BlockInfos.clear();


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