[PATCH] D156669: AMDGPU: Handle llvm.stacksave and llvm.stackrestore

[Pierre van Houtryve via Phabricator via llvm-commits]

Pierre-vh added inline comments.


================
Comment at: llvm/docs/ReleaseNotes.rst:77
 
+* Implemented `llvm.stacksave` and `llvm.stackrestore` intrinsics.
+
----------------
Should this mention it's only for `p5`?


================
Comment at: llvm/lib/Target/AMDGPU/AMDGPUISelDAGToDAG.cpp:2582
+    CurDAG->getTargetConstant(Subtarget->getWavefrontSizeLog2(), SDLoc(N), MVT::i32);
+  CurDAG->SelectNodeTo(N, AMDGPU::S_LSHR_B32, N->getVTList(),
+                       {N->getOperand(0), Log2WaveSize});
----------------
So this does: 
```
swizzled SP = unswizzled SP / wavefront size
```
But the docs say it does the opposite? (converts a swizzled address to unswizzled?)

My understanding of swizzling is pretty shallow, a bit more docs to help clarify this would be nice


================
Comment at: llvm/lib/Target/AMDGPU/SIISelLowering.cpp:3537
+  // stackrestore.
+  SDValue VectorAddress =
+      DAG.getNode(AMDGPUISD::WAVE_ADDRESS, SL, MVT::i32, CopyFromSP);
----------------
How does changing the SP address to the swizzled SP help with edge cases?
Also why do we need a new opcode for this?


CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D156669/new/

https://reviews.llvm.org/D156669