[PATCH] D157077: [RISCV] Teach VSETVLIInserter to not demand tail policy when there is no tail element
Luke Lau via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Fri Aug 4 02:31:47 PDT 2023
luke added inline comments.
================
Comment at: llvm/lib/Target/RISCV/RISCVInsertVSETVLI.cpp:352
+ if (VLMul < RISCVII::LMUL_RESERVED) {
+ const MachineOperand &VLOp = MI.getOperand(getVLOpNum(MI));
+ if (VLOp.isImm()) {
----------------
The VL operand can be stale here because this is called from doLocalPostpass, after the pseudo has been expanded and the vsetvlis are inserted. Is it possible to move this into needVSETVLI?
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D157077/new/
https://reviews.llvm.org/D157077
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