[PATCH] D156999: [Inline Spiller] Consider bundles when marking defs as dead

[Piotr Sobczak via Phabricator via llvm-commits]

piotr created this revision.
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Fix bug where the code expects just a single MI, but a series of
bundled MIs need to be handled instead.

The semi-formed bundled are created by SplitKit for the case where
not all lanes are live (buildSingleSubRegCopy). Then the remat
kicks in, and since the values that are copied in the bundle do not
need to be preserved due to the remat (dead defs), all instructions
in the bundle should be marked as dead.

However, only the first one gets marked as dead, which causes the
verifier to complain later with error: "Live range continues after
dead def flag".


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D156999

Files:
  llvm/lib/CodeGen/InlineSpiller.cpp
  llvm/test/CodeGen/AMDGPU/dead_bundle.mir


Index: llvm/test/CodeGen/AMDGPU/dead_bundle.mir
===================================================================
--- llvm/test/CodeGen/AMDGPU/dead_bundle.mir
+++ llvm/test/CodeGen/AMDGPU/dead_bundle.mir
@@ -1,7 +1,7 @@
 # NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
-# RUN: llc -mtriple=amdgcn--amdpal -march=amdgcn -mcpu=gfx1100 -verify-machineinstrs=0 -start-before=greedy,0 -stop-after=virtregrewriter,0 -stress-regalloc=5 %s -o - | FileCheck %s
+# RUN: llc -mtriple=amdgcn--amdpal -march=amdgcn -mcpu=gfx1100 -verify-machineinstrs=1 -start-before=greedy,0 -stop-after=virtregrewriter,0 -stress-regalloc=5 %s -o - | FileCheck %s
 
-# This test currently fails with verify-machineinstrs=1 due to dead bundle mishandling: "Live range continues after dead def flag".
+# This test checks that dead bundles are handled correctly.
 ---
 name: psmain
 tracksRegLiveness: true
@@ -20,7 +20,6 @@
     ; CHECK-NEXT: renamable $sgpr1 = KILL undef $sgpr1
     ; CHECK-NEXT: renamable $sgpr4_sgpr5_sgpr6_sgpr7_sgpr8_sgpr9_sgpr10_sgpr11 = S_BUFFER_LOAD_DWORDX8_IMM undef renamable $sgpr0_sgpr1_sgpr2_sgpr3, 416, 0 :: (dereferenceable invariant load (s256), align 4)
     ; CHECK-NEXT: dead [[V_CVT_U32_F32_e64_:%[0-9]+]]:vgpr_32 = V_CVT_U32_F32_e64 0, $sgpr4, 0, 0, implicit $mode, implicit $exec
-    ; CHECK-NEXT: SI_SPILL_S256_SAVE renamable $sgpr4_sgpr5_sgpr6_sgpr7_sgpr8_sgpr9_sgpr10_sgpr11, %stack.0, implicit $exec, implicit $sgpr32 :: (store (s256) into %stack.0, align 4, addrspace 5)
     ; CHECK-NEXT: dead renamable $sgpr4_sgpr5_sgpr6_sgpr7_sgpr8_sgpr9_sgpr10_sgpr11_sgpr12_sgpr13_sgpr14_sgpr15_sgpr16_sgpr17_sgpr18_sgpr19 = IMPLICIT_DEF
     ; CHECK-NEXT: renamable $sgpr4_sgpr5_sgpr6_sgpr7_sgpr8_sgpr9_sgpr10_sgpr11 = S_BUFFER_LOAD_DWORDX8_IMM undef renamable $sgpr0_sgpr1_sgpr2_sgpr3, 416, 0 :: (dereferenceable invariant load (s256), align 4)
     ; CHECK-NEXT: renamable $sgpr3 = COPY killed renamable $sgpr7
Index: llvm/lib/CodeGen/InlineSpiller.cpp
===================================================================
--- llvm/lib/CodeGen/InlineSpiller.cpp
+++ llvm/lib/CodeGen/InlineSpiller.cpp
@@ -745,12 +745,20 @@
     for (VNInfo *VNI : LI.vnis()) {
       if (VNI->isUnused() || VNI->isPHIDef() || UsedValues.count(VNI))
         continue;
+
       MachineInstr *MI = LIS.getInstructionFromIndex(VNI->def);
-      MI->addRegisterDead(Reg, &TRI);
-      if (!MI->allDefsAreDead())
-        continue;
-      LLVM_DEBUG(dbgs() << "All defs dead: " << *MI);
-      DeadDefs.push_back(MI);
+      MachineBasicBlock::instr_iterator It = MI->getIterator(),
+                                        EndIt = MI->getParent()->instr_end();
+      do {
+        if (It->getOperand(0).isReg() && It->getOperand(0).getReg() == Reg) {
+          It->addRegisterDead(Reg, &TRI);
+          if (It->allDefsAreDead()) {
+            LLVM_DEBUG(dbgs() << "All defs dead: " << *It);
+            DeadDefs.push_back(&*It);
+          }
+        }
+        It = std::next(It);
+      } while (It != EndIt && It->isBundledWithPred());
     }
   }
 


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