[PATCH] D154488: [PowerPC] Define SchedModel for Power8

[Qiu Chaofan via Phabricator via llvm-commits]

qiucf added inline comments.


================
Comment at: llvm/lib/Target/PowerPC/PPCScheduleP8.td:267
+  def : InstRW<[P8_LS_LU, P8_DISP_ST], (instrs
+    (instregex "^ST(B|H|W|D)(U)?(X)?(8|TLS)?(_)?(32)?$"),
+    STBCIX, STBCX, STBEPX, STDBRX, STDCIX, STDCX, STHBRX, STHCIX, STHCX, STHEPX,
----------------
shchenz wrote:
> instruction like `STB` seems occupies two pipelines `LSU` and `LU` while seems here it only occupies `LSU` pipiline?
It occupies both:

```
def P8_LS_LU : SchedWriteRes<[P8_LU, P8_LS]>;
```


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https://reviews.llvm.org/D154488