[PATCH] D157224: [Target] Fix typo in comments

[Mehmet Eymen Ünay via Phabricator via llvm-commits]

Eymay created this revision.
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Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D157224

Files:
  llvm/lib/Target/AArch64/GISel/AArch64InstructionSelector.cpp
  llvm/lib/Target/SPIRV/SPIRVBuiltins.cpp
  llvm/lib/Target/X86/X86ISelLowering.cpp


Index: llvm/lib/Target/X86/X86ISelLowering.cpp
===================================================================
--- llvm/lib/Target/X86/X86ISelLowering.cpp
+++ llvm/lib/Target/X86/X86ISelLowering.cpp
@@ -50745,7 +50745,7 @@
       return true;
 
     // See if this is a single use constant which can be constant folded.
-    // NOTE: We don't peek throught bitcasts here because there is currently
+    // NOTE: We don't peek through bitcasts here because there is currently
     // no support for constant folding truncate+bitcast+vector_of_constants. So
     // we'll just send up with a truncate on both operands which will
     // get turned back into (truncate (binop)) causing an infinite loop.
Index: llvm/lib/Target/SPIRV/SPIRVBuiltins.cpp
===================================================================
--- llvm/lib/Target/SPIRV/SPIRVBuiltins.cpp
+++ llvm/lib/Target/SPIRV/SPIRVBuiltins.cpp
@@ -901,7 +901,7 @@
 }
 
 // These queries ask for a single size_t result for a given dimension index, e.g
-// size_t get_global_id(uint dimindex). In SPIR-V, the builtins corresonding to
+// size_t get_global_id(uint dimindex). In SPIR-V, the builtins corresponding to
 // these values are all vec3 types, so we need to extract the correct index or
 // return defaultVal (0 or 1 depending on the query). We also handle extending
 // or tuncating in case size_t does not match the expected result type's
Index: llvm/lib/Target/AArch64/GISel/AArch64InstructionSelector.cpp
===================================================================
--- llvm/lib/Target/AArch64/GISel/AArch64InstructionSelector.cpp
+++ llvm/lib/Target/AArch64/GISel/AArch64InstructionSelector.cpp
@@ -5873,7 +5873,7 @@
     Register SizeUse = I.getOperand(4).getReg();
 
     // MOPSMemorySetTaggingPseudo has two defs; the intrinsic call has only one.
-    // Therefore an additional virtual register is requried for the updated size
+    // Therefore an additional virtual register is required for the updated size
     // operand. This value is not accessible via the semantics of the intrinsic.
     Register SizeDef = MRI.createGenericVirtualRegister(LLT::scalar(64));
 


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