[llvm] c1c86f9 - [X86] LowerEXTRACT_VECTOR_ELT - match i8 extraction with MVT::i8 instead of getSizeInBits()

[Simon Pilgrim via llvm-commits]

Author: Simon Pilgrim
Date: 2023-07-31T11:37:26+01:00
New Revision: c1c86f9eae73786bcdacddaab248817c4f176935

URL: https://github.com/llvm/llvm-project/commit/c1c86f9eae73786bcdacddaab248817c4f176935
DIFF: https://github.com/llvm/llvm-project/commit/c1c86f9eae73786bcdacddaab248817c4f176935.diff

LOG: [X86] LowerEXTRACT_VECTOR_ELT - match i8 extraction with MVT::i8 instead of getSizeInBits()

Noticed on D156350

Added: 
    

Modified: 
    llvm/lib/Target/X86/X86ISelLowering.cpp

Removed: 
    


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diff  --git a/llvm/lib/Target/X86/X86ISelLowering.cpp b/llvm/lib/Target/X86/X86ISelLowering.cpp
index b05e5517ea2163..a38cb5d4bf3120 100644
--- a/llvm/lib/Target/X86/X86ISelLowering.cpp
+++ b/llvm/lib/Target/X86/X86ISelLowering.cpp
@@ -17662,7 +17662,7 @@ X86TargetLowering::LowerEXTRACT_VECTOR_ELT(SDValue Op,
 
   if (!IdxC) {
     // Its more profitable to go through memory (1 cycles throughput)
-    // than using VMOVD + VPERMV/PSHUFB sequence ( 2/3 cycles throughput)
+    // than using VMOVD + VPERMV/PSHUFB sequence (2/3 cycles throughput)
     // IACA tool was used to get performance estimation
     // (https://software.intel.com/en-us/articles/intel-architecture-code-analyzer)
     //
@@ -17742,7 +17742,7 @@ X86TargetLowering::LowerEXTRACT_VECTOR_ELT(SDValue Op,
   // TODO: We only extract a single element from v16i8, we can probably afford
   // to be more aggressive here before using the default approach of spilling to
   // stack.
-  if (VT.getSizeInBits() == 8 && Op->isOnlyUserOf(Vec.getNode())) {
+  if (VT == MVT::i8 && Op->isOnlyUserOf(Vec.getNode())) {
     // Extract either the lowest i32 or any i16, and extract the sub-byte.
     int DWordIdx = IdxVal / 4;
     if (DWordIdx == 0) {