[llvm] 186b2b4 - [PEI] Switch to backwards frame index elimination by default
Jay Foad via llvm-commits
llvm-commits at lists.llvm.org
Thu Aug 3 09:24:05 PDT 2023
Author: Jay Foad
Date: 2023-08-03T17:20:32+01:00
New Revision: 186b2b48e02a6c49795376560ca5ae139d8d9638
URL: https://github.com/llvm/llvm-project/commit/186b2b48e02a6c49795376560ca5ae139d8d9638
DIFF: https://github.com/llvm/llvm-project/commit/186b2b48e02a6c49795376560ca5ae139d8d9638.diff
LOG: [PEI] Switch to backwards frame index elimination by default
Also rename the flag from supportsBackwardScavenger to
eliminateFrameIndicesBackwards to reflect what it actually does.
X86 is the only target still using forwards frame index elimination.
This will not block removing support for forwards register scavenging,
because X86 does not use the register scavenger.
Differential Revision: https://reviews.llvm.org/D156983
Added:
Modified:
llvm/include/llvm/CodeGen/TargetRegisterInfo.h
llvm/lib/CodeGen/PrologEpilogInserter.cpp
llvm/lib/Target/AMDGPU/SIRegisterInfo.h
llvm/lib/Target/ARC/ARCRegisterInfo.h
llvm/lib/Target/ARM/ARMBaseRegisterInfo.h
llvm/lib/Target/Lanai/LanaiRegisterInfo.h
llvm/lib/Target/Mips/MipsRegisterInfo.h
llvm/lib/Target/PowerPC/PPCRegisterInfo.h
llvm/lib/Target/WebAssembly/WebAssemblyRegisterInfo.h
llvm/lib/Target/X86/X86RegisterInfo.h
llvm/lib/Target/XCore/XCoreRegisterInfo.h
Removed:
################################################################################
diff --git a/llvm/include/llvm/CodeGen/TargetRegisterInfo.h b/llvm/include/llvm/CodeGen/TargetRegisterInfo.h
index 62a955f6b7d43e..bf94bb85fc03c9 100644
--- a/llvm/include/llvm/CodeGen/TargetRegisterInfo.h
+++ b/llvm/include/llvm/CodeGen/TargetRegisterInfo.h
@@ -1045,7 +1045,8 @@ class TargetRegisterInfo : public MCRegisterInfo {
/// the RegScavenger passed to eliminateFrameIndex. If this is true targets
/// should scavengeRegisterBackwards in eliminateFrameIndex. New targets
/// should prefer reverse scavenging behavior.
- virtual bool supportsBackwardScavenger() const { return false; }
+ /// TODO: Remove this when all targets return true.
+ virtual bool eliminateFrameIndicesBackwards() const { return true; }
/// This method must be overriden to eliminate abstract frame indices from
/// instructions which may use them. The instruction referenced by the
diff --git a/llvm/lib/CodeGen/PrologEpilogInserter.cpp b/llvm/lib/CodeGen/PrologEpilogInserter.cpp
index d97a0e723d5cee..09ad41aa143c0d 100644
--- a/llvm/lib/CodeGen/PrologEpilogInserter.cpp
+++ b/llvm/lib/CodeGen/PrologEpilogInserter.cpp
@@ -277,7 +277,7 @@ bool PEI::runOnMachineFunction(MachineFunction &MF) {
(RS && !FrameIndexVirtualScavenging) ||
TRI->requiresFrameIndexReplacementScavenging(MF);
- if (TRI->supportsBackwardScavenger())
+ if (TRI->eliminateFrameIndicesBackwards())
replaceFrameIndicesBackward(MF);
else
replaceFrameIndices(MF);
diff --git a/llvm/lib/Target/AMDGPU/SIRegisterInfo.h b/llvm/lib/Target/AMDGPU/SIRegisterInfo.h
index 84edc0712b4c90..57cdcb29fac480 100644
--- a/llvm/lib/Target/AMDGPU/SIRegisterInfo.h
+++ b/llvm/lib/Target/AMDGPU/SIRegisterInfo.h
@@ -158,10 +158,6 @@ class SIRegisterInfo final : public AMDGPUGenRegisterInfo {
MachineBasicBlock &RestoreMBB, Register SGPR,
RegScavenger *RS) const;
- bool supportsBackwardScavenger() const override {
- return true;
- }
-
bool eliminateFrameIndex(MachineBasicBlock::iterator MI, int SPAdj,
unsigned FIOperandNum,
RegScavenger *RS) const override;
diff --git a/llvm/lib/Target/ARC/ARCRegisterInfo.h b/llvm/lib/Target/ARC/ARCRegisterInfo.h
index fce4b698045000..ea82289022eb56 100644
--- a/llvm/lib/Target/ARC/ARCRegisterInfo.h
+++ b/llvm/lib/Target/ARC/ARCRegisterInfo.h
@@ -39,8 +39,6 @@ struct ARCRegisterInfo : public ARCGenRegisterInfo {
bool useFPForScavengingIndex(const MachineFunction &MF) const override;
- bool supportsBackwardScavenger() const override { return true; }
-
bool eliminateFrameIndex(MachineBasicBlock::iterator II, int SPAdj,
unsigned FIOperandNum,
RegScavenger *RS = nullptr) const override;
diff --git a/llvm/lib/Target/ARM/ARMBaseRegisterInfo.h b/llvm/lib/Target/ARM/ARMBaseRegisterInfo.h
index b464c6f61bf64c..926d702b4092a5 100644
--- a/llvm/lib/Target/ARM/ARMBaseRegisterInfo.h
+++ b/llvm/lib/Target/ARM/ARMBaseRegisterInfo.h
@@ -219,8 +219,6 @@ class ARMBaseRegisterInfo : public ARMGenRegisterInfo {
bool requiresFrameIndexScavenging(const MachineFunction &MF) const override;
- bool supportsBackwardScavenger() const override { return true; }
-
bool requiresVirtualBaseRegisters(const MachineFunction &MF) const override;
bool eliminateFrameIndex(MachineBasicBlock::iterator II,
diff --git a/llvm/lib/Target/Lanai/LanaiRegisterInfo.h b/llvm/lib/Target/Lanai/LanaiRegisterInfo.h
index 89d9eba7f891cf..5168dddd93019d 100644
--- a/llvm/lib/Target/Lanai/LanaiRegisterInfo.h
+++ b/llvm/lib/Target/Lanai/LanaiRegisterInfo.h
@@ -34,8 +34,6 @@ struct LanaiRegisterInfo : public LanaiGenRegisterInfo {
bool requiresRegisterScavenging(const MachineFunction &MF) const override;
- bool supportsBackwardScavenger() const override { return true; }
-
bool eliminateFrameIndex(MachineBasicBlock::iterator II, int SPAdj,
unsigned FIOperandNum,
RegScavenger *RS = nullptr) const override;
diff --git a/llvm/lib/Target/Mips/MipsRegisterInfo.h b/llvm/lib/Target/Mips/MipsRegisterInfo.h
index 1463304d35ce91..b002f4cf3ae7a1 100644
--- a/llvm/lib/Target/Mips/MipsRegisterInfo.h
+++ b/llvm/lib/Target/Mips/MipsRegisterInfo.h
@@ -70,8 +70,6 @@ class MipsRegisterInfo : public MipsGenRegisterInfo {
/// Return GPR register class.
virtual const TargetRegisterClass *intRegClass(unsigned Size) const = 0;
- bool supportsBackwardScavenger() const override { return true; }
-
private:
virtual void eliminateFI(MachineBasicBlock::iterator II, unsigned OpNo,
int FrameIndex, uint64_t StackSize,
diff --git a/llvm/lib/Target/PowerPC/PPCRegisterInfo.h b/llvm/lib/Target/PowerPC/PPCRegisterInfo.h
index 72058ea6678e3e..11dbbce42f61c7 100644
--- a/llvm/lib/Target/PowerPC/PPCRegisterInfo.h
+++ b/llvm/lib/Target/PowerPC/PPCRegisterInfo.h
@@ -113,8 +113,6 @@ class PPCRegisterInfo : public PPCGenRegisterInfo {
bool requiresFrameIndexScavenging(const MachineFunction &MF) const override;
- bool supportsBackwardScavenger() const override { return true; }
-
bool requiresVirtualBaseRegisters(const MachineFunction &MF) const override;
void lowerDynamicAlloc(MachineBasicBlock::iterator II) const;
diff --git a/llvm/lib/Target/WebAssembly/WebAssemblyRegisterInfo.h b/llvm/lib/Target/WebAssembly/WebAssemblyRegisterInfo.h
index f2dae5389d53bd..d875e4b93603b1 100644
--- a/llvm/lib/Target/WebAssembly/WebAssemblyRegisterInfo.h
+++ b/llvm/lib/Target/WebAssembly/WebAssemblyRegisterInfo.h
@@ -38,8 +38,6 @@ class WebAssemblyRegisterInfo final : public WebAssemblyGenRegisterInfo {
unsigned FIOperandNum,
RegScavenger *RS = nullptr) const override;
- bool supportsBackwardScavenger() const override { return true; }
-
// Debug information queries.
Register getFrameRegister(const MachineFunction &MF) const override;
diff --git a/llvm/lib/Target/X86/X86RegisterInfo.h b/llvm/lib/Target/X86/X86RegisterInfo.h
index da7b171e4cf6df..0671f79676009e 100644
--- a/llvm/lib/Target/X86/X86RegisterInfo.h
+++ b/llvm/lib/Target/X86/X86RegisterInfo.h
@@ -143,6 +143,12 @@ class X86RegisterInfo final : public X86GenRegisterInfo {
int SPAdj, unsigned FIOperandNum,
RegScavenger *RS = nullptr) const override;
+ /// Process frame indices in forwards block order because
+ /// X86InstrInfo::getSPAdjust relies on it when searching for the
+ /// ADJCALLSTACKUP pseudo following a call.
+ /// TODO: Fix this and return true like all other targets.
+ bool eliminateFrameIndicesBackwards() const override { return false; }
+
/// findDeadCallerSavedReg - Return a caller-saved register that isn't live
/// when it reaches the "return" instruction. We can then pop a stack object
/// to this register without worry about clobbering it.
diff --git a/llvm/lib/Target/XCore/XCoreRegisterInfo.h b/llvm/lib/Target/XCore/XCoreRegisterInfo.h
index 8d420ab712f18c..b72875c29c3435 100644
--- a/llvm/lib/Target/XCore/XCoreRegisterInfo.h
+++ b/llvm/lib/Target/XCore/XCoreRegisterInfo.h
@@ -34,8 +34,6 @@ struct XCoreRegisterInfo : public XCoreGenRegisterInfo {
bool useFPForScavengingIndex(const MachineFunction &MF) const override;
- bool supportsBackwardScavenger() const override { return true; }
-
bool eliminateFrameIndex(MachineBasicBlock::iterator II,
int SPAdj, unsigned FIOperandNum,
RegScavenger *RS = nullptr) const override;
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