[PATCH] D157005: [mlir][ArmSME] Add vector to tile slice op and lowerings

[Cullen Rhodes via Phabricator via llvm-commits]

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This adds a 'vector_to_tile_slice' op to the ArmSME dialect that moves a
1-D scalable vector to a slice of a 2-D tile at a given index.

This is lowered to the 'llvm.aarch64.sme.write.horiz' intrinsic that
maps to the MOVA (vector to tile, single) SME instruction [1] when
lowering to LLVM. Like the SME load and store instructions this operates
on ZA tile slices, which are 1D vectors of horizontally or vertically
contiguous elements within a ZA tile.

This patch extends the lowering of 'arith.constant' to SME to support
non-zero constants using this new op.  This requires materializing a
loop that broadcasts the constant to each tile slice with the
'vector_to_tile_slice' op. Unlike load and store, this is done during
conversion from Vector to ArmSME, rather than ArmSME to SCF. The latter
would require a higher-level custom op in the ArmSME dialect like
'tile_load' and 'tile_store' and this isn't necessary. We may also
remove the load and store ops in the future in favour of lowering
straight from Vector, at which point this would converge.

Currently only horizontal tile slices are supported. A future patch will
extend this mechanism to support 'vector.broadcast'.

Depends on D157004 <https://reviews.llvm.org/D157004>

[1] https://developer.arm.com/documentation/ddi0602


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D157005

Files:
  mlir/include/mlir/Dialect/ArmSME/IR/ArmSME.td
  mlir/lib/Conversion/VectorToArmSME/VectorToArmSME.cpp
  mlir/lib/Dialect/ArmSME/Transforms/LegalizeForLLVMExport.cpp
  mlir/test/Dialect/ArmSME/roundtrip.mlir
  mlir/test/Dialect/ArmSME/vector-ops-to-sme.mlir
  mlir/test/Integration/Dialect/Vector/CPU/ArmSME/tile_fill.mlir

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