[PATCH] D157091: AMDGPU/Uniformity/GlobalISel: G_AMDGPU atomics are always divergent

Petar Avramovic via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Fri Aug 4 07:33:24 PDT 2023


Petar.Avramovic added inline comments.


================
Comment at: llvm/lib/Target/AMDGPU/SIInstrInfo.cpp:8607
   unsigned opcode = MI.getOpcode();
+  if (AMDGPU::isGenericAtomic(opcode))
+    return InstructionUniformity::NeverUniform;
----------------
foad wrote:
> Can we detect these by looking at the MachineMemOperands, so we don't have to maintain yet another big list of opcodes?
Mem operand might be missing something, MMO.isAtomic() does not work.
In ir, buffer atomic intrinsic looks like any other intrinsic, maybe we are missing something in getTgtMemIntrinsic, or legalizer (legalizer translates these to G_AMDGPU...)


================
Comment at: llvm/lib/Target/AMDGPU/SIInstrInfo.cpp:8647
 
   if (SIInstrInfo::isGenericAtomicRMWOpcode(opcode) ||
       opcode == AMDGPU::G_ATOMIC_CMPXCHG ||
----------------
arsenm wrote:
> Isn't this covered by this already?
This is for G_ATOMIC... (generic rmw atomics), we need to handle G_AMDGPU_ .. ATOMIC ..


Repository:
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  https://reviews.llvm.org/D157091/new/

https://reviews.llvm.org/D157091



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