[PATCH] D156939: [AMDGPU][True16] Support disassembling .h registers.

[Ivan Kosarev via Phabricator via llvm-commits]

kosarev added a comment.

> The hi/lo bit was specifically chosen to be the LSB in the Register encoding so that subtracting registers creates a logical register range. This is used for True16 codegen support SIInsertWaitcnts, and likely elsewhere.

Why do SIInsertWaitcnts intervals need to represent individual 16-bit registers?


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D156939/new/

https://reviews.llvm.org/D156939