[PATCH] D156692: [RISCV] Scalarize binop followed by extractelement to W instruction on RV64

[Jim Lin via Phabricator via llvm-commits]

Jim marked 2 inline comments as done.
Jim added inline comments.


================
Comment at: llvm/lib/Target/RISCV/RISCVISelLowering.cpp:1858
+  return isOperationLegalOrCustomOrPromote(Opc, ScalarVT) ||
+         isOperationCustom(Opc, ScalarVT);
 }
----------------
craig.topper wrote:
> Do we still need the `|| isOperationCustom(Opc, ScalarVT)`?
isOperationLegalOrCustomOrPromote(Opc, ScalarVT) would return false for that i32 type (is not legal) with custom lowering operation on RV64 (ADDW, ADDIW, SUBW, ...).

```
bool isOperationLegalOrCustomOrPromote(unsigned Op, EVT VT,
                                         bool LegalOnly = false) const {
    if (LegalOnly)
      return isOperationLegal(Op, VT);
 
    return (VT == MVT::Other || isTypeLegal(VT)) &&
      (getOperationAction(Op, VT) == Legal ||
       getOperationAction(Op, VT) == Custom ||
       getOperationAction(Op, VT) == Promote);
  }
```

isOperationCustom(Opc, ScalarVT) is for ADDW, ADDIW, SUBW ... can be scalarized to.

 


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  https://reviews.llvm.org/D156692/new/

https://reviews.llvm.org/D156692