[PATCH] D157014: [DAGCombiner][X86] Guard `(X & Y) ==/!= Y` --> `(X & Y) !=/== 0` behind TLI preference

[Simon Pilgrim via Phabricator via llvm-commits]

RKSimon accepted this revision.
RKSimon added a comment.
This revision is now accepted and ready to land.

LGTM with one minor



================
Comment at: llvm/include/llvm/CodeGen/TargetLowering.h:687
   }
 
   /// Return true if it is valid to merge the TargetMMOFlags in two SDNodes.
----------------
Please can you move the isXAndYEqZeroPreferableToXAndYEqY definition up here with similar cases inside TargetLoweringBase


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D157014/new/

https://reviews.llvm.org/D157014