[PATCH] D156811: [InstCombine] Fold `select` of `srem` and conditional add

[Craig Topper via Phabricator via llvm-commits]

craig.topper added inline comments.


================
Comment at: llvm/lib/Transforms/InstCombine/InstCombineSelect.cpp:2616
+        IC.isKnownToBeAPowerOfTwo(Remainder, /*OrZero*/ true) &&
+        (TrueIfSigned ? (FalseVal == RemRes) : (TrueVal == RemRes))))
+    return nullptr;
----------------
This line `match(TrueVal, m_Add(m_Value(RemRes), m_Value(Remainder)))` is also incorrect when `TrueIfSigned` is false. Which is why I suggested swapping the True and False value.


CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D156811/new/

https://reviews.llvm.org/D156811