[PATCH] D157250: [RISCV] Enable alias analysis by default

[Kito Cheng via Phabricator via llvm-commits]

kito-cheng added inline comments.


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Comment at: llvm/test/CodeGen/RISCV/vararg.ll:498-499
 ; ILP32-ILP32F-FPELIM-NEXT:    sw a2, 24(sp)
+; ILP32-ILP32F-FPELIM-NEXT:    addi a0, sp, 20
+; ILP32-ILP32F-FPELIM-NEXT:    sw a0, 12(sp)
 ; ILP32-ILP32F-FPELIM-NEXT:    addi a0, sp, 27
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Ooops, why we got an extra store here after enable AA ?


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D157250/new/

https://reviews.llvm.org/D157250