[PATCH] D156315: [RFC][GlobalISel] Overhauled MIR Patterns Support for Combiners
Matt Arsenault via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Tue Aug 1 08:32:05 PDT 2023
arsenm added inline comments.
================
Comment at: llvm/docs/GlobalISel/MIRPatterns.rst:49
+ * typed, unnamed: ``(i32 0)``
+ * typed, named: ``(i32 0):$y``
+
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Do these support vectors. i.e. can you use a constant and implicitly get a constant splat? vector constants are a recurring pain point
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D156315/new/
https://reviews.llvm.org/D156315
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