[PATCH] D156801: [RISCV] Improve codegen for i8/i16 'atomicrmw xchg a, 0'

[Alex Bradbury via Phabricator via llvm-commits]

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As noted in https://github.com/llvm/llvm-project/issues/64090, it's more efficient to lower a partword 'atomicrmw xchg a, 0` to and amoand with appropriate mask. There are a range of possible ways to go about this - e.g. writing a combine based on the `llvm.riscv.masked.atomicrmw.xchg` intrinsic, or introducing a new interface to AtomicExpandPass to allow target-specific atomics conversions, or trying to lift the conversion into AtomicExpandPass itself based on querying some target hook. Ultimately I've gone with what appears to be the simplest approach - just covering this case in emitMaskedAtomicRMWIntrinsic. I perhaps should have given that hook a different name way back when it was introduced.

Fixes https://github.com/llvm/llvm-project/issues/64090


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D156801

Files:
  llvm/lib/Target/RISCV/RISCVISelLowering.cpp
  llvm/test/CodeGen/RISCV/atomic-rmw.ll

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