The Week Of Monday 22 May 2023 Archives by date
Starting: Mon May 22 00:03:48 PDT 2023
Ending: Sun May 28 23:47:09 PDT 2023
Messages: 2235
- [PATCH] D151019: [llvm-exegesis] Refactor FunctionExecutorImpl and create factory
Clement Courbet via Phabricator via llvm-commits
- [PATCH] D151001: [DebugInfo][NFCI] Add unittest for DWARFAbbreviationDeclarationSet
James Henderson via Phabricator via llvm-commits
- [PATCH] D150264: [libcxx] Add strict weak ordering checks to sorting algorithms
Danila Kutenin via Phabricator via llvm-commits
- [PATCH] D150900: [InstCombine] Insert a bitcast to enable merging similar store insts
Jay Foad via Phabricator via llvm-commits
- [PATCH] D150551: [AMDGPU] Reintroduce CC exception for non-inlined functions in Promote Alloca limits
Pierre van Houtryve via Phabricator via llvm-commits
- [PATCH] D151029: [DAG] Combine insert(shuffle(load), load, 0) into a single load
Dave Green via Phabricator via llvm-commits
- [PATCH] D151029: [DAG] Combine insert(shuffle(load), load, 0) into a single load
Dave Green via Phabricator via llvm-commits
- [PATCH] D150873: [LoopVectorize] Consider interleaving when deciding if epilogue vectorisation is beneficial
Florian Hahn via Phabricator via llvm-commits
- [PATCH] D150336: [LV][AArch64] Disable maximising bandwidth for streaming compatible sve
Dinar Temirbulatov via Phabricator via llvm-commits
- [PATCH] D150336: [LV][AArch64] Disable maximising bandwidth for streaming compatible sve
David Sherwood via Phabricator via llvm-commits
- [PATCH] D150311: [MISched] Use StartAtCycle in trace dumps.
Francesco Petrogalli via Phabricator via llvm-commits
- [PATCH] D150312: [MISched] Introduce and use ResourceSegments.
Francesco Petrogalli via Phabricator via llvm-commits
- [PATCH] D150970: (WIP) [MemCpyOpt]remove memcpy on noalias readonly attributed arguments
Kohei Asano via Phabricator via llvm-commits
- [PATCH] D150970: (WIP) [MemCpyOpt]remove memcpy on noalias readonly attributed arguments
Kohei Asano via Phabricator via llvm-commits
- [PATCH] D143248: Emit CFI directives in epilogue and enable CFIFixup pass for RISC-V.
Alex Bradbury via Phabricator via llvm-commits
- [PATCH] D151066: [tools] Add explicit check for plugin-api.h
Dmitry Antipov via Phabricator via llvm-commits
- [llvm] bcd1296 - [JITLink][RISCV] Consider relaxable call edges for PLT edges
Job Noorman via llvm-commits
- [PATCH] D150957: [JITLink][RISCV] Consider relaxable call edges for PLT edges
Job Noorman via Phabricator via llvm-commits
- [PATCH] D147544: [BOLT] Move from RuntimeDyld to JITLink
Job Noorman via Phabricator via llvm-commits
- [PATCH] D150900: [InstCombine] Insert a bitcast to enable merging similar store insts
Nikita Popov via Phabricator via llvm-commits
- [llvm] 9668679 - [VPlan] Move live-out printing to VPLiveOut::print (NFC).
Florian Hahn via llvm-commits
- [PATCH] D150693: [RL78 patch 1] Recognize RL78 in triple parsing code
Sebastian Perta via Phabricator via llvm-commits
- [PATCH] D151068: [Scalarizer] Fix for vector bitcasts of different element numbers
Mikael Holmén via Phabricator via llvm-commits
- [llvm] 53afdb7 - [SLP][RISCV] Add test for folding offsets in GEP pointer chains
Luke Lau via llvm-commits
- [PATCH] D149654: [SLP][RISCV] Account for offset folding in getPointersChainCost
Luke Lau via Phabricator via llvm-commits
- [PATCH] D150684: [LoopReroll] Remove unused LoopReroll pass
Nikita Popov via Phabricator via llvm-commits
- [PATCH] D151069: [AMDGPU] Handle multiple occurences of an incoming value in break large PHIs
Pierre van Houtryve via Phabricator via llvm-commits
- [PATCH] D150967: [MemCpyOpt] precommit test for memcpy removal for immutable arguments from attributes (NFC)
Kohei Asano via Phabricator via llvm-commits
- [PATCH] D150994: Bump coalescing limit
Quentin Colombet via Phabricator via llvm-commits
- [llvm] 15bcb9a - ValueTracking: Add some regression tests for fabs handling in computeKnownFPClass
Matt Arsenault via llvm-commits
- [llvm] 200bdd9 - ValueTracking: Fix broken fabs implementation for computeKnownFPClass, again
Matt Arsenault via llvm-commits
- [PATCH] D150940: [lld][RISCV][test] Add test for relaxation combined with --wrap
Job Noorman via Phabricator via llvm-commits
- [PATCH] D150666: [WIP][GlobalISel] Combiner Intrinsic Matching
Pierre van Houtryve via Phabricator via llvm-commits
- [llvm] 8eaf7a7 - [VPlan] Add missing ifdef after 96686796f606.
Florian Hahn via llvm-commits
- [llvm] c21f1fe - ValueTracking: Drop rounding mode check for constrained_sqrt in CannotBeNegativeZero
Matt Arsenault via llvm-commits
- [PATCH] D150728: ValueTracking: Drop rounding mode check for constrained_sqrt in CannotBeNegativeZero
Matt Arsenault via Phabricator via llvm-commits
- [PATCH] D145686: [RuntimeDyld][ELF] Add minimal RISC-V support
Job Noorman via Phabricator via llvm-commits
- [PATCH] D150768: [SVE ACLE] Canonicalise SVE merging intrinsics
Jolanta Jensen via Phabricator via llvm-commits
- [PATCH] D150388: [CodeGen]Allow targets to use target specific COPY instructions for live range splitting
Yashwant Singh via Phabricator via llvm-commits
- [PATCH] D151076: [IRGen] Handle infinite cycles in findDominatingStoreToReturnValue.
Florian Hahn via Phabricator via llvm-commits
- [PATCH] D148575: ValueTracking: Handle cannotBeOrderedLessThanZero for fadd
Matt Arsenault via Phabricator via llvm-commits
- [PATCH] D151069: [AMDGPU] Handle multiple occurences of an incoming value in break large PHIs
Diana Picus via Phabricator via llvm-commits
- [llvm] 3c0d81d - [AMDGPU] Simplify scavenging in indirectCopyToAGPR
Jay Foad via llvm-commits
- [PATCH] D150774: [AMDGPU] Simplify scavenging in indirectCopyToAGPR
Jay Foad via Phabricator via llvm-commits
- [PATCH] D151069: [AMDGPU] Handle multiple occurences of an incoming value in break large PHIs
Pierre van Houtryve via Phabricator via llvm-commits
- [PATCH] D151069: [AMDGPU] Handle multiple occurences of an incoming value in break large PHIs
Pierre van Houtryve via Phabricator via llvm-commits
- [PATCH] D150390: [AMDGPU] Introduce and use the new PRED_COPY opcode
Yashwant Singh via Phabricator via llvm-commits
- [PATCH] D151069: [AMDGPU] Handle multiple occurences of an incoming value in break large PHIs
Diana Picus via Phabricator via llvm-commits
- [PATCH] D150969: [AArch64] Try to convert two XTN and two SMLSL to UZP1, SMLSL and SMLSL2
JinGu Kang via Phabricator via llvm-commits
- [PATCH] D58346: [Sema] Change addr space diagnostics in casts to follow C++ style
Joseph Huber via Phabricator via llvm-commits
- [PATCH] D144509: [CMake] Bumps minimum version to 3.20.0.
Hans Wennborg via Phabricator via llvm-commits
- [PATCH] D151079: [llvm][ADT] Change isEqual for DenseMapInfo<std::variant<...>>
Kadir Cetinkaya via Phabricator via llvm-commits
- [PATCH] D150997: [llvm] Split out DenseMapInfo<variant> specialization
Kadir Cetinkaya via Phabricator via llvm-commits
- [PATCH] D150997: [llvm] Split out DenseMapInfo<variant> specialization
Kadir Cetinkaya via Phabricator via llvm-commits
- [llvm] fa87dd5 - [AMDGPU] Handle multiple occurences of an incoming value in break large PHIs
via llvm-commits
- [PATCH] D151069: [AMDGPU] Handle multiple occurences of an incoming value in break large PHIs
Pierre van Houtryve via Phabricator via llvm-commits
- [PATCH] D146491: workflows/release-tasks: Upload lit releases to pypi
Konrad Wilhelm Kleine via Phabricator via llvm-commits
- [PATCH] D148558: [CodeGen] Improve handling -Ofast generated code by ComplexDeinterleaving pass
Igor Kirillov via Phabricator via llvm-commits
- [PATCH] D151080: [AArch64][SVE] Add one-use-check to EitherVSelectOrPassthruPatFrags
Dave Green via Phabricator via llvm-commits
- [PATCH] D150929: [RISCV][BF16] Enable __bf16 for riscv targets
Jun Sha via Phabricator via llvm-commits
- [PATCH] D150956: [AArch64][SME2/SVE2p1] Add predicate-as-counter intrinsics for ld1/ldnt1/st1/stnt1
Caroline via Phabricator via llvm-commits
- [PATCH] D150390: [AMDGPU] Introduce and use the new PRED_COPY opcode
Matt Arsenault via Phabricator via llvm-commits
- [PATCH] D151082: [GuardUtils] Allow intermmediate blocks between widenable branch and deopt block
Serguei Katkov via Phabricator via llvm-commits
- [PATCH] D150981: [lld][COFF] Retry failed paths to take advantage of winsysroot search paths
Hans Wennborg via Phabricator via llvm-commits
- [PATCH] D151084: [AArch64][SVE] Add a commutative VSelectCommPredOrPassthruPatFrags
Dave Green via Phabricator via llvm-commits
- [PATCH] D150900: [InstCombine] Insert a bitcast to enable merging similar store insts
Nikita Popov via Phabricator via llvm-commits
- [PATCH] D149654: [SLP][RISCV] Account for offset folding in getPointersChainCost
Alexey Bataev via Phabricator via llvm-commits
- [PATCH] D150958: [SME2/SVE2p1] Change psel intrinsic such that the result/first operand are not overloaded.
Caroline via Phabricator via llvm-commits
- [PATCH] D149968: [AArch64][SVE] Predicated mul pattern
Dave Green via Phabricator via llvm-commits
- [llvm] c27a0b2 - [SLP][RISCV] Account for offset folding in getPointersChainCost
Luke Lau via llvm-commits
- [PATCH] D149654: [SLP][RISCV] Account for offset folding in getPointersChainCost
Luke Lau via Phabricator via llvm-commits
- [PATCH] D151086: [AArch64][SVE] Extra patterns for predicated and/or/xor
Dave Green via Phabricator via llvm-commits
- [PATCH] D151082: [GuardUtils] Allow intermmediate blocks between widenable branch and deopt block
Nikita Popov via Phabricator via llvm-commits
- [PATCH] D151089: [Remarks] Add option to retain all remarks during remark linking.
Florian Hahn via Phabricator via llvm-commits
- [llvm] 2bb3515 - [SCEV] Replace NumTripCountsComputed stat with NumExitCountsComputed
Dmitry Makogon via llvm-commits
- [PATCH] D149251: [SCEV] Replace NumTripCountsComputed stat with NumExitCountsComputed
Dmitry Makogon via Phabricator via llvm-commits
- [PATCH] D149967: [AArch64][SVE] Enable shouldFoldSelectWithIdentityConstant for SVE.
Dave Green via Phabricator via llvm-commits
- [PATCH] D151091: [test] precommit tests for D141188
Allen zhong via Phabricator via llvm-commits
- [llvm] f3202b9 - [RISCV][test][NFC] Trim unneeded +f/+d from -mattr in bfloat16 extension tests
Alex Bradbury via llvm-commits
- [PATCH] D150864: [AggressiveInstCombine] Handle the nested GEP/BitCast scenario in Load Merge.
Biplob Mishra via Phabricator via llvm-commits
- [PATCH] D150958: [SME2/SVE2p1] Change psel intrinsic such that the result/first operand are not overloaded.
Sander de Smalen via Phabricator via llvm-commits
- [llvm] a6e2b1e - [RISCV][test] Remove unneeded (implied) 'f' from Zvfbfwma, Zvfbfmin attribute tests
Alex Bradbury via llvm-commits
- [PATCH] D149162: [Clang][OpenMP][IRBuilder] Move registerTargetGlobalVariable & getAddrOfDeclareTargetVar into the OMPIRBuilder
Andrew Gozillon via Phabricator via llvm-commits
- [llvm] 1f1b819 - [RISCV][test] Finish removing unneeded (implied) 'f' from Zvfbfwma, Zvfbfmin attribute tests
Alex Bradbury via llvm-commits
- [llvm] 6521905 - [llvm-profdata] Accept --version argument
Michael Platings via llvm-commits
- [PATCH] D150964: [llvm-profdata] Accept --version argument
Michael Platings via Phabricator via llvm-commits
- [PATCH] D150958: [SME2/SVE2p1] Change psel intrinsic such that the result/first operand are not overloaded.
David Sherwood via Phabricator via llvm-commits
- [llvm] 50f0ee8 - [PostOrderIterator] Store end iterator (NFC)
Nikita Popov via llvm-commits
- [llvm] d33910a - [AArch64][SME2/SVE2p1] Add predicate-as-counter intrinsics for sel
Sander de Smalen via llvm-commits
- [llvm] 387c49f - [AArch64][SME2/SVE2p1] Add predicate-as-counter intrinsics for ld1/ldnt1/st1/stnt1
Sander de Smalen via llvm-commits
- [PATCH] D150951: [AArch64][SME2/SVE2p1] Add predicate-as-counter intrinsics for sel
Sander de Smalen via Phabricator via llvm-commits
- [PATCH] D150956: [AArch64][SME2/SVE2p1] Add predicate-as-counter intrinsics for ld1/ldnt1/st1/stnt1
Sander de Smalen via Phabricator via llvm-commits
- [PATCH] D151096: [RISCV] Make zfbfmin imply the F extension
Alex Bradbury via Phabricator via llvm-commits
- [PATCH] D150288: [SLP] Simplify `tryToVectorizeSequence()`
Alexey Bataev via Phabricator via llvm-commits
- [PATCH] D150612: AMDGPU: Expand casted f16 fmed3 pattern to fmin/fmax on gfx8
Pierre van Houtryve via Phabricator via llvm-commits
- [llvm] 437a516 - [SME2/SVE2p1] Change psel intrinsic such that the result/first operand are not overloaded.
Sander de Smalen via llvm-commits
- [llvm] 11926e6 - [SME2/SVE2p1] Extend llvm.aarch64.sve.convert.to/from.svbool to accept target("aarch64.svcount")
Sander de Smalen via llvm-commits
- [PATCH] D150958: [SME2/SVE2p1] Change psel intrinsic such that the result/first operand are not overloaded.
Sander de Smalen via Phabricator via llvm-commits
- [PATCH] D150959: [SME2/SVE2p1] Extend llvm.aarch64.sve.convert.to/from.svbool to accept target("aarch64.svcount")
Sander de Smalen via Phabricator via llvm-commits
- [PATCH] D151099: [InstCombine] Remove computeKnownBits() fold for returns
Nikita Popov via Phabricator via llvm-commits
- [PATCH] D151006: [bazel] Remove terminfo dependency
Aaron Siddhartha Mondal via Phabricator via llvm-commits
- [PATCH] D118118: [SDAG] Preserve unpredictable metadata, teach X86CmovConversion to respect this metadata
Dávid Bolvanský via Phabricator via llvm-commits
- [PATCH] D150900: [InstCombine] Insert a bitcast to enable merging similar store insts
Anshil Gandhi via Phabricator via llvm-commits
- [PATCH] D150900: [InstCombine] Insert a bitcast to enable merging similar store insts
Nikita Popov via Phabricator via llvm-commits
- [PATCH] D151101: Add missing header for uint64_t
Paulo Matos via Phabricator via llvm-commits
- [PATCH] D150900: [InstCombine] Insert a bitcast to enable merging similar store insts
Anshil Gandhi via Phabricator via llvm-commits
- [PATCH] D150900: [InstCombine] Insert a bitcast to enable merging similar store insts
Anshil Gandhi via Phabricator via llvm-commits
- [PATCH] D150900: [InstCombine] Insert a bitcast to enable merging similar store insts
Anshil Gandhi via Phabricator via llvm-commits
- [llvm] 5d3412a - [InstCombine] Insert a bitcast to enable merging similar store insts
Anshil Gandhi via llvm-commits
- [PATCH] D151101: Add missing header for uint64_t
Paulo Matos via Phabricator via llvm-commits
- [PATCH] D151101: Add missing header for uint64_t
Nikita Popov via Phabricator via llvm-commits
- [PATCH] D146557: [MLIR][OpenMP] Refactoring createTargetData in OMPIRBuilder
Akash Banerjee via Phabricator via llvm-commits
- [llvm] 0887443 - Add missing header for uint64_t
Paulo Matos via llvm-commits
- [PATCH] D151101: Add missing header for uint64_t
Paulo Matos via Phabricator via llvm-commits
- [PATCH] D145891: [BPF] Generate BTF info using 'btf:type_tag' annotation
Eduard Zingerman via Phabricator via llvm-commits
- [PATCH] D151103: [RISCV] Scalarize small fixed vector copies < XLEN
Luke Lau via Phabricator via llvm-commits
- [PATCH] D151105: [AMDGPU] Fix lowering of @llvm.amdgcn.set.inactive(imm, poison)
Jay Foad via Phabricator via llvm-commits
- [PATCH] D150860: [OpenMP] Change clang emitTargetDataCalls to use OMPIRBuilder
Akash Banerjee via Phabricator via llvm-commits
- [PATCH] D151105: [AMDGPU] Fix lowering of @llvm.amdgcn.set.inactive(imm, poison)
Jay Foad via Phabricator via llvm-commits
- [PATCH] D151035: [WIP][OpenMP][OpenMPIRBuilder] Migrate kernel launch code and host fallback code generation from Clang to the OpenMPIRBuilder
Akash Banerjee via Phabricator via llvm-commits
- [PATCH] D148216: Add support for annotations in UpdateTestChecks (NFC)
Henrik G Olsson via Phabricator via llvm-commits
- [PATCH] D151107: [IR] Add GraalVM calling conventions
Sacha Coppey via Phabricator via llvm-commits
- [PATCH] D150964: [llvm-profdata] Accept --version argument
Tom Weaver via Phabricator via llvm-commits
- [llvm] 1023d7e - [llvm-profdata] Fix test on Windows
Michael Platings via llvm-commits
- [PATCH] D151105: [AMDGPU] Fix lowering of @llvm.amdgcn.set.inactive(imm, poison)
Jay Foad via Phabricator via llvm-commits
- [PATCH] D150964: [llvm-profdata] Accept --version argument
Michael Platings via Phabricator via llvm-commits
- [PATCH] D151105: [AMDGPU] Fix lowering of @llvm.amdgcn.set.inactive(imm, poison)
Matt Arsenault via Phabricator via llvm-commits
- [PATCH] D150964: [llvm-profdata] Accept --version argument
Tom Weaver via Phabricator via llvm-commits
- [PATCH] D151036: [CodeGen] Fix incorrect usage of MCPhysReg for diff list elements
Jay Foad via Phabricator via llvm-commits
- [PATCH] D151105: [AMDGPU] Fix lowering of @llvm.amdgcn.set.inactive(imm, poison)
Jay Foad via Phabricator via llvm-commits
- [PATCH] D151105: [AMDGPU] Fix lowering of @llvm.amdgcn.set.inactive(imm, poison)
Matt Arsenault via Phabricator via llvm-commits
- [PATCH] D151089: [Remarks] Add option to retain all remarks during remark linking.
Jonas Devlieghere via Phabricator via llvm-commits
- [llvm] 9283c43 - [AMDGPU] Fix lowering of @llvm.amdgcn.set.inactive(imm, poison)
Jay Foad via llvm-commits
- [PATCH] D151105: [AMDGPU] Fix lowering of @llvm.amdgcn.set.inactive(imm, poison)
Jay Foad via Phabricator via llvm-commits
- [PATCH] D148279: [SLP]Add final resize to ShuffleCostEstimator::finalize member function and basic add member functions.
Florian Hahn via Phabricator via llvm-commits
- [PATCH] D151109: [AArch64] add missing prfm-slc disassembly test
Tomas Matheson via Phabricator via llvm-commits
- [PATCH] D151089: [Remarks] Add option to retain all remarks during remark linking.
Francis Visoiu Mistrih via Phabricator via llvm-commits
- [PATCH] D148192: [JITLink][ELF][PPC64] Add skeleton ppc64 support and ELF/ppc64 JITLink backend.
Lang Hames via Phabricator via llvm-commits
- [PATCH] D117318: [RISCV][GlobalISel] Add lowerReturn for calling conv
Nitin John Raj via Phabricator via llvm-commits
- [PATCH] D117318: [RISCV][GlobalISel] Add lowerReturn for calling conv
Nitin John Raj via Phabricator via llvm-commits
- [PATCH] D151006: [bazel] Remove terminfo dependency
Fangrui Song via Phabricator via llvm-commits
- [PATCH] D150390: [AMDGPU] Introduce and use the new PRED_COPY opcode
Christudasan Devadasan via Phabricator via llvm-commits
- [PATCH] D146557: [MLIR][OpenMP] Refactoring createTargetData in OMPIRBuilder
Akash Banerjee via Phabricator via llvm-commits
- [llvm] 219a399 - AMDGPU: Fix assertion on assorted canonicalize vector types
Matt Arsenault via llvm-commits
- [PATCH] D150684: [LoopReroll] Remove unused LoopReroll pass
Florian Hahn via Phabricator via llvm-commits
- [PATCH] D117318: [RISCV][GlobalISel] Add lowerReturn for calling conv
Matt Arsenault via Phabricator via llvm-commits
- [PATCH] D147812: [InstrProf] Use BalancedPartitioning to order temporal profiling trace data
Ellis Hoag via Phabricator via llvm-commits
- [PATCH] D150684: [LoopReroll] Remove unused LoopReroll pass
Florian Hahn via Phabricator via llvm-commits
- [PATCH] D150878: Add StringRef::consumeInteger(APInt)
Thomas Preud'homme via Phabricator via llvm-commits
- [PATCH] D145687: [BOLT] Add minimal RISC-V 64-bit support
Job Noorman via Phabricator via llvm-commits
- [PATCH] D151099: [InstCombine] Remove computeKnownBits() fold for returns
Noah Goldstein via Phabricator via llvm-commits
- [PATCH] D150878: Add StringRef::consumeInteger(APInt)
Thomas Preud'homme via Phabricator via llvm-commits
- [PATCH] D150782: [NFC][Py Reformat] Reformat python files in mlir subdir
Alex Zinenko via Phabricator via llvm-commits
- [PATCH] D149496: [RISCV][llvm-mca] Add mca tests for riscv lmul instruments
Michael Maitland via Phabricator via llvm-commits
- [PATCH] D150797: Turn unreachable error into assert
Thomas Preud'homme via Phabricator via llvm-commits
- [PATCH] D150390: [AMDGPU] Introduce and use the new PRED_COPY opcode
Matt Arsenault via Phabricator via llvm-commits
- [PATCH] D150133: [RISCV] Support constant immediate for la pseudo instruction
garvit gupta via Phabricator via llvm-commits
- [PATCH] D151006: [bazel] Remove terminfo dependency
Petr Hosek via Phabricator via llvm-commits
- [PATCH] D150929: [RISCV][BF16] Enable __bf16 for riscv targets
Alex Bradbury via Phabricator via llvm-commits
- [PATCH] D150133: [RISCV] Support constant immediate for la pseudo instruction
Jessica Clarke via Phabricator via llvm-commits
- [PATCH] D151116: [AMDGPU][GlobalISel] Update legalization condition for G_BITCAST
Mateja Marjanovic via Phabricator via llvm-commits
- [PATCH] D150083: [clang-format] ObjCPropertyAttributeOrder to sort ObjC property attributes
Jared Grubb via Phabricator via llvm-commits
- [PATCH] D150464: [FuncSpec] Improve the accuracy of the cost model.
Alexandros Lamprineas via Phabricator via llvm-commits
- [PATCH] D151099: [InstCombine] Remove computeKnownBits() fold for returns
Nikita Popov via Phabricator via llvm-commits
- [PATCH] D150464: [FuncSpec] Improve the accuracy of the cost model.
Alexandros Lamprineas via Phabricator via llvm-commits
- [llvm] 83178d0 - [RISCV] Add missing zfh extensions to fixed vector load/store tests
Luke Lau via llvm-commits
- [PATCH] D151099: [InstCombine] Remove computeKnownBits() fold for returns
Noah Goldstein via Phabricator via llvm-commits
- [PATCH] D74977: [RISCV][GlobalISel] Add lowerFormalArguments for calling convention
Nitin John Raj via Phabricator via llvm-commits
- [PATCH] D74977: [RISCV][GlobalISel] Add lowerFormalArguments for calling convention
Nitin John Raj via Phabricator via llvm-commits
- [PATCH] D151116: [AMDGPU][GlobalISel] Update legalization condition for G_BITCAST
Matt Arsenault via Phabricator via llvm-commits
- [PATCH] D146737: [AMDGPU] Trim zero components from buffer and image stores
Mateja Marjanovic via Phabricator via llvm-commits
- [PATCH] D74977: [RISCV][GlobalISel] Add lowerFormalArguments for calling convention
Matt Arsenault via Phabricator via llvm-commits
- [PATCH] D74977: [RISCV][GlobalISel] Add lowerFormalArguments for calling convention
Thorsten via Phabricator via llvm-commits
- [PATCH] D151053: [PassManager] Add extension point to LTO pipeline to enable module optimization passes to run shortly before loop optimizations
Arthur Eubanks via Phabricator via llvm-commits
- [PATCH] D74977: [RISCV][GlobalISel] Add lowerFormalArguments for calling convention
Matt Arsenault via Phabricator via llvm-commits
- [llvm] 1b12320 - [FuncSpec] Replace LoopInfo with BlockFrequencyInfo.
Alexandros Lamprineas via llvm-commits
- [PATCH] D150375: [FuncSpec] Replace LoopInfo with BlockFrequencyInfo.
Alexandros Lamprineas via Phabricator via llvm-commits
- [PATCH] D74977: [RISCV][GlobalISel] Add lowerFormalArguments for calling convention
Thorsten via Phabricator via llvm-commits
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Arthur Eubanks via Phabricator via llvm-commits
- [PATCH] D151001: [DebugInfo][NFCI] Add unittest for DWARFAbbreviationDeclarationSet
Alex Langford via Phabricator via llvm-commits
- [PATCH] D145403: [Pipeline] Don't run EarlyFPM in LTO post link
Arthur Eubanks via Phabricator via llvm-commits
- [PATCH] D151006: [bazel] Remove terminfo dependency
Aaron Siddhartha Mondal via Phabricator via llvm-commits
- [PATCH] D74977: [RISCV][GlobalISel] Add lowerFormalArguments for calling convention
Matt Arsenault via Phabricator via llvm-commits
- [PATCH] D150641: [bazel] Refactor entries in WORKSPACE to bzl files
Aaron Siddhartha Mondal via Phabricator via llvm-commits
- [PATCH] D151122: [GlobalISel] Check if ShiftAmt is greater then size of operand
Acim Maravic via Phabricator via llvm-commits
- [compiler-rt] 279a4d0 - -fsanitize=function: support C
Fangrui Song via llvm-commits
- [PATCH] D148573: Allow -fsanitize=function on all targets
Sam Clegg via Phabricator via llvm-commits
- [PATCH] D151001: [DebugInfo][NFCI] Add unittest for DWARFAbbreviationDeclarationSet
Alex Langford via Phabricator via llvm-commits
- [PATCH] D148573: Allow -fsanitize=function on all targets
Sam Clegg via Phabricator via llvm-commits
- [PATCH] D150428: [flang][openmp] Allocators construct semantic checks
Ethan Luis McDonough via Phabricator via llvm-commits
- [PATCH] D75023: [RISCV][GlobalISel] Add lowerCall for calling convention
Nitin John Raj via Phabricator via llvm-commits
- [PATCH] D150447: [MachineSink] Don't reject sinking because of a dead def in isProfitableToSinkTo()
Alexander Kornienko via Phabricator via llvm-commits
- [PATCH] D75023: [RISCV][GlobalISel] Add lowerCall for calling convention
Nitin John Raj via Phabricator via llvm-commits
- [llvm] 9f992cc - [SCCP] Fix -Wunused-lambda-capture
Fangrui Song via llvm-commits
- [PATCH] D150390: [AMDGPU] Introduce and use the new PRED_COPY opcode
Yashwant Singh via Phabricator via llvm-commits
- [llvm] 56674e8 - [llvm-mca][RISCV] Fix llvm-mca RISCVInstrument memory leak
Michael Maitland via llvm-commits
- [llvm] 60d36ef - [RISCV][llvm-mca] Add mca tests for riscv lmul instruments
Michael Maitland via llvm-commits
- [PATCH] D150816: [llvm-mca][RISCV] Fix llvm-mca RISCVInstrument memory leak
Michael Maitland via Phabricator via llvm-commits
- [PATCH] D149496: [RISCV][llvm-mca] Add mca tests for riscv lmul instruments
Michael Maitland via Phabricator via llvm-commits
- [PATCH] D145183: [libc++] Implement `stop_token`
Hui via Phabricator via llvm-commits
- [PATCH] D148573: Allow -fsanitize=function on all targets
Fangrui Song via Phabricator via llvm-commits
- [PATCH] D145183: [libc++] Implement `stop_token`
Valentin Clement via Phabricator via llvm-commits
- [PATCH] D151125: [WebAssembly] Undef invalid DBG_VALUEs after RegColoring
Heejin Ahn via Phabricator via llvm-commits
- [PATCH] D151126: [AMDGPU] Don't flush vmcnt for loops with use/def pairs
Austin Kerbow via Phabricator via llvm-commits
- [PATCH] D151103: [RISCV] Scalarize small fixed vector copies < XLEN
Philip Reames via Phabricator via llvm-commits
- [PATCH] D150459: [llvm-mca] Print InstructionInfoView using Instrument information.
Michael Maitland via Phabricator via llvm-commits
- [PATCH] D151125: [WebAssembly] Undef invalid DBG_VALUEs after RegColoring
Heejin Ahn via Phabricator via llvm-commits
- [PATCH] D76354: [RISCV][GlobalISel] Legalize types for ALU operations
Nitin John Raj via Phabricator via llvm-commits
- [PATCH] D118118: [SDAG] Preserve unpredictable metadata, teach X86CmovConversion to respect this metadata
Craig Topper via Phabricator via llvm-commits
- [PATCH] D76354: [RISCV][GlobalISel] Legalize types for ALU operations
Nitin John Raj via Phabricator via llvm-commits
- [PATCH] D143739: [WinEH] Ignore dynamic allocas of catch objects
Reid Kleckner via Phabricator via llvm-commits
- [PATCH] D141907: [CMake] Ensure `CLANG_RESOURCE_DIR` is respected
Tom Stellard via Phabricator via llvm-commits
- [PATCH] D149281: Not disable loop unroll for vectorized loops on AMDGPU target
Stanislav Mekhanoshin via Phabricator via llvm-commits
- [PATCH] D118118: [SDAG] Preserve unpredictable metadata, teach X86CmovConversion to respect this metadata
Craig Topper via Phabricator via llvm-commits
- [PATCH] D151127: [RISCV] Add more cost model tests for fixed vector casts. NFC
Craig Topper via Phabricator via llvm-commits
- [PATCH] D151096: [RISCV] Make zfbfmin imply the F extension
Craig Topper via Phabricator via llvm-commits
- [llvm] a7c5cf2 - [NVPTX] generalize hasPTX/hasSM predicates. NFC.
Artem Belevich via llvm-commits
- [PATCH] D150999: [NVPTX] generalize hasPTX/hasSM predicates. NFC.
Artem Belevich via Phabricator via llvm-commits
- [PATCH] D150941: [LegalizeType][X86] Support WidenVecRes_AssertZext and SplitVecRes_AssertZext for ISD::AssertZext during LegalizeType procedure
Craig Topper via Phabricator via llvm-commits
- [PATCH] D150555: [lli] Export the MinGW chkstk function from the lli executable
Lang Hames via Phabricator via llvm-commits
- [PATCH] D145403: [Pipeline] Don't run EarlyFPM in LTO post link
Arthur Eubanks via Phabricator via llvm-commits
- [PATCH] D144911: adding bf16 support to NVPTX
Artem Belevich via Phabricator via llvm-commits
- [PATCH] D151131: [bazel] Add clang-offload-packager and clang-linker-wrapper
Aaron Siddhartha Mondal via Phabricator via llvm-commits
- [PATCH] D117318: [RISCV][GlobalISel] Add lowerReturn for calling conv
Nitin John Raj via Phabricator via llvm-commits
- [PATCH] D151132: [RISCV] Add scalable vector cast cost model tests. NFC
Craig Topper via Phabricator via llvm-commits
- [PATCH] D117318: [RISCV][GlobalISel] Add lowerReturn for calling conv
Nitin John Raj via Phabricator via llvm-commits
- [PATCH] D123496: [RISCV] Add Stackmap/Statepoint/Patchpoint support without targets
Sacha Coppey via Phabricator via llvm-commits
- [PATCH] D149496: [RISCV][llvm-mca] Add mca tests for riscv lmul instruments
Nico Weber via Phabricator via llvm-commits
- [PATCH] D117318: [RISCV][GlobalISel] Add lowerReturn for calling conv
Craig Topper via Phabricator via llvm-commits
- [PATCH] D149496: [RISCV][llvm-mca] Add mca tests for riscv lmul instruments
Michael Maitland via Phabricator via llvm-commits
- [PATCH] D150316: [AArch64][InstCombine] Don't scalarize for bitselet instructions
Pranav Kant via Phabricator via llvm-commits
- [PATCH] D151125: [WebAssembly] Undef invalid DBG_VALUEs after RegColoring
Heejin Ahn via Phabricator via llvm-commits
- [llvm] 75a0502 - [CMake] Set compatibility policy for lists in LLVM-Config.cmake.
Sam James via llvm-commits
- [PATCH] D148216: Add support for annotations in UpdateTestChecks (NFC)
Nikita Popov via Phabricator via llvm-commits
- [PATCH] D150884: depdendent projects fail to build with cmake 3.25 and llvm 16-rc4
Sam James via Phabricator via llvm-commits
- [PATCH] D151136: [RISCV] Fix some errors in the vector part of the scheduler model for SiFive7.
Craig Topper via Phabricator via llvm-commits
- [PATCH] D151136: [RISCV] Fix some errors in the vector part of the scheduler model for SiFive7.
Michael Maitland via Phabricator via llvm-commits
- [PATCH] D148573: Allow -fsanitize=function on all targets
Sam Clegg via Phabricator via llvm-commits
- [PATCH] D151109: [AArch64] add missing prfm-slc disassembly test
Tomas Matheson via Phabricator via llvm-commits
- [PATCH] D151139: [RISCV] Increase scalar integer divide latency for SiFive7.
Craig Topper via Phabricator via llvm-commits
- [PATCH] D151139: [RISCV] Increase scalar integer divide latency for SiFive7.
Michael Maitland via Phabricator via llvm-commits
- [PATCH] D151141: [CodeGen] Fix crash in CodeGenPrepare::optimizeGatherScatterInst.
Joshua Cranmer via Phabricator via llvm-commits
- [PATCH] D149743: [RISCV][CodeGen] Support Zdinx on RV32 codegen
Craig Topper via Phabricator via llvm-commits
- [PATCH] D150864: [AggressiveInstCombine] Handle the nested GEP/BitCast scenario in Load Merge.
Nikita Popov via Phabricator via llvm-commits
- [PATCH] D151141: [CodeGen] Fix crash in CodeGenPrepare::optimizeGatherScatterInst.
Craig Topper via Phabricator via llvm-commits
- [llvm] 4907649 - [RISCV] Fix some errors in the vector part of the scheduler model for SiFive7.
Craig Topper via llvm-commits
- [PATCH] D151136: [RISCV] Fix some errors in the vector part of the scheduler model for SiFive7.
Craig Topper via Phabricator via llvm-commits
- [PATCH] D146903: [SimplifyCFG] add nsw on SwitchToLookupTable Index calculation
Nikita Popov via Phabricator via llvm-commits
- [PATCH] D151144: [lld][ELF] Do not emit warning for NOLOAD output sections
Leonard Chan via Phabricator via llvm-commits
- [PATCH] D151141: [CodeGen] Fix crash in CodeGenPrepare::optimizeGatherScatterInst.
Joshua Cranmer via Phabricator via llvm-commits
- [PATCH] D150637: [lld][ELF] Add option for suppressing section type mismatch warnings
Leonard Chan via Phabricator via llvm-commits
- [PATCH] D151139: [RISCV] Increase scalar integer divide latency for SiFive7.
Craig Topper via Phabricator via llvm-commits
- [PATCH] D151141: [CodeGen] Fix crash in CodeGenPrepare::optimizeGatherScatterInst.
Joshua Cranmer via Phabricator via llvm-commits
- [PATCH] D148573: Allow -fsanitize=function on all targets
Fangrui Song via Phabricator via llvm-commits
- [llvm] ca26665 - Revert "[PostOrderIterator] Store end iterator (NFC)"
Adrian Prantl via llvm-commits
- [PATCH] D150510: [ELF] x86-64: place .lrodata, .lbss, and .ldata away from code sections
Arthur Eubanks via Phabricator via llvm-commits
- [PATCH] D151139: [RISCV] Increase scalar integer divide latency for SiFive7.
Michael Maitland via Phabricator via llvm-commits
- [PATCH] D147900: [ValueTracking] Use `select` condition to help determine if `select` is non-zero
Nikita Popov via Phabricator via llvm-commits
- [PATCH] D149496: [RISCV][llvm-mca] Add mca tests for riscv lmul instruments
Min-Yih Hsu via Phabricator via llvm-commits
- [llvm] 8313507 - [JITLink][ELF][ppc64] Add skeleton ppc64 support and ELF/ppc64 JITLink backend.
Lang Hames via llvm-commits
- [PATCH] D148192: [JITLink][ELF][PPC64] Add skeleton ppc64 support and ELF/ppc64 JITLink backend.
Lang Hames via Phabricator via llvm-commits
- [PATCH] D151122: [GlobalISel] Check if ShiftAmt is greater then size of operand
Matt Arsenault via Phabricator via llvm-commits
- [PATCH] D151052: [LoopUnroll] Peel iterations based on select, and, or conditions
Nikita Popov via Phabricator via llvm-commits
- [PATCH] D148836: [X86] Use "l" prefix for data sections under medium/large code model
Arthur Eubanks via Phabricator via llvm-commits
- [PATCH] D149496: [RISCV][llvm-mca] Add mca tests for riscv lmul instruments
Michael Maitland via Phabricator via llvm-commits
- [PATCH] D147899: [ValueTracking] Add tests for using condition in select for non-zero analysis; NFC
Noah Goldstein via Phabricator via llvm-commits
- [PATCH] D147900: [ValueTracking] Use `select` condition to help determine if `select` is non-zero
Noah Goldstein via Phabricator via llvm-commits
- [PATCH] D147900: [ValueTracking] Use `select` condition to help determine if `select` is non-zero
Noah Goldstein via Phabricator via llvm-commits
- [PATCH] D150390: [AMDGPU] Introduce and use the new PRED_COPY opcode
Matt Arsenault via Phabricator via llvm-commits
- [PATCH] D151147: [lld-macho] Add support for .so file discovery
Keith Smiley via Phabricator via llvm-commits
- [PATCH] D149496: [RISCV][llvm-mca] Add mca tests for riscv lmul instruments
Arthur Eubanks via Phabricator via llvm-commits
- [PATCH] D151126: [AMDGPU] Don't flush vmcnt for loops with use/def pairs
Jay Foad via Phabricator via llvm-commits
- [PATCH] D76354: [RISCV][GlobalISel] Legalize types for ALU operations
Matt Arsenault via Phabricator via llvm-commits
- [PATCH] D142830: [ValueTracking] Improve non-zero tracking of `X` by also searching through `Use(X)` that imply non-zero
Noah Goldstein via Phabricator via llvm-commits
- [PATCH] D151052: [LoopUnroll] Peel iterations based on select, and, or conditions
Joshua Cao via Phabricator via llvm-commits
- [PATCH] D147506: [DebugLine] save one debug line entry for empty prologue
Shoaib Meenai via Phabricator via llvm-commits
- [PATCH] D151141: [CodeGen] Fix crash in CodeGenPrepare::optimizeGatherScatterInst.
Craig Topper via Phabricator via llvm-commits
- [PATCH] D151141: [CodeGen] Fix crash in CodeGenPrepare::optimizeGatherScatterInst.
Craig Topper via Phabricator via llvm-commits
- [llvm] 5734a81 - [RISCV] Increase scalar integer divide latency for SiFive7.
Craig Topper via llvm-commits
- [PATCH] D151139: [RISCV] Increase scalar integer divide latency for SiFive7.
Craig Topper via Phabricator via llvm-commits
- [PATCH] D129848: [RISCV] Add Stackmap/Statepoint/Patchpoint support with targets
Sacha Coppey via Phabricator via llvm-commits
- [PATCH] D150100: [KnownBits] Improve implementation of `KnownBits::abs`
Noah Goldstein via Phabricator via llvm-commits
- [llvm] ae5ff3c - [SLP]Fix PR62665: compiler crash when trying to access non-existing mask
Alexey Bataev via llvm-commits
- [PATCH] D148279: [SLP]Add final resize to ShuffleCostEstimator::finalize member function and basic add member functions.
Alexey Bataev via Phabricator via llvm-commits
- [PATCH] D76354: [RISCV][GlobalISel] Legalize types for ALU operations
Craig Topper via Phabricator via llvm-commits
- [PATCH] D149288: [X86] Introduce a large data threshold for the medium code model
Arthur Eubanks via Phabricator via llvm-commits
- [PATCH] D149288: [X86] Introduce a large data threshold for the medium code model
Arthur Eubanks via Phabricator via llvm-commits
- [PATCH] D151153: [AMDGPU] Add attribute to AMDGPU ctor / dtor to indicate single threadedness
Joseph Huber via Phabricator via llvm-commits
- [PATCH] D150565: [AMDGPU] Add an option to disable manual ctor / dtor lowering
Joseph Huber via Phabricator via llvm-commits
- [PATCH] D150510: [ELF] x86-64: place .lrodata, .lbss, and .ldata away from code sections
Fangrui Song via Phabricator via llvm-commits
- [PATCH] D150510: [ELF] x86-64: place .lrodata, .lbss, and .ldata away from code sections
Fangrui Song via Phabricator via llvm-commits
- [PATCH] D147544: [BOLT] Move from RuntimeDyld to JITLink
Rafael Auler via Phabricator via llvm-commits
- [PATCH] D147900: [ValueTracking] Use `select` condition to help determine if `select` is non-zero
Nikita Popov via Phabricator via llvm-commits
- [PATCH] D151153: [AMDGPU] Add attribute to AMDGPU ctor / dtor to indicate single threadedness
Matt Arsenault via Phabricator via llvm-commits
- [PATCH] D147899: [ValueTracking] Add tests for using condition in select for non-zero analysis; NFC
Nikita Popov via Phabricator via llvm-commits
- [PATCH] D76354: [RISCV][GlobalISel] Legalize types for ALU operations
Craig Topper via Phabricator via llvm-commits
- [PATCH] D150510: [ELF] x86-64: place .lrodata, .lbss, and .ldata away from code sections
Fangrui Song via Phabricator via llvm-commits
- [PATCH] D150666: [WIP][GlobalISel] Combiner Intrinsic Matching
Matt Arsenault via Phabricator via llvm-commits
- [PATCH] D151153: [AMDGPU] Add attribute to AMDGPU ctor / dtor to indicate single threadedness
Joseph Huber via Phabricator via llvm-commits
- [PATCH] D76354: [RISCV][GlobalISel] Legalize types for ALU operations
Craig Topper via Phabricator via llvm-commits
- [PATCH] D150864: [AggressiveInstCombine] Handle the nested GEP/BitCast scenario in Load Merge.
Biplob Mishra via Phabricator via llvm-commits
- [PATCH] D148192: [JITLink][ELF][PPC64] Add skeleton ppc64 support and ELF/ppc64 JITLink backend.
Nathaniel McVicar via Phabricator via llvm-commits
- [PATCH] D151141: [CodeGen] Fix crash in CodeGenPrepare::optimizeGatherScatterInst.
Joshua Cranmer via Phabricator via llvm-commits
- [PATCH] D76354: [RISCV][GlobalISel] Legalize types for ALU operations
Matt Arsenault via Phabricator via llvm-commits
- [PATCH] D151153: [AMDGPU] Add attribute to AMDGPU ctor / dtor to indicate single threadedness
Matt Arsenault via Phabricator via llvm-commits
- [PATCH] D151153: [AMDGPU] Add attribute to AMDGPU ctor / dtor to indicate single threadedness
Joseph Huber via Phabricator via llvm-commits
- [PATCH] D150990: [split-file] Add flags to support comments and adding extension to output files
Aaron Ballman via Phabricator via llvm-commits
- [PATCH] D147899: [ValueTracking] Add tests for using condition in select for non-zero analysis; NFC
Noah Goldstein via Phabricator via llvm-commits
- [PATCH] D151156: [WIP][libc++] Support on-the-fly generated tests
Louis Dionne via Phabricator via llvm-commits
- [PATCH] D151156: [WIP][libc++] Support on-the-fly generated tests
Louis Dionne via Phabricator via llvm-commits
- [llvm] d54ad0b - [llvm-vscode] update dependencies
Yuanfang Chen via llvm-commits
- [PATCH] D151156: [WIP][libc++] Support on-the-fly generated tests
Aaron Ballman via Phabricator via llvm-commits
- [PATCH] D76354: [RISCV][GlobalISel] Legalize types for ALU operations
Craig Topper via Phabricator via llvm-commits
- [llvm] ca1b994 - [DebugInfo][NFCI] Add unittest for DWARFAbbreviationDeclarationSet
Alex Langford via llvm-commits
- [PATCH] D151001: [DebugInfo][NFCI] Add unittest for DWARFAbbreviationDeclarationSet
Alex Langford via Phabricator via llvm-commits
- [PATCH] D123803: [WIP][llvm] A Unified LTO Bitcode Frontend
Matthew Voss via Phabricator via llvm-commits
- [PATCH] D151163: ValueTracking: Ignore -0 for nsz sqrt with UseInstrInfo in computeKnownFPClass
Matt Arsenault via Phabricator via llvm-commits
- [PATCH] D151009: [NVPTX] add new sm90-specific intrinsics.
Artem Belevich via Phabricator via llvm-commits
- [PATCH] D151165: [ThinLTO] Make the cache key independent of the module identifier paths
Argyrios Kyrtzidis via Phabricator via llvm-commits
- [PATCH] D151009: [NVPTX] add new sm90-specific intrinsics.
Artem Belevich via Phabricator via llvm-commits
- [PATCH] D150388: [CodeGen]Allow targets to use target specific COPY instructions for live range splitting
Simon Dardis via Phabricator via llvm-commits
- [PATCH] D151156: [WIP][libc++] Support on-the-fly generated tests
Nikolas Klauser via Phabricator via llvm-commits
- [PATCH] D150841: [IR] Make stack protector symbol dso_local according to -f[no-]direct-access-external-data
Nick Desaulniers via Phabricator via llvm-commits
- [PATCH] D123803: [WIP][llvm] A Unified LTO Bitcode Frontend
Mehdi AMINI via Phabricator via llvm-commits
- [PATCH] D147899: [ValueTracking] Add tests for using condition in select for non-zero analysis; NFC
Noah Goldstein via Phabricator via llvm-commits
- [PATCH] D147900: [ValueTracking] Use `select` condition to help determine if `select` is non-zero
Noah Goldstein via Phabricator via llvm-commits
- [PATCH] D150782: [NFC][Py Reformat] Reformat python files in mlir subdir
Mehdi AMINI via Phabricator via llvm-commits
- [PATCH] D151165: [ThinLTO] Make the cache key independent of the module identifier paths
Steven Wu via Phabricator via llvm-commits
- [PATCH] D143463: [X86] Use the CFA when appropriate for better variable locations around calls.
Scott Linder via Phabricator via llvm-commits
- [PATCH] D151170: [StandardInstrumentations] Add option to dump IR to a file on crash
Arthur Eubanks via Phabricator via llvm-commits
- [PATCH] D150878: Add StringRef::consumeInteger(APInt)
David Blaikie via Phabricator via llvm-commits
- [llvm] 01c5ec3 - [NFC] Surface the validation of FunctionPropertiesAnalysis
Mircea Trofin via llvm-commits
- [PATCH] D150827: [NFC] Surface the validation of FunctionPropertiesAnalysis
Mircea Trofin via Phabricator via llvm-commits
- [PATCH] D151141: [CodeGen] Fix crash in CodeGenPrepare::optimizeGatherScatterInst.
Craig Topper via Phabricator via llvm-commits
- [PATCH] D74977: [RISCV][GlobalISel] Add lowerFormalArguments for calling convention
Craig Topper via Phabricator via llvm-commits
- [PATCH] D151125: [WebAssembly] Undef invalid DBG_VALUEs after RegColoring
Derek Schuff via Phabricator via llvm-commits
- [llvm] c1fe147 - [llvm-mca] Print InstructionInfoView using Instrument information.
Michael Maitland via llvm-commits
- [PATCH] D150459: [llvm-mca] Print InstructionInfoView using Instrument information.
Michael Maitland via Phabricator via llvm-commits
- [compiler-rt] 000aeb2 - [hwasan] Fix build breakage (-Wunused-function) in hwasan_interceptors.cpp (NFC)
David Blaikie via llvm-commits
- [PATCH] D144500: [BOLT] initial version of stale profile matching
Maksim Panchenko via Phabricator via llvm-commits
- [PATCH] D151165: [ThinLTO] Make the cache key independent of the module identifier paths
Argyrios Kyrtzidis via Phabricator via llvm-commits
- [PATCH] D151125: [WebAssembly] Undef invalid DBG_VALUEs after RegColoring
Heejin Ahn via Phabricator via llvm-commits
- [PATCH] D151125: [WebAssembly] Undef invalid DBG_VALUEs after RegColoring
Heejin Ahn via Phabricator via llvm-commits
- [PATCH] D149496: [RISCV][llvm-mca] Add mca tests for riscv lmul instruments
Nico Weber via Phabricator via llvm-commits
- [llvm] 1d8820c - [gn] port 98e342dca2372 (RISCV MCA)
Nico Weber via llvm-commits
- [PATCH] D151127: [RISCV] Add more cost model tests for fixed vector casts. NFC
Yeting Kuo via Phabricator via llvm-commits
- [PATCH] D147506: [DebugLine] save one debug line entry for empty prologue
David Blaikie via Phabricator via llvm-commits
- [llvm] 4e4edd6 - [gn build] Port 8313507a7c3f
LLVM GN Syncbot via llvm-commits
- [llvm] 3f9276e - [gn build] Port ca1b9943e1e4
LLVM GN Syncbot via llvm-commits
- [PATCH] D147506: [DebugLine] save one debug line entry for empty prologue
Shoaib Meenai via Phabricator via llvm-commits
- [PATCH] D143984: [DebugMetadata] Simplify handling subprogram's retainedNodes field. NFCI (1/7)
David Blaikie via Phabricator via llvm-commits
- [PATCH] D149942: [IR] Drop const in DILocation::getMergedLocation
David Blaikie via Phabricator via llvm-commits
- [PATCH] D151156: [WIP][libc++] Support on-the-fly generated tests
Louis Dionne via Phabricator via llvm-commits
- [llvm] fa2827f - [CodeGen] Fix incorrect usage of MCPhysReg for diff list elements
Sergei Barannikov via llvm-commits
- [PATCH] D151036: [CodeGen] Fix incorrect usage of MCPhysReg for diff list elements
Sergei Barannikov via Phabricator via llvm-commits
- [PATCH] D151036: [CodeGen] Fix incorrect usage of MCPhysReg for diff list elements
Sergei Barannikov via Phabricator via llvm-commits
- [PATCH] D149743: [RISCV][CodeGen] Support Zdinx on RV32 codegen
Shao-Ce SUN via Phabricator via llvm-commits
- [PATCH] D150936: [Statepoints] Support for compressed pointers in the statepoint emission pass
Artur Pilipenko via Phabricator via llvm-commits
- [PATCH] D150929: [RISCV][BF16] Enable __bf16 for riscv targets
Jun Sha via Phabricator via llvm-commits
- [PATCH] D143739: [WinEH] Ignore dynamic allocas of catch objects
Zhang via Phabricator via llvm-commits
- [PATCH] D150929: [RISCV][BF16] Enable __bf16 for riscv targets
Jun Sha via Phabricator via llvm-commits
- [llvm] 4faf3aa - Revert "[CodeGen] Fix incorrect usage of MCPhysReg for diff list elements"
Sergei Barannikov via llvm-commits
- [PATCH] D151036: [CodeGen] Fix incorrect usage of MCPhysReg for diff list elements
Sergei Barannikov via Phabricator via llvm-commits
- [PATCH] D147066: [DWARFLinker][DWARFv5] Add handling of DW_OP_addrx and DW_OP_constx expression operands.
Mike Hommey via Phabricator via llvm-commits
- [PATCH] D151082: [GuardUtils] Allow intermmediate blocks between widenable branch and deopt block
Artur Pilipenko via Phabricator via llvm-commits
- [llvm] acd84fb - [RISCV] Add more cost model tests for fixed vector casts. NFC
Craig Topper via llvm-commits
- [PATCH] D151127: [RISCV] Add more cost model tests for fixed vector casts. NFC
Craig Topper via Phabricator via llvm-commits
- [PATCH] D149747: [InlineCost] Consider branches with !make.implicit metadata as free.
Artur Pilipenko via Phabricator via llvm-commits
- [PATCH] D143739: [WinEH] Ignore dynamic allocas of catch objects
Reid Kleckner via Phabricator via llvm-commits
- [PATCH] D149016: [TableGen] Unify the priority of variables
Wang Pengcheng via Phabricator via llvm-commits
- [PATCH] D151132: [RISCV] Add scalable vector cast cost model tests. NFC
Yeting Kuo via Phabricator via llvm-commits
- [PATCH] D151176: [RISCV] Custom lower fixed-length vector llvm.is.fpclass to vfclass.v
Liao Chunyu via Phabricator via llvm-commits
- [PATCH] D151176: [RISCV] Custom lower fixed-length vector llvm.is.fpclass to vfclass.v
Liao Chunyu via Phabricator via llvm-commits
- [llvm] 61bc3ad - [test] precommit tests for D141188
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- [PATCH] D149166: [RISCV] Try to perform select => binop combines when conditional operations are available
Craig Topper via Phabricator via llvm-commits
- [PATCH] D151091: [test] precommit tests for D141188
Allen zhong via Phabricator via llvm-commits
- [PATCH] D151177: [RISCV] Add i32 as a legal type for GPR register class.
Craig Topper via Phabricator via llvm-commits
- [PATCH] D151178: [RISCV][NFC] Simplify code.
Jianjian Guan via Phabricator via llvm-commits
- [PATCH] D151179: [CodeGenPrepare][NFC] Replace GEP's offset computation with collectOffset
luxufan via Phabricator via llvm-commits
- [PATCH] D151036: [CodeGen] Fix incorrect usage of MCPhysReg for diff list elements
Sergei Barannikov via Phabricator via llvm-commits
- [PATCH] D141188: [MergeICmps] Adapt to non-eq comparisons
Allen zhong via Phabricator via llvm-commits
- [PATCH] D151052: [LoopUnroll] Peel iterations based on select conditions
Joshua Cao via Phabricator via llvm-commits
- [llvm] bacb45e - [ThinLTO] Make the cache key independent of the module identifier paths
Argyrios Kyrtzidis via llvm-commits
- [PATCH] D151165: [ThinLTO] Make the cache key independent of the module identifier paths
Argyrios Kyrtzidis via Phabricator via llvm-commits
- [PATCH] D149428: [BBUtils][NFC] Delete SplitBlockAndInsertIfThen with DT.
Joshua Cao via Phabricator via llvm-commits
- [PATCH] D148780: [BBUtils][NFC] Delete SplitLandingPadPredecessors with DT
Joshua Cao via Phabricator via llvm-commits
- [compiler-rt] 000aeb2 - [hwasan] Fix build breakage (-Wunused-function) in hwasan_interceptors.cpp (NFC)
Vitaly Buka via llvm-commits
- [PATCH] D148001: [LICM] Reassociate & hoist sub expressions
Max Kazantsev via Phabricator via llvm-commits
- [PATCH] D150133: [RISCV] Support constant immediate for la pseudo instruction
garvit gupta via Phabricator via llvm-commits
- [PATCH] D150133: [RISCV] Support constant immediate for la pseudo instruction
garvit gupta via Phabricator via llvm-commits
- [PATCH] D150535: [IR][TRE] Support associative intrinsics
Joshua Cao via Phabricator via llvm-commits
- [PATCH] D123515: [RISCV] Support '.option arch' directive
luxufan via Phabricator via llvm-commits
- [PATCH] D123515: [RISCV] Support '.option arch' directive
luxufan via Phabricator via llvm-commits
- [PATCH] D146872: [1/11][IR] Permit load/store/alloca for struct of the same scalable vector type
Yueh-Ting (eop) Chen via Phabricator via llvm-commits
- [PATCH] D150133: [RISCV] Support constant immediate for la pseudo instruction
garvit gupta via Phabricator via llvm-commits
- [PATCH] D150427: [AMDGPU] Non hostcall printf support for HIP
Sameer Sahasrabuddhe via Phabricator via llvm-commits
- [PATCH] D149942: [IR] Drop const in DILocation::getMergedLocation
Christian Ulmann via Phabricator via llvm-commits
- [PATCH] D149715: IR: Add llvm.frexp intrinsic
Serge Pavlov via Phabricator via llvm-commits
- [PATCH] D150447: [MachineSink] Don't reject sinking because of a dead def in isProfitableToSinkTo()
Jonas Paulsson via Phabricator via llvm-commits
- [PATCH] D151178: [RISCV][NFC] Simplify code.
Craig Topper via Phabricator via llvm-commits
- [PATCH] D123515: [RISCV] Support '.option arch' directive
luxufan via Phabricator via llvm-commits
- [PATCH] D143739: [WinEH] Ignore dynamic allocas of catch objects
Zhang via Phabricator via llvm-commits
- [PATCH] D123515: [RISCV] Support '.option arch' directive
luxufan via Phabricator via llvm-commits
- [PATCH] D151176: [RISCV] Custom lower fixed-length vector llvm.is.fpclass to vfclass.v
Craig Topper via Phabricator via llvm-commits
- [PATCH] D151176: [RISCV] Custom lower fixed-length vector llvm.is.fpclass to vfclass.v
Craig Topper via Phabricator via llvm-commits
- [llvm] 53064c5 - [BPF] Remove unused declaration probeJmpExt
Kazu Hirata via llvm-commits
- [PATCH] D151176: [RISCV] Custom lower fixed-length vector llvm.is.fpclass to vfclass.v
Craig Topper via Phabricator via llvm-commits
- [PATCH] D123515: [RISCV] Support '.option arch' directive
Craig Topper via Phabricator via llvm-commits
- [PATCH] D151180: [RISCV] select(C0, x, select(C1, x, y)) -> select(C0|C1, x, y)
Liao Chunyu via Phabricator via llvm-commits
- [PATCH] D123515: [RISCV] Support '.option arch' directive
Craig Topper via Phabricator via llvm-commits
- [PATCH] D150784: [NFC][Py Reformat] Reformat python files in the rest of the dirs
Tobias Hieta via Phabricator via llvm-commits
- [llvm] c6d3347 - [RISCV][NFC] Simplify code.
Jianjian GUAN via llvm-commits
- [PATCH] D151178: [RISCV][NFC] Simplify code.
Jianjian Guan via Phabricator via llvm-commits
- [PATCH] D150763: [NFC][Py Reformat] Reformat python files in libcxx/libcxxabi
Tobias Hieta via Phabricator via llvm-commits
- [PATCH] D151180: [RISCV] select(C0, x, select(C1, x, y)) -> select(C0|C1, x, y)
Jessica Clarke via Phabricator via llvm-commits
- [PATCH] D150763: [NFC][Py Reformat] Reformat python files in libcxx/libcxxabi
Tobias Hieta via Phabricator via llvm-commits
- [PATCH] D151180: [RISCV] select(C0, x, select(C1, x, y)) -> select(C0|C1, x, y)
Jessica Clarke via Phabricator via llvm-commits
- [PATCH] D150782: [NFC][Py Reformat] Reformat python files in mlir subdir
Tobias Hieta via Phabricator via llvm-commits
- [PATCH] D151180: [RISCV] select(C0, x, select(C1, x, y)) -> select(C0|C1, x, y)
Craig Topper via Phabricator via llvm-commits
- [PATCH] D151181: [Mips] Remove isMoveReg=1 from wrdsp and rddsp instructions
Yashwant Singh via Phabricator via llvm-commits
- [llvm] f104eb6 - [AMDGPU] Reintroduce CC exception for non-inlined functions in Promote Alloca limits
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- [PATCH] D150551: [AMDGPU] Reintroduce CC exception for non-inlined functions in Promote Alloca limits
Pierre van Houtryve via Phabricator via llvm-commits
- [PATCH] D150388: [CodeGen]Allow targets to use target specific COPY instructions for live range splitting
Yashwant Singh via Phabricator via llvm-commits
- [PATCH] D151180: [RISCV] select(C0, x, select(C1, x, y)) -> select(C0|C1, x, y)
Craig Topper via Phabricator via llvm-commits
- [PATCH] D150784: [NFC][Py Reformat] Reformat python files in the rest of the dirs
James Henderson via Phabricator via llvm-commits
- [PATCH] D151182: [LegalizeTypes][ARM][AArch6][RISCV][VE][WebAssembly] Add special case for smin(X, -1) and smax(X, 0) to ExpandIntRes_MINMAX.
Craig Topper via Phabricator via llvm-commits
- [PATCH] D151180: [RISCV] select(C0, x, select(C1, x, y)) -> select(C0|C1, x, y)
Craig Topper via Phabricator via llvm-commits
- [PATCH] D150784: [NFC][Py Reformat] Reformat python files in the rest of the dirs
Siva Chandra via Phabricator via llvm-commits
- [PATCH] D147899: [ValueTracking] Add tests for using condition in select for non-zero analysis; NFC
Nikita Popov via Phabricator via llvm-commits
- [PATCH] D149943: [hwasan] support hwasan-match-all-tag flag for hwasan meminstrinsic calls
Mingjie Xu via Phabricator via llvm-commits
- [PATCH] D151001: [DebugInfo][NFCI] Add unittest for DWARFAbbreviationDeclarationSet
James Henderson via Phabricator via llvm-commits
- [PATCH] D150797: Turn unreachable error into assert
James Henderson via Phabricator via llvm-commits
- [PATCH] D147544: [BOLT] Move from RuntimeDyld to JITLink
Job Noorman via Phabricator via llvm-commits
- [PATCH] D151184: [AArch64] Adjust costs of i1 and/or/xor reductions
Dave Green via Phabricator via llvm-commits
- [llvm] 2f5a116 - AMDGPU: Expand casted f16 fmed3 pattern to fmin/fmax on gfx8
Matt Arsenault via llvm-commits
- [llvm] 1e34a17 - Reapply "InstSimplify: Use isKnownNeverInfOrNaN"
Matt Arsenault via llvm-commits
- [llvm] 81ca787 - Reapply "ValueTracking: Delete body of isKnownNeverInfinity"
Matt Arsenault via llvm-commits
- [PATCH] D150427: [AMDGPU] Non hostcall printf support for HIP
Vikram Hegde via Phabricator via llvm-commits
- [llvm] 591ba11 - Reapply "SimplifyLibCalls: Pass AssumptionCache to isKnownNeverInfinity"
Matt Arsenault via llvm-commits
- [llvm] 4023ca1 - Reapply "InstSimplify: Pass AssumptionCache to isKnownNeverInfinity"
Matt Arsenault via llvm-commits
- [PATCH] D150612: AMDGPU: Expand casted f16 fmed3 pattern to fmin/fmax on gfx8
Matt Arsenault via Phabricator via llvm-commits
- [PATCH] D150560: [AArch64] Avoid RegScavenger::forward in AArch64SpeculationHardening
Matt Arsenault via Phabricator via llvm-commits
- [PATCH] D150666: [WIP][GlobalISel] Combiner Intrinsic Matching
Pierre van Houtryve via Phabricator via llvm-commits
- [PATCH] D150782: [NFC][Py Reformat] Reformat python files in mlir subdir
Alex Zinenko via Phabricator via llvm-commits
- [PATCH] D151187: [doc] Add casting style preference to coding standards
James Henderson via Phabricator via llvm-commits
- [PATCH] D151188: [lld] Find resource and lib dir
Tobias Hieta via Phabricator via llvm-commits
- [PATCH] D150560: [AArch64] Avoid RegScavenger::forward in AArch64SpeculationHardening
Sergei Barannikov via Phabricator via llvm-commits
- [PATCH] D151189: [AArch64] Increase the cost of i1 inserts / extracts
Dave Green via Phabricator via llvm-commits
- [PATCH] D151187: [doc] Add casting style preference to coding standards
Thorsten via Phabricator via llvm-commits
- [llvm] de45ab3 - AMDGPU/GlobalISel: Update test
Matt Arsenault via llvm-commits
- [PATCH] D151188: [lld] Find resource and lib dir
Tobias Hieta via Phabricator via llvm-commits
- [PATCH] D150612: AMDGPU: Expand casted f16 fmed3 pattern to fmin/fmax on gfx8
Jay Foad via Phabricator via llvm-commits
- [PATCH] D150427: [AMDGPU] Non hostcall printf support for HIP
Matt Arsenault via Phabricator via llvm-commits
- [PATCH] D150936: [Statepoints] Support for compressed pointers in the statepoint emission pass
Loïc Ottet via Phabricator via llvm-commits
- [PATCH] D151189: [AArch64] Increase the cost of i1 inserts / extracts
Sjoerd Meijer via Phabricator via llvm-commits
- [PATCH] D151144: [lld][ELF] Do not emit warning for NOLOAD output sections
Peter Smith via Phabricator via llvm-commits
- [PATCH] D146903: [SimplifyCFG] add nsw on SwitchToLookupTable Index calculation
Kohei Asano via Phabricator via llvm-commits
- [PATCH] D151191: [llvm][github] Allow github links in /cherry-pick actions
Timm Bäder via Phabricator via llvm-commits
- [PATCH] D151184: [AArch64] Adjust costs of i1 and/or/xor reductions
David Sherwood via Phabricator via llvm-commits
- [PATCH] D151188: [lld] Find resource and lib dir
Martin Storsjö via Phabricator via llvm-commits
- [PATCH] D150252: [libunwind][CMake] Add cached compile and link flags to libunwind
Maciej Grzywacz via Phabricator via llvm-commits
- [PATCH] D150559: [AArch64] Add implicit uses to speculative hardening MIR test
Jay Foad via Phabricator via llvm-commits
- [llvm] 47d30de - [AArch64] Add implicit uses to speculative hardening MIR test
Jay Foad via llvm-commits
- [llvm] 910af0e - [AArch64] Avoid RegScavenger::forward in AArch64SpeculationHardening
Jay Foad via llvm-commits
- [PATCH] D150559: [AArch64] Add implicit uses to speculative hardening MIR test
Jay Foad via Phabricator via llvm-commits
- [PATCH] D150560: [AArch64] Avoid RegScavenger::forward in AArch64SpeculationHardening
Jay Foad via Phabricator via llvm-commits
- [PATCH] D151191: [llvm][github] Allow github links in /cherry-pick actions
Tobias Hieta via Phabricator via llvm-commits
- [PATCH] D151191: [llvm][github] Allow github links in /cherry-pick actions
Tobias Hieta via Phabricator via llvm-commits
- [PATCH] D151187: [doc] Add casting style preference to coding standards
James Henderson via Phabricator via llvm-commits
- [PATCH] D149428: [BBUtils][NFC] Delete SplitBlockAndInsertIfThen with DT.
Jay Foad via Phabricator via llvm-commits
- [PATCH] D150990: [split-file] Add flags to support comments and adding extension to output files
Vlad Serebrennikov via Phabricator via llvm-commits
- [PATCH] D151109: [AArch64] add missing prfm-slc disassembly test
Lucas Prates via Phabricator via llvm-commits
- [PATCH] D151188: [lld] Find resource and lib dir
Tobias Hieta via Phabricator via llvm-commits
- [PATCH] D150369: TypeFinder: collect target types
Sebastian Neubauer via Phabricator via llvm-commits
- [PATCH] D150390: [AMDGPU] Introduce and use the new PRED_COPY opcode
Yashwant Singh via Phabricator via llvm-commits
- [PATCH] D150644: [lld][ELF] Implement –print-memory-usage
Petr Hosek via Phabricator via llvm-commits
- [PATCH] D150644: [lld][ELF] Implement –print-memory-usage
Petr Hosek via Phabricator via llvm-commits
- [llvm] 8064caf - [PowerPC] Simplify fp-to-int store optimization
Qiu Chaofan via llvm-commits
- [PATCH] D141473: [PowerPC] Simplify fp-to-int store optimization
Qiu Chaofan via Phabricator via llvm-commits
- [PATCH] D150990: [split-file] Add flags to support comments and adding extension to output files
Vlad Serebrennikov via Phabricator via llvm-commits
- [PATCH] D150768: [SVE ACLE] Canonicalise SVE merging intrinsics
mgabka via Phabricator via llvm-commits
- [PATCH] D150371: TargetExtType: Use a schema-based abbreviation in bitcode
Sebastian Neubauer via Phabricator via llvm-commits
- [llvm] 1362dfe - [SimplifyCFG] add nsw on SwitchToLookupTable index calculation on MinCaseVal subtraction
via llvm-commits
- [PATCH] D146903: [SimplifyCFG] add nsw on SwitchToLookupTable Index calculation
Kohei Asano via Phabricator via llvm-commits
- [PATCH] D42600: [CodeGen][Shrink-wrap]split restore point
Sushant Gokhale via Phabricator via llvm-commits
- [PATCH] D151096: [RISCV] Make zfbfmin imply the F extension
Alex Bradbury via Phabricator via llvm-commits
- [llvm] 033690f - [RISCV] Make zfbfmin imply the F extension
Alex Bradbury via llvm-commits
- [PATCH] D150316: [AArch64][InstCombine] Don't scalarize for bitselet instructions
Dave Green via Phabricator via llvm-commits
- [PATCH] D141249: [PowerPC] Combine fptoint-store under strict cases
Qiu Chaofan via Phabricator via llvm-commits
- [llvm] 7b9013f - [PowerPC] Avoid RegScavenger::forward in PPCFrameLowering
Jay Foad via llvm-commits
- [PATCH] D150558: [PowerPC] Avoid RegScavenger::forward in PPCFrameLowering
Jay Foad via Phabricator via llvm-commits
- [PATCH] D151191: [llvm][github] Allow github links in /cherry-pick actions
Timm Bäder via Phabricator via llvm-commits
- [PATCH] D139732: [AMDGPU] Add pass to rewrite partially used virtual superregisters after RenameIndependentSubregs pass with registers of minimal size.
Matt Arsenault via Phabricator via llvm-commits
- [PATCH] D149345: [Utils] Added the ability to print the pass number and IR after it is triggered
Dmitry Bakunevich via Phabricator via llvm-commits
- [PATCH] D149715: IR: Add llvm.frexp intrinsic
Matt Arsenault via Phabricator via llvm-commits
- [llvm] 0b91de5 - [X86] Add X86FixupVectorConstantsPass to re-fold AVX512 vector load folds as broadcast folds
Simon Pilgrim via llvm-commits
- [PATCH] D150526: [X86] Add X86FixupVectorConstantsPass to re-fold AVX512 vector load folds as broadcast folds
Simon Pilgrim via Phabricator via llvm-commits
- [PATCH] D149715: IR: Add llvm.frexp intrinsic
Matt Arsenault via Phabricator via llvm-commits
- [PATCH] D149715: IR: Add llvm.frexp intrinsic
Matt Arsenault via Phabricator via llvm-commits
- [PATCH] D151196: AMDGPU: Drop FP_ROUND second value check
Matt Arsenault via Phabricator via llvm-commits
- [llvm] 3fc30ae - [gn build] Port 0b91de5ea32d
LLVM GN Syncbot via llvm-commits
- [PATCH] D151187: [doc] Add casting style preference to coding standards
Mehdi AMINI via Phabricator via llvm-commits
- [PATCH] D147544: [BOLT] Move from RuntimeDyld to JITLink
Vladislav Khmelevsky via Phabricator via llvm-commits
- [PATCH] D150427: [AMDGPU] Non hostcall printf support for HIP
Matt Arsenault via Phabricator via llvm-commits
- [PATCH] D150100: [KnownBits] Improve implementation of `KnownBits::abs`
Jay Foad via Phabricator via llvm-commits
- [PATCH] D150179: [GlobalISel] Hide hoisted constants behind G_BITCAST to prevent folding.
Matt Arsenault via Phabricator via llvm-commits
- [PATCH] D143515: [AsmPrinter] Add hook to override constant folding for printing.
Matt Arsenault via Phabricator via llvm-commits
- [PATCH] D150557: [Mips] Avoid RegScavenger::forward in Mips16InstrInfo
Jay Foad via Phabricator via llvm-commits
- [llvm] 48a1db6 - [Mips] Avoid RegScavenger::forward in Mips16InstrInfo
Jay Foad via llvm-commits
- [PATCH] D149916: [VP][SelectionDAG][RISCV] Add get_vector_length intrinsics and generic SelectionDAG support.
Roger Ferrer Ibanez via Phabricator via llvm-commits
- [PATCH] D148957: [AMDGPU] Add intrinsic for converting global pointers to resources
Matt Arsenault via Phabricator via llvm-commits
- [llvm] 405932a - [llvm][github] Allow github links in /cherry-pick actions
Timm Bäder via llvm-commits
- [PATCH] D151191: [llvm][github] Allow github links in /cherry-pick actions
Timm Bäder via Phabricator via llvm-commits
- [PATCH] D151163: ValueTracking: Ignore -0 for nsz sqrt with UseInstrInfo in computeKnownFPClass
Jay Foad via Phabricator via llvm-commits
- [PATCH] D151187: [doc] Add casting style preference to coding standards
Sergei Barannikov via Phabricator via llvm-commits
- [llvm] f2a6a97 - Fix MSVC "ignoring return value of function declared with 'nodiscard' attribute" warning. NFC.
Simon Pilgrim via llvm-commits
- [PATCH] D151163: ValueTracking: Ignore -0 for nsz sqrt with UseInstrInfo in computeKnownFPClass
Matt Arsenault via Phabricator via llvm-commits
- [PATCH] D150758: [AIX] make integrated-as as default on AIX.
Esme Yi via Phabricator via llvm-commits
- [PATCH] D151198: [llvm][ADT] Fix invlid `reference` type of depth-first, breadth-first and post order iterators
Markus Böck via Phabricator via llvm-commits
- [PATCH] D151163: ValueTracking: Ignore -0 for nsz sqrt with UseInstrInfo in computeKnownFPClass
Matt Arsenault via Phabricator via llvm-commits
- [PATCH] D149444: [ARM] Allow codegen for Armv6m eXecute-Only (XO) sections
Ties Stuij via Phabricator via llvm-commits
- [PATCH] D149345: [Utils] Added the ability to print the pass number and IR after it is triggered
Dmitry Bakunevich via Phabricator via llvm-commits
- [PATCH] D149345: [Utils] Added the ability to print the pass number and IR after it is triggered
Dmitry Bakunevich via Phabricator via llvm-commits
- [PATCH] D151187: [doc] Add casting style preference to coding standards
James Henderson via Phabricator via llvm-commits
- [PATCH] D149715: IR: Add llvm.frexp intrinsic
Sergei Barannikov via Phabricator via llvm-commits
- [PATCH] D151187: [doc] Add casting style preference to coding standards
James Henderson via Phabricator via llvm-commits
- [PATCH] D151187: [doc] Add casting style preference to coding standards
Mehdi AMINI via Phabricator via llvm-commits
- [llvm] 09011c4 - [Coverity] Constant variable guards dead code.
via llvm-commits
- [PATCH] D151170: [StandardInstrumentations] Add option to dump IR to a file on crash
Hans Wennborg via Phabricator via llvm-commits
- [llvm] cbc2a06 - [lli] Export the MinGW chkstk function from the lli executable
Martin Storsjö via llvm-commits
- [PATCH] D150555: [lli] Export the MinGW chkstk function from the lli executable
Martin Storsjö via Phabricator via llvm-commits
- [llvm] 7e469c1 - [gn build] Port 5111286f06e1
LLVM GN Syncbot via llvm-commits
- [PATCH] D151187: [doc] Add casting style preference to coding standards
Thorsten via Phabricator via llvm-commits
- [PATCH] D150029: [VPlan] Print IR flags for VPRecipeWithIRFlags.
Ayal Zaks via Phabricator via llvm-commits
- [PATCH] D149281: Not disable loop unroll for vectorized loops on AMDGPU target
Alexander via Phabricator via llvm-commits
- [PATCH] D151187: [doc] Add casting style preference to coding standards
Mehdi AMINI via Phabricator via llvm-commits
- [PATCH] D151187: [doc] Add casting style preference to coding standards
Nicolai Hähnle via Phabricator via llvm-commits
- [PATCH] D151187: [doc] Add casting style preference to coding standards
Sergei Barannikov via Phabricator via llvm-commits
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Nikita Popov via llvm-commits
- [PATCH] D150648: [KnownBits] Return zero instead of unknown for always poison shifts
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Nikita Popov via llvm-commits
- [PATCH] D150878: Add StringRef::consumeInteger(APInt)
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- [PATCH] D150648: [KnownBits] Return zero instead of unknown for always poison shifts
Jay Foad via Phabricator via llvm-commits
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- [llvm] f7d1baa - [KnownBits] Return zero instead of unknown for always poison shifts
Nikita Popov via llvm-commits
- [PATCH] D150648: [KnownBits] Return zero instead of unknown for always poison shifts
Nikita Popov via Phabricator via llvm-commits
- [PATCH] D150384: [CodeGenPrepare] Fix for using outdated/corrupt LoopInfo
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Krasimir Georgiev via llvm-commits
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Thomas Preud'homme via llvm-commits
- [PATCH] D150797: Turn unreachable error into assert
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Alexander via Phabricator via llvm-commits
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Dinar Temirbulatov via llvm-commits
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Thomas Preud'homme via llvm-commits
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Dinar Temirbulatov via llvm-commits
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Aaron Ballman via llvm-commits
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Alexey Bataev via Phabricator via llvm-commits
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Nikita Popov via llvm-commits
- [PATCH] D149715: IR: Add llvm.frexp intrinsic
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Yaxun Liu via Phabricator via llvm-commits
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- [compiler-rt] 39ccd57 - [ubsan][test] Remove --check-prefix=UNIQUE for x86_64-apple from e215996a2932ed7c472f4e94dc4345b30fd0c373
Fangrui Song via llvm-commits
- [PATCH] D149947: [MachineVerifier] Verify liveins for live-through segments
Jay Foad via Phabricator via llvm-commits
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Alexandros Lamprineas via Phabricator via llvm-commits
- [llvm] 4a1236e - [AMDGPU] Add an option to disable manual ctor / dtor lowering
Joseph Huber via llvm-commits
- [PATCH] D150565: [AMDGPU] Add an option to disable manual ctor / dtor lowering
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Jay Foad via Phabricator via llvm-commits
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Phoebe Wang via Phabricator via llvm-commits
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Phoebe Wang via Phabricator via llvm-commits
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Luke Lau via Phabricator via llvm-commits
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Philip Reames via Phabricator via llvm-commits
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- [llvm] 0891575 - [InstCombine] Fix worklist management in replaceGEPIdxWithZero() fold (NFCI)
Nikita Popov via llvm-commits
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Nikita Popov via llvm-commits
- [PATCH] D151198: [llvm][ADT] Fix invalid `reference` type of depth-first, breadth-first and post order iterators
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Elliot Goodrich via Phabricator via llvm-commits
- [llvm] 2938f9b - [InstCombine] Fix worklist management in select value equiv fold (NFCI)
Nikita Popov via llvm-commits
- [PATCH] D150997: [llvm] Split out DenseMapInfo<variant> specialization
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- [PATCH] D139010: [clang][WebAssembly] Implement support for table types and builtins
Paulo Matos via Phabricator via llvm-commits
- [PATCH] D149495: [RISCV] Add support for V extension in SiFive7
Michael Maitland via Phabricator via llvm-commits
- [llvm] 34c7f2a - [Hexagon] Fix safety check in moving instructions in HVC::AlignVectors
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- [PATCH] D139010: [clang][WebAssembly] Implement support for table types and builtins
Paulo Matos via Phabricator via llvm-commits
- [PATCH] D151103: [RISCV] Scalarize small fixed vector copies < XLEN
Luke Lau via Phabricator via llvm-commits
- [PATCH] D123515: [RISCV] Support '.option arch' directive
luxufan via Phabricator via llvm-commits
- [PATCH] D151198: [llvm][ADT] Fix invalid `reference` type of depth-first, breadth-first and post order iterators
Markus Böck via Phabricator via llvm-commits
- [PATCH] D151079: [llvm][ADT] Change isEqual for DenseMapInfo<std::variant<...>>
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- [PATCH] D151079: [llvm][ADT] Change isEqual for DenseMapInfo<std::variant<...>>
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- [PATCH] D151079: [llvm][ADT] Change isEqual for DenseMapInfo<std::variant<...>>
Kadir Cetinkaya via Phabricator via llvm-commits
- [PATCH] D150179: [GlobalISel] Hide hoisted constants behind G_BITCAST to prevent folding.
Amara Emerson via Phabricator via llvm-commits
- [llvm] 18a5bd7 - [InstCombine] Add droppable users back to worklist (NFCI)
Nikita Popov via llvm-commits
- [PATCH] D148558: [CodeGen] Improve handling -Ofast generated code by ComplexDeinterleaving pass
Nicholas Guy via Phabricator via llvm-commits
- [PATCH] D149711: [PowerPC] Remove asserts from the disassembler.
Stefan Pintilie via Phabricator via llvm-commits
- [PATCH] D149711: [PowerPC] Remove asserts from the disassembler.
Stefan Pintilie via Phabricator via llvm-commits
- [PATCH] D145891: [BPF] Generate BTF info using 'btf:type_tag' annotation
Eduard Zingerman via Phabricator via llvm-commits
- [PATCH] D151220: [RISCV] Add test cases for storing small constant vectors
Luke Lau via Phabricator via llvm-commits
- [PATCH] D151221: [RISCV] Scalarize constant stores of fixed vectors up to 32 bits
Luke Lau via Phabricator via llvm-commits
- [PATCH] D151221: [RISCV] Scalarize constant stores of fixed vectors up to 32 bits
Luke Lau via Phabricator via llvm-commits
- [PATCH] D145516: [Inliner] Avoid excessive inlining through devirtualised calls
Jeremy Morse via Phabricator via llvm-commits
- [PATCH] D149742: [SLP]Improve isGatherShuffledEntry by trying per-register shuffle.
Alexey Bataev via Phabricator via llvm-commits
- [PATCH] D151221: [RISCV] Scalarize constant stores of fixed vectors up to 32 bits
Luke Lau via Phabricator via llvm-commits
- [PATCH] D151221: [RISCV] Scalarize constant stores of fixed vectors up to 32 bits
Luke Lau via Phabricator via llvm-commits
- [PATCH] D151198: [llvm][ADT] Fix invalid `reference` type of depth-first, breadth-first and post order iterators
Jakub Kuderski via Phabricator via llvm-commits
- [PATCH] D149353: [IRTranslator][DebugInfo] Handle SwiftAsync Argument attribute
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Peter Smith via Phabricator via llvm-commits
- [PATCH] D151212: [RISCV][InsertVSETVLI] Support constant VLs larger than immediate encoding
Luke Lau via Phabricator via llvm-commits
- [PATCH] D151156: [WIP][libc++] Support on-the-fly generated tests
Aaron Ballman via Phabricator via llvm-commits
- [PATCH] D149775: [AMDGPU] Reserve SGPR pair when long branches are present
Corbin Robeck via Phabricator via llvm-commits
- [PATCH] D150510: [ELF] x86-64: place .lrodata, .lbss, and .ldata away from code sections
James Y Knight via Phabricator via llvm-commits
- [PATCH] D149775: [AMDGPU] Reserve SGPR pair when long branches are present
Corbin Robeck via Phabricator via llvm-commits
- [PATCH] D151103: [RISCV] Scalarize small fixed vector copies < XLEN
Philip Reames via Phabricator via llvm-commits
- [PATCH] D150464: [FuncSpec] Improve the accuracy of the cost model.
Alexandros Lamprineas via Phabricator via llvm-commits
- [PATCH] D151211: [RISCV] Add test for small vector copies
Philip Reames via Phabricator via llvm-commits
- [PATCH] D150613: [SystemZ][z/OS] Implement yaml2obj for GOFF Object File Format
Neumann Hon via Phabricator via llvm-commits
- [PATCH] D151182: [LegalizeTypes][ARM][AArch6][RISCV][VE][WebAssembly] Add special case for smin(X, -1) and smax(X, 0) to ExpandIntRes_MINMAX.
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- [PATCH] D151209: [Verifier] Check catchpad for MSVC_CXX Personality
Reid Kleckner via Phabricator via llvm-commits
- [PATCH] D150100: [KnownBits] Improve implementation of `KnownBits::abs`
Simon Pilgrim via Phabricator via llvm-commits
- [PATCH] D127115: [RFC][DAGCombine] Make sure combined nodes are added back to the worklist in topological order.
Simon Pilgrim via Phabricator via llvm-commits
- [PATCH] D129208: [MachineVerifier] Try harder to verify LiveIntervals
Jay Foad via Phabricator via llvm-commits
- [PATCH] D149893: Rewrite LSV to handle longer chains.
Justin Lebar via Phabricator via llvm-commits
- [PATCH] D149775: [AMDGPU] Reserve SGPR pair when long branches are present
Corbin Robeck via Phabricator via llvm-commits
- [PATCH] D149444: [ARM] Allow codegen for Armv6m eXecute-Only (XO) sections
Ties Stuij via Phabricator via llvm-commits
- [PATCH] D151029: [DAG] Combine insert(shuffle(load), load, 0) into a single load
Simon Pilgrim via Phabricator via llvm-commits
- [PATCH] D148836: [X86] Use "l" prefix for data sections under medium/large code model
Fangrui Song via Phabricator via llvm-commits
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Jun Zhang via Phabricator via llvm-commits
- [PATCH] D151221: [RISCV] Scalarize constant stores of fixed vectors up to 32 bits
Philip Reames via Phabricator via llvm-commits
- [PATCH] D124833: [RISCV] Optimize redundant vsetvli for Vector Mask-Register Logical Instructions.
Zakk Chen via Phabricator via llvm-commits
- [PATCH] D151227: RFC: LiveIntervalCalc: Always split separate components
Jay Foad via Phabricator via llvm-commits
- [llvm] 139392c - [LegalizeTypes][ARM][AArch6][RISCV][VE][WebAssembly] Add special case for smin(X, -1) and smax(X, 0) to ExpandIntRes_MINMAX.
Craig Topper via llvm-commits
- [PATCH] D151182: [LegalizeTypes][ARM][AArch6][RISCV][VE][WebAssembly] Add special case for smin(X, -1) and smax(X, 0) to ExpandIntRes_MINMAX.
Craig Topper via Phabricator via llvm-commits
- [PATCH] D123803: [WIP][llvm] A Unified LTO Bitcode Frontend
Matthew Voss via Phabricator via llvm-commits
- [PATCH] D151227: RFC: LiveIntervalCalc: Always split separate components
Jay Foad via Phabricator via llvm-commits
- [PATCH] D151227: RFC: LiveIntervalCalc: Always split separate components
Jay Foad via Phabricator via llvm-commits
- [PATCH] D72245: [PoC][RISCV][LTO] Pass target-abi via module flag metadata
Zakk Chen via Phabricator via llvm-commits
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- [PATCH] D150841: [IR] Make stack protector symbol dso_local according to -f[no-]direct-access-external-data
Fangrui Song via Phabricator via llvm-commits
- [PATCH] D123515: [RISCV] Support '.option arch' directive
Craig Topper via Phabricator via llvm-commits
- [PATCH] D102582: [RISCV] Report an error when ABI mismatch with target-abi module flag.
Zakk Chen via Phabricator via llvm-commits
- [PATCH] D150841: [IR] Make stack protector symbol dso_local according to -f[no-]direct-access-external-data
Fangrui Song via Phabricator via llvm-commits
- [compiler-rt] 90418dc - [lsan] Invoke hooks on realloc
Jin Xin Ng via llvm-commits
- [PATCH] D149016: [TableGen] Unify the priority of variables
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- [llvm] e018cbf - [IR] Make stack protector symbol dso_local according to -f[no-]direct-access-external-data
Fangrui Song via llvm-commits
- [PATCH] D150841: [IR] Make stack protector symbol dso_local according to -f[no-]direct-access-external-data
Fangrui Song via Phabricator via llvm-commits
- [PATCH] D151208: [KnownBits] Add support for nuw/nsw on shifts
Noah Goldstein via Phabricator via llvm-commits
- [PATCH] D151212: [RISCV][InsertVSETVLI] Support constant VLs larger than immediate encoding
Craig Topper via Phabricator via llvm-commits
- [compiler-rt] c1903ba - [hwasan] Move RunFreeHooks call
Jin Xin Ng via llvm-commits
- [PATCH] D151211: [RISCV] Add test for small vector copies
Luke Lau via Phabricator via llvm-commits
- [PATCH] D151029: [DAG] Combine insert(shuffle(load), load, 0) into a single load
Dave Green via Phabricator via llvm-commits
- [PATCH] D151029: [DAG] Combine insert(shuffle(load), load, 0) into a single load
Dave Green via Phabricator via llvm-commits
- [PATCH] D151233: [DebugInfo] Follow-up to D151001
Alex Langford via Phabricator via llvm-commits
- [PATCH] D151001: [DebugInfo][NFCI] Add unittest for DWARFAbbreviationDeclarationSet
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- [PATCH] D151156: [WIP][libc++] Support on-the-fly generated tests
Mark de Wever via Phabricator via llvm-commits
- [PATCH] D150253: [RISCV] Add Zvfhmin extension.
Michael Maitland via Phabricator via llvm-commits
- [llvm] c88a7a7 - [llvm][ADT] Fix invalid `reference` type of depth-first, breadth-first and post order iterators
Markus Böck via llvm-commits
- [PATCH] D151198: [llvm][ADT] Fix invalid `reference` type of depth-first, breadth-first and post order iterators
Markus Böck via Phabricator via llvm-commits
- [PATCH] D150253: [RISCV] Add Zvfhmin extension.
Michael Maitland via Phabricator via llvm-commits
- [PATCH] D150253: [RISCV] Add Zvfhmin extension.
Craig Topper via Phabricator via llvm-commits
- [PATCH] D149444: [ARM] Allow codegen for Armv6m eXecute-Only (XO) sections
Thorsten via Phabricator via llvm-commits
- [PATCH] D151187: [doc] Add casting style preference to coding standards
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- [PATCH] D151187: [doc] Add casting style preference to coding standards
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- [PATCH] D151187: [doc] Add casting style preference to coding standards
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- [PATCH] D151227: RFC: LiveIntervalCalc: Always split separate components
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- [PATCH] D117318: [RISCV][GlobalISel] Add lowerReturn for calling conv
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- [PATCH] D150963: [AArch64] merge scaled and unscaled zero narrow stores.
Zain Jaffal via Phabricator via llvm-commits
- [compiler-rt] 0e215e0 - Revert "[HWASan] unflake test"
Vitaly Buka via llvm-commits
- [PATCH] D151036: [CodeGen] Fix incorrect usage of MCPhysReg for diff list elements
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- [PATCH] D151036: [CodeGen] Fix incorrect usage of MCPhysReg for diff list elements
Sergei Barannikov via Phabricator via llvm-commits
- [PATCH] D151182: [LegalizeTypes][ARM][AArch6][RISCV][VE][WebAssembly] Add special case for smin(X, -1) and smax(X, 0) to ExpandIntRes_MINMAX.
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- [compiler-rt] d55982a - hwasan: lay groundwork for importing subset of sanitizer_common interceptors [NFC]
Thurston Dang via llvm-commits
- [PATCH] D117318: [RISCV][GlobalISel] Add lowerReturn for calling conv
Nitin John Raj via Phabricator via llvm-commits
- [llvm] 991ecfb - [RISCV][GlobalISel] Add lowerReturn for calling conv
Nitin John Raj via llvm-commits
- [PATCH] D150997: [llvm] Split out DenseMapInfo<variant> specialization
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- [PATCH] D117318: [RISCV][GlobalISel] Add lowerReturn for calling conv
Nitin John Raj via Phabricator via llvm-commits
- [PATCH] D150970: (WIP) [MemCpyOpt]remove memcpy on noalias readonly attributed arguments
Nikita Popov via Phabricator via llvm-commits
- [PATCH] D150991: [LV] Use Legal::isUniform to detect uniform pointers.
Ayal Zaks via Phabricator via llvm-commits
- [llvm] ece2b65 - [gn build] Port f237513cda8e
LLVM GN Syncbot via llvm-commits
- [PATCH] D151144: [lld][ELF] Do not emit warning for NOLOAD output sections
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- [PATCH] D150864: [AggressiveInstCombine] Handle the nested GEP/BitCast scenario in Load Merge.
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- [PATCH] D150100: [KnownBits] Improve implementation of `KnownBits::abs`
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- [llvm] 4fd3401 - [KnownBits] Improve implementation of `KnownBits::abs`
Noah Goldstein via llvm-commits
- [llvm] 1e963b4 - [ValueTracking] Add tests for knownbits of saturating add/sub functions; NFC
Noah Goldstein via llvm-commits
- [PATCH] D150101: [ValueTracking] Add tests for knownbits of saturating add/sub functions; NFC
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- [llvm] 5f50b18 - [KnownBits] Add implementations for saturating add/sub functions
Noah Goldstein via llvm-commits
- [llvm] 8a60814 - [ValueTracking] Use `KnownBits` functions for `computeKnownBits` of saturating add/sub functions
Noah Goldstein via llvm-commits
- [llvm] 530bbc8 - [ValueTracking] Add tests for using condition in select for non-zero analysis; NFC
Noah Goldstein via llvm-commits
- [PATCH] D150102: [KnownBits] Add implementations for saturating add/sub functions
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- [llvm] 2622b2f - [ValueTracking] Use `select` condition to help determine if `select` is non-zero
Noah Goldstein via llvm-commits
- [PATCH] D150103: [ValueTracking] Use `KnownBits` functions for `computeKnownBits` of saturating add/sub functions
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- [PATCH] D147899: [ValueTracking] Add tests for using condition in select for non-zero analysis; NFC
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- [PATCH] D147900: [ValueTracking] Use `select` condition to help determine if `select` is non-zero
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- [llvm] 3ac1cef - [CodeGen] Fix crash in CodeGenPrepare::optimizeGatherScatterInst.
Joshua Cranmer via llvm-commits
- [PATCH] D151141: [CodeGen] Fix crash in CodeGenPrepare::optimizeGatherScatterInst.
Joshua Cranmer via Phabricator via llvm-commits
- [PATCH] D151241: [AMDGPUCodegenPrepare] Add NewPM Support
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- [PATCH] D151187: [doc] Add casting style preference to coding standards
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- [PATCH] D150899: [PowerPC] Add DFP compare instructions.
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- [PATCH] D150899: [PowerPC] Add DFP compare instructions.
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- [PATCH] D151187: [doc] Add casting style preference to coding standards
Thorsten via Phabricator via llvm-commits
- [llvm] 8b17728 - [RISCV] Add scalable vector cast cost model tests. NFC
Craig Topper via llvm-commits
- [PATCH] D151132: [RISCV] Add scalable vector cast cost model tests. NFC
Craig Topper via Phabricator via llvm-commits
- [PATCH] D149281: Don't disable loop unroll for vectorized loops on AMDGPU target
Stanislav Mekhanoshin via Phabricator via llvm-commits
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Eugene Burmako via Phabricator via llvm-commits
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Nikita Popov via Phabricator via llvm-commits
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Florian Hahn via Phabricator via llvm-commits
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- [llvm] 299f0ff - [VPlan] Print IR flags for VPRecipeWithIRFlags.
Florian Hahn via llvm-commits
- [PATCH] D150029: [VPlan] Print IR flags for VPRecipeWithIRFlags.
Florian Hahn via Phabricator via llvm-commits
- [PATCH] D151188: [lld] Find resource and lib dir
Fangrui Song via Phabricator via llvm-commits
- [PATCH] D151242: [MLIR] Update Bazel build to remove references to PybindUtils.cpp
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- [PATCH] D150644: [lld][ELF] Implement –print-memory-usage
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- [PATCH] D150990: [split-file] Add flags to support comments and adding extension to output files
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Nick Desaulniers via Phabricator via llvm-commits
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Martin Storsjö via Phabricator via llvm-commits
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Austin Chang via Phabricator via llvm-commits
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Florian Hahn via Phabricator via llvm-commits
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Teresa Johnson via Phabricator via llvm-commits
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Rahman Lavaee via Phabricator via llvm-commits
- [PATCH] D151188: [lld] Find resource and lib dir
Fangrui Song via Phabricator via llvm-commits
- [llvm] 3be667a - [X86] Use the CFA when appropriate for better variable locations around calls.
Scott Linder via llvm-commits
- [PATCH] D143463: [X86] Use the CFA when appropriate for better variable locations around calls.
Scott Linder via Phabricator via llvm-commits
- [PATCH] D143463: [X86] Use the CFA when appropriate for better variable locations around calls.
Scott Linder via Phabricator via llvm-commits
- [PATCH] D146770: [Propeller] Match debug info filenames from profiles to distinguish internal linkage functions with the same names.
Rahman Lavaee via Phabricator via llvm-commits
- [PATCH] D150253: [RISCV] Add Zvfhmin extension.
Craig Topper via Phabricator via llvm-commits
- [PATCH] D149345: [Utils] Added the ability to print the pass number and IR after it is triggered
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- [llvm] d91f65e - [TableGen] Filter duplicate predicates in PatternToMatch::getPredicateRecords.
Craig Topper via llvm-commits
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David Blaikie via Phabricator via llvm-commits
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- [lld] b9249a6 - [lld][ELF] Do not emit warning for NOLOAD output sections
Leonard Chan via llvm-commits
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Leonard Chan via Phabricator via llvm-commits
- [PATCH] D151254: InstSimplify: Require instruction be parented
Matt Arsenault via Phabricator via llvm-commits
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Arthur Eubanks via Phabricator via llvm-commits
- [PATCH] D148836: [X86] Use "l" prefix for data sections under medium/large code model
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Ayal Zaks via Phabricator via llvm-commits
- [PATCH] D151188: [lld] Find resource and lib dir
Petr Hosek via Phabricator via llvm-commits
- [lld] f38f23b - [lld-macho] Add support for .so file discovery
Keith Smiley via llvm-commits
- [PATCH] D151147: [lld-macho] Add support for .so file discovery
Keith Smiley via Phabricator via llvm-commits
- [PATCH] D150713: [llvm-debuginfo-analyzer] Support both Reference and Type attrs in single DIE
Scott Linder via Phabricator via llvm-commits
- [llvm] 7f033d0 - [llvm-debuginfo-analyzer] Support both Reference and Type attrs in single DIE
Scott Linder via llvm-commits
- [PATCH] D151220: [RISCV] Add test cases for storing small constant vectors
Craig Topper via Phabricator via llvm-commits
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- [PATCH] D151188: [lld] Find resource and lib dir
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- [PATCH] D149711: [PowerPC] Remove asserts from the disassembler.
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- [PATCH] D150396: [InlineCost] Check for conflicting target attributes early
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- [PATCH] D151241: [AMDGPUCodegenPrepare] Add NewPM Support
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- [PATCH] D150464: [FuncSpec] Improve the accuracy of the cost model.
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- [PATCH] D150649: [FuncSpec] Enable specialization of literal constants.
Alexandros Lamprineas via Phabricator via llvm-commits
- [PATCH] D151187: [doc] Add casting style preference to coding standards
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- [PATCH] D151260: [Demangle] avoid more std::string_view::substr
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- [PATCH] D151263: [RISCV] Expand rotate by non-constant for XTHeadBb during lowering.
Craig Topper via Phabricator via llvm-commits
- [PATCH] D150253: [RISCV] Add Zvfhmin extension.
Michael Maitland via Phabricator via llvm-commits
- [PATCH] D150253: [RISCV] Add Zvfhmin extension.
Michael Maitland via Phabricator via llvm-commits
- [PATCH] D151131: [bazel] Add clang-offload-packager and clang-linker-wrapper
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- [llvm] 775258d - Add support for salvaging debug info from icmp instrcuctions.
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- [PATCH] D151263: [RISCV] Expand rotate by non-constant for XTHeadBb during lowering.
Philipp Tomsich via Phabricator via llvm-commits
- [PATCH] D149345: [Utils] Added the ability to print the pass number and IR after it is triggered
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- [PATCH] D151233: [DebugInfo] Follow-up to D151001
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- [llvm] 1f7c174 - [RISCV] Expand rotate by non-constant for XTHeadBb during lowering.
Craig Topper via llvm-commits
- [PATCH] D151263: [RISCV] Expand rotate by non-constant for XTHeadBb during lowering.
Craig Topper via Phabricator via llvm-commits
- [compiler-rt] f6c4808 - [compiler-rt] Allow 64-bit sanitizer allocator to be used if using RISCV64 and Fuchsia
Leonard Chan via llvm-commits
- [PATCH] D148443: [compiler-rt] [test] [asan] Mark the static tests unsupported on mingw
Vitaly Buka via Phabricator via llvm-commits
- [PATCH] D151273: [llvm-debuginfod] Switch to OptTable
Andres Villegas via Phabricator via llvm-commits
- [PATCH] D143967: [DebugInfo][BPF] Add 'btf:type_tag' annotation in DWARF
Eduard Zingerman via Phabricator via llvm-commits
- [PATCH] D150641: [bazel] Refactor entries in WORKSPACE to bzl files
Matt via Phabricator via llvm-commits
- [PATCH] D150253: [RISCV] Add Zvfhmin extension.
Michael Maitland via Phabricator via llvm-commits
- [PATCH] D151019: [llvm-exegesis] Refactor FunctionExecutorImpl and create factory
Aiden Grossman via Phabricator via llvm-commits
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Aiden Grossman via Phabricator via llvm-commits
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Aiden Grossman via Phabricator via llvm-commits
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- [PATCH] D123803: [WIP][llvm] A Unified LTO Bitcode Frontend
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- [PATCH] D123803: [WIP][llvm] A Unified LTO Bitcode Frontend
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- [PATCH] D143463: [X86] Use the CFA when appropriate for better variable locations around calls.
Kyle Huey via Phabricator via llvm-commits
- [PATCH] D151276: Weaken MFI Max Call Frame Size Assertion
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- [PATCH] D150641: [bazel] Refactor entries in WORKSPACE to bzl files
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- [llvm] 9c3c6f6 - [Propeller] Add HasIndirectBranch to BBEntry::Metadata.
Rahman Lavaee via llvm-commits
- [PATCH] D150611: [Propeller] Add HasIndirectBranch to BBEntry::Metadata.
Rahman Lavaee via Phabricator via llvm-commits
- [llvm] c8466ab - [LegalizeType][X86] Support WidenVecRes_AssertZext and SplitVecRes_AssertZext for ISD::AssertZext during LegalizeType procedure
Bing1 Yu via llvm-commits
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- [PATCH] D150929: [RISCV][BF16] Enable __bf16 for riscv targets
Jun Sha via Phabricator via llvm-commits
- [PATCH] D151176: [RISCV] Custom lower fixed-length vector llvm.is.fpclass to vfclass.v
Liao Chunyu via Phabricator via llvm-commits
- [PATCH] D151176: [RISCV] Custom lower fixed-length vector llvm.is.fpclass to vfclass.v
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Oskar Wirga via Phabricator via llvm-commits
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- [PATCH] D151036: [CodeGen] Fix incorrect usage of MCPhysReg for diff list elements
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- [PATCH] D150644: [lld][ELF] Implement –print-memory-usage
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- [PATCH] D151276: Weaken MFI Max Call Frame Size Assertion
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- [PATCH] D149495: [RISCV] Add support for V extension in SiFive7
Wang Pengcheng via Phabricator via llvm-commits
- [PATCH] D150464: [FuncSpec] Improve the accuracy of the cost model.
Chuanqi Xu via Phabricator via llvm-commits
- [PATCH] D151052: [LoopUnroll] Peel iterations based on select conditions
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- [PATCH] D151176: [RISCV] Custom lower fixed-length vector llvm.is.fpclass to vfclass.v
Craig Topper via Phabricator via llvm-commits
- [PATCH] D151052: [LoopUnroll] Peel iterations based on select conditions
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- [PATCH] D149016: [TableGen] Unify the priority of variables
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- [PATCH] D151036: [CodeGen] Fix incorrect usage of MCPhysReg for diff list elements
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Liao Chunyu via Phabricator via llvm-commits
- [PATCH] D151284: [RISCV] Custom lower FP_TO_FP16 and FP16_TO_FP to correct ABI of of libcall
Alex Bradbury via Phabricator via llvm-commits
- [PATCH] D149428: [BBUtils][NFC] Delete SplitBlockAndInsertIfThen with DT.
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- [PATCH] D149428: [BBUtils][NFC] Delete SplitBlockAndInsertIfThen with DT.
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- [llvm] 0c316f0 - [BBUtils][NFC] Delete SplitBlockAndInsertIfThen with DT.
Joshua Cao via llvm-commits
- [PATCH] D149428: [BBUtils][NFC] Delete SplitBlockAndInsertIfThen with DT.
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- [PATCH] D151285: [MC] Check if register is non-null before calling isSubRegisterEq (NFCI)
Sergei Barannikov via Phabricator via llvm-commits
- [PATCH] D151276: Weaken MFI Max Call Frame Size Assertion
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- [PATCH] D151276: Weaken MFI Max Call Frame Size Assertion
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- [PATCH] D149016: [TableGen] Unify the priority of variables
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- [PATCH] D151082: [GuardUtils] Allow intermmediate blocks between widenable branch and deopt block
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- [PATCH] D151036: [CodeGen] Fix incorrect usage of MCPhysReg for diff list elements
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- [PATCH] D151288: [MIPS] Check if register is non-null before calling isSuperOrSubRegisterEq (NFCI)
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- [PATCH] D42600: [CodeGen][Shrink-wrap]split restore point
Sushant Gokhale via Phabricator via llvm-commits
- [PATCH] D151289: [AMDGPU] Check if register is non-null before calling isSubRegisterEq (NFCI)
Sergei Barannikov via Phabricator via llvm-commits
- [PATCH] D151036: [CodeGen] Fix incorrect usage of MCPhysReg for diff list elements
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- [PATCH] D148443: [compiler-rt] [test] [asan] Mark the static tests unsupported on mingw
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- [llvm] d1a5b02 - [gn build] Port bea2ff655068
LLVM GN Syncbot via llvm-commits
- [PATCH] D151295: [LVI] Don't compute range on not guaranteed not to be undef condition in SelectInst
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- [PATCH] D151289: [AMDGPU] Check if register is non-null before calling isSubRegisterEq (NFCI)
Jay Foad via Phabricator via llvm-commits
- [llvm] cf1ef41 - [IR] Use LLVMContext::MD_nontemporal (NFC)
Kazu Hirata via llvm-commits
- [PATCH] D151289: [AMDGPU] Check if register is non-null before calling isSubRegisterEq (NFCI)
Sergei Barannikov via Phabricator via llvm-commits
- [PATCH] D151299: [ARM] Remove unused functions isExpImmValue, isExpImm, and isInvertedExpImm
Kazu Hirata via Phabricator via llvm-commits
- [PATCH] D151233: [DebugInfo] Follow-up to D151001
James Henderson via Phabricator via llvm-commits
- [PATCH] D151188: [lld] Find resource and lib dir
Petr Hosek via Phabricator via llvm-commits
- [PATCH] D151289: [AMDGPU] Check if register is non-null before calling isSubRegisterEq (NFCI)
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- [PATCH] D151295: [LVI] Don't compute range on not guaranteed not to be undef condition in SelectInst
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Kito Cheng via Phabricator via llvm-commits
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- [PATCH] D151295: [LVI] Don't compute range on not guaranteed not to be undef condition in SelectInst
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James Henderson via Phabricator via llvm-commits
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- [llvm] 7420413 - [AMDGPU] Check if register is non-null before calling isSubRegisterEq (NFCI)
Sergei Barannikov via llvm-commits
- [PATCH] D151187: [doc] Add casting style preference to coding standards
James Henderson via Phabricator via llvm-commits
- [PATCH] D151289: [AMDGPU] Check if register is non-null before calling isSubRegisterEq (NFCI)
Sergei Barannikov via Phabricator via llvm-commits
- [PATCH] D151288: [MIPS] Check if register is non-null before calling isSuperOrSubRegisterEq (NFCI)
Sergei Barannikov via Phabricator via llvm-commits
- [PATCH] D150681: [SCEVExpander] Remember phi nodes inserted by LCSSA construction
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- [PATCH] D151295: [LVI] Don't compute range on not guaranteed not to be undef condition in SelectInst
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- [PATCH] D151021: [llvm-exegesis] Introduce Subprocess Executor Mode
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- [llvm] 7d7c82a - Convert unit test to opaque pointers
Matt Arsenault via llvm-commits
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- [llvm] 0fe83eb - AMDGPU: Drop FP_ROUND second value check
Matt Arsenault via llvm-commits
- [llvm] 7738db3 - ValueTracking: Handle constrained_sqrt in computeKnownFPClass
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- [PATCH] D151196: AMDGPU: Drop FP_ROUND second value check
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- [PATCH] D148236: ValueTracking: Handle constrained_sqrt in computeKnownFPClass
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- [PATCH] D151241: [AMDGPUCodegenPrepare] Add NewPM Support
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- [llvm] 3a223f1 - [InstCombine] Fix crash due to early extractvalue removal
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- [llvm] b76f0a0 - [LoopUnroll] Add tests for peeling iterations based on select, and, or
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- [llvm] 849d01b - [LoopUnroll] Peel iterations based on select conditions
Joshua Cao via llvm-commits
- [PATCH] D151052: [LoopUnroll] Peel iterations based on select conditions
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- [llvm] 82082b7 - [LVI] Don't compute range on not guaranteed not to be undef condition in SelectInst
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- [PATCH] D151295: [LVI] Don't compute range on not guaranteed not to be undef condition in SelectInst
luxufan via Phabricator via llvm-commits
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- [llvm] 577b163 - [gn build] Port 1c9a8004ed88
Nico Weber via llvm-commits
- [PATCH] D151021: [llvm-exegesis] Introduce Subprocess Executor Mode
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- [llvm] d4bfc14 - [KnownBits] Check for conflict-freedom in exhaustive tests
Nikita Popov via llvm-commits
- [PATCH] D151288: [MIPS] Check if register is non-null before calling isSuperOrSubRegisterEq (NFCI)
Sergei Barannikov via Phabricator via llvm-commits
- [PATCH] D151288: [MIPS] Check if register is non-null before calling isSuperOrSubRegisterEq (NFCI)
YunQiang Su via Phabricator via llvm-commits
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Nikita Popov via llvm-commits
- [PATCH] D151288: [MIPS] Check if register is non-null before calling isSuperOrSubRegisterEq (NFCI)
Sergei Barannikov via Phabricator via llvm-commits
- [PATCH] D151299: [ARM] Remove unused functions isExpImmValue, isExpImm, and isInvertedExpImm
Dave Green via Phabricator via llvm-commits
- [PATCH] D147457: [Reassociation] Only form CSE expressions for local operands
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- [llvm] 92dc4ff - [ValueTracking] Check for known bits conflict for shl nsw (PR62908)
Nikita Popov via llvm-commits
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Wang Pengcheng via Phabricator via llvm-commits
- [llvm] 2d48a77 - [KnownBits] Use early return for unknown LHS for shifts (NFC)
Nikita Popov via llvm-commits
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- [PATCH] D151309: [RISCV][NFC] Simplify decoding code of disassembler
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- [PATCH] D148841: [LV] Use SCEV for uniformity analysis across VF
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- [llvm] 725fcf4 - [KnownBits] Reduce number of overflow checks for uadd/sub_sat (NFCI)
Nikita Popov via llvm-commits
- [llvm] 552fc39 - [RISCV] Add test for small vector copies
Luke Lau via llvm-commits
- [PATCH] D151211: [RISCV] Add test for small vector copies
Luke Lau via Phabricator via llvm-commits
- [llvm] 28b21c4 - [RISCV] Scalarize small fixed vector copies < XLEN
Luke Lau via llvm-commits
- [PATCH] D151103: [RISCV] Scalarize small fixed vector copies < XLEN
Luke Lau via Phabricator via llvm-commits
- [PATCH] D151309: [RISCV][NFC] Simplify decoding code of disassembler
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- [PATCH] D151211: [RISCV] Add test for small vector copies
Luke Lau via Phabricator via llvm-commits
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- [PATCH] D151221: [RISCV] Scalarize constant stores of fixed vectors up to 32 bits
Luke Lau via Phabricator via llvm-commits
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- [llvm] cbc50ba - [AggressiveInstCombine] Handle the nested GEP/BitCast scenario in Load Merge.
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- [PATCH] D150864: [AggressiveInstCombine] Handle the nested GEP/BitCast scenario in Load Merge.
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- [PATCH] D149444: [ARM] Allow codegen for Armv6m eXecute-Only (XO) sections
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- [PATCH] D149444: [ARM] Allow codegen for Armv6m eXecute-Only (XO) sections
Ties Stuij via Phabricator via llvm-commits
- [PATCH] D151208: [KnownBits] Add support for nuw/nsw on shifts
Nikita Popov via Phabricator via llvm-commits
- [PATCH] D127115: [RFC][DAGCombine] Make sure combined nodes are added back to the worklist in topological order.
Jay Foad via Phabricator via llvm-commits
- [PATCH] D151305: [JITLink][AArch64] Implement R_AARCH64_ADR_PREL_LO21
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- [PATCH] D129208: [MachineVerifier] Try harder to verify LiveIntervals
Jay Foad via Phabricator via llvm-commits
- [PATCH] D151227: RFC: LiveIntervalCalc: Always split separate components
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- [PATCH] D150427: [AMDGPU] Non hostcall printf support for HIP
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- [PATCH] D151313: [RISCV][BF16] Make backend type bf16 to follow the psABI
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Marco Elver via llvm-commits
- [llvm] d41f6cf - [CodeGen] Skip null physical register in AntiDepBreaker (NFCI)
Sergei Barannikov via llvm-commits
- [PATCH] D151288: [MIPS] Check if register is non-null before calling isSuperOrSubRegisterEq (NFCI)
Sergei Barannikov via Phabricator via llvm-commits
- [PATCH] D148550: [CodeGen] Add pre-commit tests for D148558
Igor Kirillov via Phabricator via llvm-commits
- [PATCH] D148703: [CodeGen] Refactor IR generation functions to use IRBuilder in ComplexDeinterleaving pass
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- [PATCH] D151313: [RISCV][BF16] Make backend type bf16 to follow the psABI
Jun Sha via Phabricator via llvm-commits
- [PATCH] D150464: [FuncSpec] Improve the accuracy of the cost model.
Alexandros Lamprineas via Phabricator via llvm-commits
- [PATCH] D151288: [MIPS] Check if register is non-null before calling isSuperOrSubRegisterEq (NFCI)
Sergei Barannikov via Phabricator via llvm-commits
- [PATCH] D151188: [lld] Find resource and lib dir
Tobias Hieta via Phabricator via llvm-commits
- [PATCH] D151288: [MIPS] Check if register is non-null before calling isSuperOrSubRegisterEq (NFCI)
Sergei Barannikov via Phabricator via llvm-commits
- [PATCH] D150670: [WebAssembly] Disable generation of fshl/fshr for rotates
Paulo Matos via Phabricator via llvm-commits
- [PATCH] D127115: [RFC][DAGCombine] Make sure combined nodes are added back to the worklist in topological order.
Dave Green via Phabricator via llvm-commits
- [PATCH] D151254: InstSimplify: Require instruction be parented
Matt Arsenault via Phabricator via llvm-commits
- [PATCH] D151254: InstSimplify: Require instruction be parented
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- [llvm] ced90d1 - [FuncSpec] Improve the accuracy of the cost model.
Alexandros Lamprineas via llvm-commits
- [PATCH] D150464: [FuncSpec] Improve the accuracy of the cost model.
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- [llvm] de461bc - [gn build] Port ced90d1ff64a
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- [PATCH] D151314: [RegisterCoalescer] Fix updating LiveIntervals in joinReservedPhysReg
Jay Foad via Phabricator via llvm-commits
- [PATCH] D151314: [RegisterCoalescer] Fix updating LiveIntervals in joinReservedPhysReg
Jay Foad via Phabricator via llvm-commits
- [PATCH] D151314: [RegisterCoalescer] Fix updating LiveIntervals in joinReservedPhysReg
Jay Foad via Phabricator via llvm-commits
- [PATCH] D150681: [SCEVExpander] Remember phi nodes inserted by LCSSA construction
Nikita Popov via Phabricator via llvm-commits
- [PATCH] D151188: [lld] Find resource and lib dir
Tobias Hieta via Phabricator via llvm-commits
- [PATCH] D149775: [AMDGPU] Reserve SGPR pair when long branches are present
Valery Pykhtin via Phabricator via llvm-commits
- [PATCH] D35500: [Sparc] Added software multiplication/division feature
stefanheisl via Phabricator via llvm-commits
- [PATCH] D139732: [AMDGPU] Add pass to rewrite partially used virtual superregisters after RenameIndependentSubregs pass with registers of minimal size.
Valery Pykhtin via Phabricator via llvm-commits
- [PATCH] D151221: [RISCV] Scalarize constant stores of fixed vectors up to 32 bits
Luke Lau via Phabricator via llvm-commits
- [PATCH] D151221: [RISCV] Scalarize constant stores of fixed vectors up to 32 bits
Luke Lau via Phabricator via llvm-commits
- [PATCH] D129208: [MachineVerifier] Try harder to verify LiveIntervals
Jay Foad via Phabricator via llvm-commits
- [PATCH] D150375: [FuncSpec] Replace LoopInfo with BlockFrequencyInfo.
Mikael Holmén via Phabricator via llvm-commits
- [PATCH] D148094: [clang][CodeGen] Break up TargetInfo.cpp [8/8]
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- [PATCH] D151313: [RISCV][BF16] Make backend type bf16 to follow the psABI
Alex Bradbury via Phabricator via llvm-commits
- [PATCH] D151254: InstSimplify: Require instruction be parented
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- [llvm] 3590945 - [AMDGPU] Add attribute to AMDGPU ctor / dtor to indicate single threadedness
Joseph Huber via llvm-commits
- [PATCH] D151153: [AMDGPU] Add attribute to AMDGPU ctor / dtor to indicate single threadedness
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- [PATCH] D151187: [doc] Add casting style preference to coding standards
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- [PATCH] D149580: [hwasan] support hwasan-match-all-tag flag for callback memory access instrumentation
Mingjie Xu via Phabricator via llvm-commits
- [PATCH] D149943: [hwasan] support hwasan-match-all-tag flag for hwasan meminstrinsic calls
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- [PATCH] D149943: [hwasan] support hwasan-match-all-tag flag for hwasan meminstrinsic calls
Mingjie Xu via Phabricator via llvm-commits
- [PATCH] D150360: [InstCombine] Optimize compares with multiple selects as operands
Tejas Joshi via Phabricator via llvm-commits
- [PATCH] D150360: [InstCombine] Optimize compares with multiple selects as operands
Tejas Joshi via Phabricator via llvm-commits
- [PATCH] D139732: [AMDGPU] Add pass to rewrite partially used virtual superregisters after RenameIndependentSubregs pass with registers of minimal size.
Valery Pykhtin via Phabricator via llvm-commits
- [PATCH] D151227: RFC: LiveIntervalCalc: Always split separate components
Quentin Colombet via Phabricator via llvm-commits
- [PATCH] D151227: RFC: LiveIntervalCalc: Always split separate components
Jay Foad via Phabricator via llvm-commits
- [PATCH] D151227: RFC: LiveIntervalCalc: Always split separate components
Jay Foad via Phabricator via llvm-commits
- [llvm] 538c141 - [Hexagon] Remap all instructions generated for aligned address/value in HVC
Krzysztof Parzyszek via llvm-commits
- [llvm] b9c78de - [Hexagon] Add more debugging options and dumps to HVC
Krzysztof Parzyszek via llvm-commits
- [PATCH] D134599: [RISCV] Readjusting the framestack for Zcmp
Xinlong Wu via Phabricator via llvm-commits
- [PATCH] D151323: [AMDGPU] Switch to backwards scavenging in non-spill cases
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- [PATCH] D151326: [Assignment Tracking] Ignore stores to a negative offset from an alloca
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- [PATCH] D151328: [IRTranslator][NFC] Refactor if/else chain into early returns
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- [PATCH] D151329: [IRTranslator] Implement translation of entry_value dbg.value intrinsics
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- [PATCH] D151330: [SelectionDAGBuilder] Handle entry_value dbg.value intrinsics
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- [PATCH] D151331: [FastISel][NFC] Refactor if/else chain into early returns
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- [PATCH] D151332: [FastISel][NFC] Remove repeated calls to get{Variable,Expr}Depends on D151331
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- [PATCH] D151333: [FastISel] Implement translation of entry_value dbg.value intrinsics
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- [PATCH] D151326: [Assignment Tracking] Ignore stores to a negative offset from an alloca
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- [PATCH] D151246: [InstCombine] Improve bitreverse optimization
Austin Chang via Phabricator via llvm-commits
- [PATCH] D150670: [WebAssembly] Disable generation of fshl/fshr for rotates
Paulo Matos via Phabricator via llvm-commits
- [PATCH] D151333: [FastISel] Implement translation of entry_value dbg.value intrinsics
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- [PATCH] D150670: [WebAssembly] Disable generation of fshl/fshr for rotates
Paulo Matos via Phabricator via llvm-commits
- [PATCH] D150670: [WebAssembly] Disable generation of fshl/fshr for rotates
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- [PATCH] D151332: [FastISel][NFC] Remove repeated calls to get{Variable,Expr}
Felipe de Azevedo Piovezan via Phabricator via llvm-commits
- [PATCH] D150367: [AIX][TLS] Generate optimized 64-bit local-exec access code sequence using X-Form loads/stores
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- [PATCH] D151314: [RegisterCoalescer] Fix updating LiveIntervals in joinReservedPhysReg
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- [PATCH] D151333: [FastISel] Implement translation of entry_value dbg.value intrinsics
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- [PATCH] D147408: [AMDGPU] Iterative scan implementation for atomic optimizer.
Pravin Jagtap via Phabricator via llvm-commits
- [PATCH] D151326: [Assignment Tracking] Ignore stores to a negative offset from an alloca
Orlando Cazalet-Hyams via Phabricator via llvm-commits
- [PATCH] D151099: [InstCombine] Remove computeKnownBits() fold for returns
Nikita Popov via Phabricator via llvm-commits
- [PATCH] D151326: [Assignment Tracking] Ignore stores to a negative offset from an alloca
J. Ryan Stinnett via Phabricator via llvm-commits
- [PATCH] D151335: [AIX][TLS] Generate .extern and .ref references to __tls_get_addr for local-exec accesses.
Amy Kwan via Phabricator via llvm-commits
- [PATCH] D151326: [Assignment Tracking] Ignore stores to a negative offset from an alloca
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- [PATCH] D151313: [RISCV][BF16] Make backend type bf16 to follow the psABI
Jun Sha via Phabricator via llvm-commits
- [PATCH] D151188: [lld] Find resource and lib dir
Hans Wennborg via Phabricator via llvm-commits
- [PATCH] D150360: [InstCombine] Optimize compares with multiple selects as operands
Nikita Popov via Phabricator via llvm-commits
- [PATCH] D149281: Don't disable loop unroll for vectorized loops on AMDGPU target
Alexander via Phabricator via llvm-commits
- [llvm] 94e48d4 - [AMDGPU] Switch to backwards scavenging in non-spill cases
Jay Foad via llvm-commits
- [PATCH] D151323: [AMDGPU] Switch to backwards scavenging in non-spill cases
Jay Foad via Phabricator via llvm-commits
- [llvm] fb2c98a - Reland [MergeICmps] Adapt to non-eq comparisons, bugfix
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- [PATCH] D151221: [RISCV] Scalarize constant stores of fixed vectors up to 32 bits
Philip Reames via Phabricator via llvm-commits
- [PATCH] D149281: Don't disable loop unroll for vectorized loops on AMDGPU target
Alexander via Phabricator via llvm-commits
- [PATCH] D151188: [lld] Find resource and lib dir
Hans Wennborg via Phabricator via llvm-commits
- [PATCH] D149947: [MachineVerifier] Verify liveins for live-through segments
Jay Foad via Phabricator via llvm-commits
- [llvm] 2dad124 - [MachineVerifier] Verify liveins for live-through segments
Jay Foad via llvm-commits
- [PATCH] D151313: [RISCV][BF16] Make backend type bf16 to follow the psABI
Jun Sha via Phabricator via llvm-commits
- [PATCH] D151314: [RegisterCoalescer] Fix updating LiveIntervals in joinReservedPhysReg
Jay Foad via Phabricator via llvm-commits
- [llvm] 0ea5eb1 - [RegisterCoalescer] Fix updating LiveIntervals in joinReservedPhysReg
Jay Foad via llvm-commits
- [llvm] a3cc9d1 - [MergeICmps] Fix -Wsign-compare and typos (NFC)
Jie Fu via llvm-commits
- [PATCH] D148216: Add support for annotations in UpdateTestChecks (NFC)
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- [PATCH] D134599: [RISCV] Readjusting the framestack for Zcmp
Yeting Kuo via Phabricator via llvm-commits
- [PATCH] D129208: [MachineVerifier] Try harder to verify LiveIntervals
Jay Foad via Phabricator via llvm-commits
- [llvm] 4a539e2 - [RISCV] Add test cases for storing small constant vectors
Luke Lau via llvm-commits
- [llvm] 0ca13f9 - [RISCV] Scalarize constant stores of fixed vectors up to 32 bits
Luke Lau via llvm-commits
- [PATCH] D151220: [RISCV] Add test cases for storing small constant vectors
Luke Lau via Phabricator via llvm-commits
- [PATCH] D151221: [RISCV] Scalarize constant stores of fixed vectors up to 32 bits
Luke Lau via Phabricator via llvm-commits
- [PATCH] D148216: Add support for annotations in UpdateTestChecks (NFC)
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- [PATCH] D150681: [SCEVExpander] Remember phi nodes inserted by LCSSA construction
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- [llvm] d56ae70 - IR: Avoid include in FMF header
Matt Arsenault via llvm-commits
- [llvm] ca6aa47 - Inline: Convert test to generated checks
Matt Arsenault via llvm-commits
- [llvm] 5a8ce74 - [RISCV] Add test coverage for buildvector of FP values
Philip Reames via llvm-commits
- [PATCH] D151313: [RISCV][BF16] Make backend type bf16 to follow the psABI
Jun Sha via Phabricator via llvm-commits
- [PATCH] D150963: [AArch64] merge scaled and unscaled zero narrow stores.
Florian Hahn via Phabricator via llvm-commits
- [llvm] 0ca13f9 - [RISCV] Scalarize constant stores of fixed vectors up to 32 bits
Philip Reames via llvm-commits
- [PATCH] D99750: [LV, VP] RFC: VP intrinsics support for the Loop Vectorizer (Proof-of-Concept)
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- [llvm] 173855f - Revert "[RISCV] Scalarize constant stores of fixed vectors up to 32 bits"
Luke Lau via llvm-commits
- [llvm] a8a36ee - [RISCV] Scalarize constant stores of fixed vectors if small enough
Luke Lau via llvm-commits
- [PATCH] D99750: [LV, VP] RFC: VP intrinsics support for the Loop Vectorizer (Proof-of-Concept)
Alexey Bataev via Phabricator via llvm-commits
- [PATCH] D150899: [PowerPC] Add DFP compare instructions.
Amy Kwan via Phabricator via llvm-commits
- [PATCH] D129208: [MachineVerifier] Try harder to verify LiveIntervals
Florian Hahn via Phabricator via llvm-commits
- [PATCH] D151153: [AMDGPU] Add attribute to AMDGPU ctor / dtor to indicate single threadedness
Matt Arsenault via Phabricator via llvm-commits
- [PATCH] D151153: [AMDGPU] Add attribute to AMDGPU ctor / dtor to indicate single threadedness
Joseph Huber via Phabricator via llvm-commits
- [PATCH] D150577: [CodeGen] Fix for MachineBasicBlock::rfindDebugLoc(instr_rend())
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- [PATCH] D151340: AMDGPU: Refine undef handling for llvm.amdgcn.class intrinsic
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- [PATCH] D151340: AMDGPU: Refine undef handling for llvm.amdgcn.class intrinsic
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- [PATCH] D151340: AMDGPU: Refine undef handling for llvm.amdgcn.class intrinsic
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- [compiler-rt] 2fd4eca - [sanitizer] Add allocator_interface test
Vitaly Buka via llvm-commits
- [PATCH] D148216: Add support for annotations in UpdateTestChecks (NFC)
Nikita Popov via Phabricator via llvm-commits
- [PATCH] D151313: [RISCV][BF16] Make backend type bf16 to follow the psABI
Kito Cheng via Phabricator via llvm-commits
- [PATCH] D150577: [CodeGen] Fix for MachineBasicBlock::rfindDebugLoc(instr_rend())
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- [PATCH] D150990: [split-file] Add flags to support comments and adding extension to output files
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- [PATCH] D107355: [ptr_provenance] Introduce llvm.experimental.ptr.provenance
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- [PATCH] D151341: AMDGPU: Special case uniformity info for singlethreaded workitem IDs
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- [PATCH] D151246: [InstCombine] Improve bitreverse optimization
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- [PATCH] D151341: AMDGPU: Special case uniformity info for singlethreaded workitem IDs
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- [PATCH] D151341: AMDGPU: Special case uniformity info for singlethreaded workitem IDs
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- [llvm] f74bb32 - AMDGPU: Add some new tests for class undef/poison handling
Matt Arsenault via llvm-commits
- [PATCH] D150990: [split-file] Add flags to support comments and adding extension to output files
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- [PATCH] D151341: AMDGPU: Special case uniformity info for singlethreaded workitem IDs
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- [PATCH] D151188: [lld] Find resource and lib dir
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Mark de Wever via Phabricator via llvm-commits
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Mark de Wever via Phabricator via llvm-commits
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- [PATCH] D151212: [RISCV][InsertVSETVLI] Support constant VLs larger than immediate encoding
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- [llvm] 9357712 - [RISCV] Use vfslide1down for build_vectors of non-constant floats
Philip Reames via llvm-commits
- [PATCH] D151347: [RISCV] Use vfslide1down for build_vectors of non-constant floats
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- [PATCH] D150670: [WebAssembly] Disable generation of fshl/fshr for rotates
Craig Topper via Phabricator via llvm-commits
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- [PATCH] D151241: [AMDGPUCodegenPrepare] Add NewPM Support
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- [PATCH] D149345: [Utils] Added the ability to print the pass number and IR after it is triggered
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Anshil Gandhi via Phabricator via llvm-commits
- [PATCH] D151241: [AMDGPUCodegenPrepare] Add NewPM Support
Anshil Gandhi via Phabricator via llvm-commits
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- [PATCH] D151358: [LegalizeTypes] Improve expansion of wide SMIN/SMAX/UMIN/UMAX
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- [PATCH] D151358: [LegalizeTypes] Improve expansion of wide SMIN/SMAX/UMIN/UMAX
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- [PATCH] D150637: [lld][ELF] Add option for suppressing section type mismatch warnings
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- [PATCH] D151076: [IRGen] Handle infinite cycles in findDominatingStoreToReturnValue.
Florian Hahn via Phabricator via llvm-commits
- [PATCH] D150644: [lld][ELF] Implement –print-memory-usage
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- [PATCH] D151227: RFC: LiveIntervalCalc: Always split separate components
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- [compiler-rt] 8a8c2b2 - sanitizer_common: add test that calls wcslen
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- [PATCH] D146737: [AMDGPU] Trim zero components from buffer and image stores
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- [llvm] 6006d43 - LLVM_FALLTHROUGH => [[fallthrough]]. NFC
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- [PATCH] D151363: [NVPTX, CUDA] barrier intrinsics and builtins for sm_90
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- [PATCH] D150510: [ELF] x86-64: place .lrodata, .lbss, and .ldata away from code sections
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- [PATCH] D150510: [ELF] x86-64: place .lrodata, .lbss, and .ldata away from code sections
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- [compiler-rt] c46bc0d - [lsan] Fix allocator_interface implementation
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- [PATCH] D151340: AMDGPU: Refine undef handling for llvm.amdgcn.class intrinsic
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- [PATCH] D150510: [ELF] x86-64: place .lrodata, .lbss, and .ldata away from code sections
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- [llvm] 9ef1333 - AMDGPU: Replace certain llvm.amdgcn.class uses with llvm.is.fpclass
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- [PATCH] D151348: [DWARFLinker] Set size of location expression of DW_FORM_block1 properly.
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- [PATCH] D150609: [AMDGPU] Do not assume stack size for PAL code object indirect calls
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- [PATCH] D150510: [ELF] x86-64: place .lrodata, .lbss, and .ldata away from code sections
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- [PATCH] D151380: [ModuleInliner] Add two cgscc pass in module-inliner pipeline for simplication parity.
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- [PATCH] D150803: [WebAssembly] Add a new `wasm_async` clang attribute for marking async functions.
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- [PATCH] D150803: [WebAssembly] Add a new `wasm_async` clang attribute for marking async functions.
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- [llvm] 6e88276 - Pre-commit a min/max idiom breakage test for D149918
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Craig Topper via llvm-commits
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- [compiler-rt] 5be5746 - hwasan: refactor order of macros in hwasan_platform_interceptors.h [NFC]
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Craig Topper via llvm-commits
- [PATCH] D144335: [SCEV] Optimize FoldID
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- [PATCH] D144335: [SCEV] Optimize FoldID
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- [PATCH] D134599: [RISCV] Readjusting the framestack for Zcmp
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- [PATCH] D123515: [RISCV] Support '.option arch' directive
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- [PATCH] D150769: [SelectionDAG][computeKnownBits]: Move ISD::ADD/ISD::SUB into their own cases
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- [PATCH] D151395: [1/N][RISCV] Define machine instruction to write an immediate into vxrm
Yueh-Ting (eop) Chen via Phabricator via llvm-commits
- [PATCH] D151396: [2/N][RISCV] Model vxrm in LLVM intrinsics and machine instructions for RVV fixed-point instructions
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- [llvm] 693a1b7 - [gcov] Add nosanitize metadata to memory access instructions inserted by emitProfileNotes()
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- [PATCH] D150460: [gcov] Add nosanitize metadata to memory access instructions inserted by emitProfileNotes()
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- [PATCH] D151284: [RISCV] Custom lower FP_TO_FP16 and FP16_TO_FP to correct ABI of of libcall
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- [PATCH] D151309: [RISCV][NFC] Simplify decoding code of disassembler
Wang Pengcheng via Phabricator via llvm-commits
- [PATCH] D151309: [RISCV][NFC] Simplify decoding code of disassembler
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- [PATCH] D151284: [RISCV] Custom lower FP_TO_FP16 and FP16_TO_FP to correct ABI of of libcall
Kito Cheng via Phabricator via llvm-commits
- [PATCH] D151390: [RISCV] Don't reduce vslidedown's VL in rotations
Craig Topper via Phabricator via llvm-commits
- [PATCH] D151176: [RISCV] Custom lower vector llvm.is.fpclass to vfclass.v
Liao Chunyu via Phabricator via llvm-commits
- [PATCH] D151396: [2/N][RISCV] Model vxrm in LLVM intrinsics and machine instructions for RVV fixed-point instructions
Yueh-Ting (eop) Chen via Phabricator via llvm-commits
- [PATCH] D148836: [X86] Use "l" prefix for data sections under medium/large code model
Fangrui Song via Phabricator via llvm-commits
- [PATCH] D151397: [3/N][RISCV] Model vxrm in C intrinsics for RVV fixed-point instruction vaadd
Yueh-Ting (eop) Chen via Phabricator via llvm-commits
- [PATCH] D151309: [RISCV][NFC] Simplify decoding code of disassembler
Jessica Clarke via Phabricator via llvm-commits
- [llvm] dbbcfef - Revert "[CodeGen] Skip null physical register in AntiDepBreaker (NFCI)"
Sergei Barannikov via llvm-commits
- [llvm] 0f3efb8 - [CodeGen] Skip null physical register in AntiDepBreaker (NFCI)
Sergei Barannikov via llvm-commits
- [PATCH] D151400: [X86] Align stack to 16-bytes on 32-bit with X86_INTR call convention
Antonio Abbatangelo via Phabricator via llvm-commits
- [PATCH] D151309: [RISCV][NFC] Simplify decoding code of disassembler
Wang Pengcheng via Phabricator via llvm-commits
- [PATCH] D151309: [RISCV][NFC] Simplify decoding code of disassembler
Craig Topper via Phabricator via llvm-commits
- [PATCH] D151395: [1/N][RISCV] Define machine instruction to write an immediate into vxrm
Craig Topper via Phabricator via llvm-commits
- [PATCH] D151309: [RISCV][NFC] Simplify decoding code of disassembler
Jessica Clarke via Phabricator via llvm-commits
- [PATCH] D151309: [RISCV][NFC] Simplify decoding code of disassembler
Wang Pengcheng via Phabricator via llvm-commits
- [PATCH] D151396: [2/N][RISCV] Model vxrm in LLVM intrinsics and machine instructions for RVV fixed-point instructions
Craig Topper via Phabricator via llvm-commits
- [PATCH] D151397: [3/N][RISCV] Model vxrm in C intrinsics for RVV fixed-point instruction vaadd
Craig Topper via Phabricator via llvm-commits
- [PATCH] D151309: [RISCV][NFC] Simplify decoding code of disassembler
Wang Pengcheng via Phabricator via llvm-commits
- [PATCH] D151309: [RISCV][NFC] Simplify decoding code of disassembler
Jessica Clarke via Phabricator via llvm-commits
- [llvm] 4374026 - [MIPS] Check if register is non-null before calling isSuperOrSubRegisterEq (NFCI)
Sergei Barannikov via llvm-commits
- [PATCH] D151288: [MIPS] Check if register is non-null before calling isSuperOrSubRegisterEq (NFCI)
Sergei Barannikov via Phabricator via llvm-commits
- [PATCH] D147740: [NFC][llvm-profdata] Refactoring Sample Profile Reader to increase FDO build speed
William Junda Huang via Phabricator via llvm-commits
- [PATCH] D151397: [3/N][RISCV] Model vxrm in C intrinsics for RVV fixed-point instruction vaadd
Craig Topper via Phabricator via llvm-commits
- [PATCH] D151309: [RISCV][NFC] Simplify decoding code of disassembler
Craig Topper via Phabricator via llvm-commits
- [PATCH] D151309: [RISCV][NFC] Simplify decoding code of disassembler
Craig Topper via Phabricator via llvm-commits
- [PATCH] D151309: [RISCV][NFC] Simplify decoding code of disassembler
Jessica Clarke via Phabricator via llvm-commits
- [PATCH] D151176: [RISCV] Custom lower vector llvm.is.fpclass to vfclass.v
Craig Topper via Phabricator via llvm-commits
- [PATCH] D151311: [ScheduleDAG] Fix error assert target
Austin Kerbow via Phabricator via llvm-commits
- [PATCH] D151403: [LoopPeel] Peel iterations based on and, or conditions
Joshua Cao via Phabricator via llvm-commits
- [compiler-rt] 9289b64 - sanitizer-common: fix buildbot by temporarily disabling release_to_os test for tsan
Thurston Dang via llvm-commits
- [PATCH] D151406: [Hexagon] Check if register is non-null before calling subregs_inclusive
Sergei Barannikov via Phabricator via llvm-commits
- [PATCH] D151406: [Hexagon] Check if register is non-null before calling subregs_inclusive
Sergei Barannikov via Phabricator via llvm-commits
- [PATCH] D151036: [CodeGen] Fix incorrect usage of MCPhysReg for diff list elements
Sergei Barannikov via Phabricator via llvm-commits
- [PATCH] D151036: [CodeGen] Fix incorrect usage of MCPhysReg for diff list elements
Sergei Barannikov via Phabricator via llvm-commits
- [PATCH] D151396: [2/N][RISCV] Model vxrm in LLVM intrinsics and machine instructions for RVV fixed-point instructions
Yueh-Ting (eop) Chen via Phabricator via llvm-commits
- [PATCH] D146661: [BOLT] stale profile matching [part 2 out of 2]
Amir Ayupov via Phabricator via llvm-commits
- [PATCH] D151309: [RISCV][NFC] Simplify decoding code of disassembler
Wang Pengcheng via Phabricator via llvm-commits
- [llvm] ee1d5f6 - [MC] Check if register is non-null before calling isSubRegisterEq (NFCI)
Sergei Barannikov via llvm-commits
- [PATCH] D151285: [MC] Check if register is non-null before calling isSubRegisterEq (NFCI)
Sergei Barannikov via Phabricator via llvm-commits
- [PATCH] D144565: dwp check overflow
李拯先 via Phabricator via llvm-commits
- [PATCH] D151309: [RISCV][NFC] Simplify decoding code of disassembler
Wang Pengcheng via Phabricator via llvm-commits
- [llvm] 8b90f8e - [RISCV][CodeGen] Support Zdinx on RV32 codegen
Shao-Ce SUN via llvm-commits
- [PATCH] D149743: [RISCV][CodeGen] Support Zdinx on RV32 codegen
Shao-Ce SUN via Phabricator via llvm-commits
- [PATCH] D151309: [RISCV][NFC] Simplify decoding code of disassembler
Craig Topper via Phabricator via llvm-commits
- [PATCH] D144565: dwp check overflow
zhuna via Phabricator via llvm-commits
- [PATCH] D151006: [bazel] Remove terminfo dependency
Mikhail Goncharov via Phabricator via llvm-commits
- [PATCH] D151340: AMDGPU: Refine undef handling for llvm.amdgcn.class intrinsic
Matt Arsenault via Phabricator via llvm-commits
- [PATCH] D150641: [bazel] Refactor entries in WORKSPACE to bzl files
Mikhail Goncharov via Phabricator via llvm-commits
- [PATCH] D151354: [libc][bazel] Add targets for fmod* and scalbn*.
Siva Chandra via Phabricator via llvm-commits
- [PATCH] D151176: [RISCV] Custom lower vector llvm.is.fpclass to vfclass.v
Liao Chunyu via Phabricator via llvm-commits
- [PATCH] D151346: Fix bazel build for https://reviews.llvm.org/D144552
Matthias Springer via Phabricator via llvm-commits
- [PATCH] D150790: [GlobalIsel][X86] fix legalization of G_CTLZ and G_CTPOP
Thorsten via Phabricator via llvm-commits
- [PATCH] D151311: [ScheduleDAG] Fix error assert target
lennyxiao via Phabricator via llvm-commits
- [PATCH] D151340: AMDGPU: Refine undef handling for llvm.amdgcn.class intrinsic
Jay Foad via Phabricator via llvm-commits
- [PATCH] D139732: [AMDGPU] Add pass to rewrite partially used virtual superregisters after RenameIndependentSubregs pass with registers of minimal size.
Valery Pykhtin via Phabricator via llvm-commits
- [PATCH] D150644: [lld][ELF] Implement –print-memory-usage
Petr Hosek via Phabricator via llvm-commits
- [lld] 811cbfc - [lld][ELF] Implement –print-memory-usage
Petr Hosek via llvm-commits
- [PATCH] D150644: [lld][ELF] Implement –print-memory-usage
Petr Hosek via Phabricator via llvm-commits
- [PATCH] D138526: [SimpleLoopUnswitch][reland 2] unswitch selects
Nikita Popov via Phabricator via llvm-commits
- [PATCH] D151397: [3/N][RISCV] Model vxrm in C intrinsics for RVV fixed-point instruction vaadd
Yueh-Ting (eop) Chen via Phabricator via llvm-commits
- [PATCH] D151397: [3/N][RISCV] Model vxrm in C intrinsics for RVV fixed-point instruction vaadd
Yueh-Ting (eop) Chen via Phabricator via llvm-commits
- [llvm] 92723d5 - [RISCV][NFC] Simplify decoding code of disassembler
via llvm-commits
- [PATCH] D151309: [RISCV][NFC] Simplify decoding code of disassembler
Wang Pengcheng via Phabricator via llvm-commits
- [llvm] d5c56c5 - [SCEVExpander] Remember phi nodes inserted by LCSSA construction
Nikita Popov via llvm-commits
- [PATCH] D150681: [SCEVExpander] Remember phi nodes inserted by LCSSA construction
Nikita Popov via Phabricator via llvm-commits
- [PATCH] D151397: [3/N][RISCV] Model vxrm in C intrinsics for RVV fixed-point instruction vaadd
Yueh-Ting (eop) Chen via Phabricator via llvm-commits
- [PATCH] D150360: [InstCombine] Optimize compares with multiple selects as operands
Tejas Joshi via Phabricator via llvm-commits
- [PATCH] D116405: [IR] Add DebugEntryValuesCallSite pass
Djordje Todorovic via Phabricator via llvm-commits
- [PATCH] D150360: [InstCombine] Optimize compares with multiple selects as operands
Tejas Joshi via Phabricator via llvm-commits
- [PATCH] D116406: [IR] Handle special Entry Value expression
Djordje Todorovic via Phabricator via llvm-commits
- [PATCH] D116403: [IR] Add DebugEntryValues pass
Djordje Todorovic via Phabricator via llvm-commits
- [PATCH] D150360: [InstCombine] Optimize compares with multiple selects as operands
Nikita Popov via Phabricator via llvm-commits
- [llvm] 0c23dc2 - Reapply [SCEV] Replace IsAvailableOnEntry with block disposition
Nikita Popov via llvm-commits
- [PATCH] D116405: [IR] Add DebugEntryValuesCallSite pass
Djordje Todorovic via Phabricator via llvm-commits
- [PATCH] D116406: [IR] Handle special Entry Value expression
Milica Lazarevic via Phabricator via llvm-commits
- [PATCH] D151086: [AArch64][SVE] Extra patterns for predicated and/or/xor
David Sherwood via Phabricator via llvm-commits
- [PATCH] D116405: [IR] Add DebugEntryValuesCallSite pass
Milica Lazarevic via Phabricator via llvm-commits
- [PATCH] D116403: [IR] Add DebugEntryValues pass
Milica Lazarevic via Phabricator via llvm-commits
- [llvm] d2502eb - [KnownBits] Add support for nuw/nsw on shifts
Nikita Popov via llvm-commits
- [PATCH] D151208: [KnownBits] Add support for nuw/nsw on shifts
Nikita Popov via Phabricator via llvm-commits
- [llvm] c4a60c9 - [CodeGen][ShrinkWrap] Enable PostShrinkWrap by default
via llvm-commits
- [PATCH] D42600: [CodeGen][Shrink-wrap]split restore point
Sushant Gokhale via Phabricator via llvm-commits
- [llvm] 6fdc77e - [RISCV] Don't reduce vslidedown's VL in rotations
Luke Lau via llvm-commits
- [PATCH] D151390: [RISCV] Don't reduce vslidedown's VL in rotations
Luke Lau via Phabricator via llvm-commits
- [PATCH] D42600: [CodeGen][Shrink-wrap]split restore point
Sushant Gokhale via Phabricator via llvm-commits
- [PATCH] D150360: [InstCombine] Optimize compares with multiple selects as operands
Tejas Joshi via Phabricator via llvm-commits
- [PATCH] D150360: [InstCombine] Optimize compares with multiple selects as operands
Nikita Popov via Phabricator via llvm-commits
- [PATCH] D149743: [RISCV][CodeGen] Support Zdinx on RV32 codegen
NAKAMURA Takumi via Phabricator via llvm-commits
- [PATCH] D144941: [m68k] Add TLS Support
John Paul Adrian Glaubitz via Phabricator via llvm-commits
- [PATCH] D144941: [m68k] Add TLS Support
Sheng via Phabricator via llvm-commits
- [PATCH] D144941: [m68k] Add TLS Support
Jessica Clarke via Phabricator via llvm-commits
- [PATCH] D149743: [RISCV][CodeGen] Support Zdinx on RV32 codegen
Jessica Clarke via Phabricator via llvm-commits
- [PATCH] D150649: [FuncSpec] Enable specialization of literal constants.
Alexandros Lamprineas via Phabricator via llvm-commits
- [llvm] 0524534 - [FuncSpec] Enable specialization of literal constants.
Alexandros Lamprineas via llvm-commits
- [PATCH] D151348: [DWARFLinker] Set size of location expression of DW_FORM_block1 properly.
Alexey Lapshin via Phabricator via llvm-commits
- [llvm] 2ba1428 - Revert "[SelectionDAG] Handle NSW for ADD/SUB in computeKnownBits()"
Nikita Popov via llvm-commits
- [PATCH] D150763: [NFC][Py Reformat] Reformat python files in libcxx/libcxxabi
Tobias Hieta via Phabricator via llvm-commits
- [PATCH] D150763: [NFC][Py Reformat] Reformat python files in libcxx/libcxxabi
Tobias Hieta via Phabricator via llvm-commits
- [PATCH] D150253: [RISCV] Add Zvfhmin extension.
Jianjian Guan via Phabricator via llvm-commits
- [PATCH] D150784: [NFC][Py Reformat] Reformat python files in the rest of the dirs
Tobias Hieta via Phabricator via llvm-commits
- [PATCH] D151414: [RISCV] Add Zvfhmin extension support for llvm RISCV backend.
Jianjian Guan via Phabricator via llvm-commits
- [PATCH] D150782: [NFC][Py Reformat] Reformat python files in mlir subdir
Tobias Hieta via Phabricator via llvm-commits
- [PATCH] D150782: [NFC][Py Reformat] Reformat python files in mlir subdir
Tobias Hieta via Phabricator via llvm-commits
- [PATCH] D150769: [SelectionDAG][computeKnownBits]: Move ISD::ADD/ISD::SUB into their own cases
Nikita Popov via Phabricator via llvm-commits
- [PATCH] D151344: Reland "[CMake] Bumps minimum version to 3.20.0.
Hans Wennborg via Phabricator via llvm-commits
- [llvm] 116a31e - [GuardUtils] Allow intermmediate blocks between widenable branch and deopt block
Serguei Katkov via llvm-commits
- [PATCH] D151082: [GuardUtils] Allow intermmediate blocks between widenable branch and deopt block
Serguei Katkov via Phabricator via llvm-commits
- [PATCH] D150649: [FuncSpec] Enable specialization of literal constants.
Nikita Popov via Phabricator via llvm-commits
- [PATCH] D150577: [CodeGen] Fix for MachineBasicBlock::rfindDebugLoc(instr_rend())
Bjorn Pettersson via Phabricator via llvm-commits
- [PATCH] D144941: [m68k] Add TLS Support
Simon Pilgrim via Phabricator via llvm-commits
- [PATCH] D150790: [GlobalIsel][X86] fix legalization of G_CTLZ and G_CTPOP
Simon Pilgrim via Phabricator via llvm-commits
- [PATCH] D145265: [Pipeline] Remove GlobalCleanupPM
Nikita Popov via Phabricator via llvm-commits
- [PATCH] D149443: [ARM] add Thumb-1 8-bit movs/adds relocations to LLVM
Ties Stuij via Phabricator via llvm-commits
- [PATCH] D151416: [NFC][DAGCombiner]: Only consider nodes with no uses for pruning when forming initial worklist
Dhruv Chawla via Phabricator via llvm-commits
- [compiler-rt] d2ac277 - [compiler-rt] Introduce the notion of an interceptor trampoline
Marco Elver via llvm-commits
- [compiler-rt] 15711bd - [compiler-rt] Introduce asm macros for interceptor trampolines
Marco Elver via llvm-commits
- [compiler-rt] 19b137f - [compiler-rt] Unify Linux and *BSD interceptors more
Marco Elver via llvm-commits
- [compiler-rt] 01cea39 - [sanitizer_common] Support stripping interceptor prefixes in RenderFrame()
Marco Elver via llvm-commits
- [compiler-rt] 5732cdc - [msan] Strip __interceptor_ from reports
Marco Elver via llvm-commits
- [compiler-rt] 215a742 - [sanitizer_common] Check 'demangle' flag in StripFunctionName and DemangleFunctionName
Marco Elver via llvm-commits
- [PATCH] D151416: [NFC][DAGCombiner]: Only consider nodes with no uses for pruning when forming initial worklist
Dhruv Chawla via Phabricator via llvm-commits
- [PATCH] D145265: [Pipeline] Remove GlobalCleanupPM
Nikita Popov via Phabricator via llvm-commits
- [PATCH] D150980: [AMDGPU][AsmParser][NFC] Refine parsing of NamedOperandU32 operands.
Ivan Kosarev via Phabricator via llvm-commits
- [llvm] 067950c - [AArch64] add missing prfm-slc disassembly test
Tomas Matheson via llvm-commits
- [PATCH] D151416: [NFC][DAGCombiner]: Only consider nodes with no uses for pruning when forming initial worklist
Nikita Popov via Phabricator via llvm-commits
- [PATCH] D151109: [AArch64] add missing prfm-slc disassembly test
Tomas Matheson via Phabricator via llvm-commits
- [llvm] 0f619ce - [gn] port e837f4b7dbc3 (_LIBCPP_PSTL_CPU_BACKEND_SERIAL)
Nico Weber via llvm-commits
- [PATCH] D151417: [lld] Partially revert "Always emit symbol table when dwarf section exists in COFF"
Haohai, Wen via Phabricator via llvm-commits
- [PATCH] D151416: [NFC][DAGCombiner]: Only consider nodes with no uses for pruning when forming initial worklist
Dhruv Chawla via Phabricator via llvm-commits
- [PATCH] D151416: [NFC][DAGCombiner]: Only consider nodes with no uses for pruning when forming initial worklist
Dhruv Chawla via Phabricator via llvm-commits
- [PATCH] D151353: [DebugInfo] Add error-handling to DWARFAbbreviationDeclarationSet
James Henderson via Phabricator via llvm-commits
- [PATCH] D151416: [NFC][DAGCombiner]: Only consider nodes with no uses for pruning when forming initial worklist
Dhruv Chawla via Phabricator via llvm-commits
- [llvm] a1c4f42 - [gn build] Port e837f4b7dbc3
LLVM GN Syncbot via llvm-commits
- [PATCH] D150360: [InstCombine] Optimize compares with multiple selects as operands
Tejas Joshi via Phabricator via llvm-commits
- [PATCH] D150253: [RISCV] Add Zvfhmin extension for clang.
Jianjian Guan via Phabricator via llvm-commits
- [PATCH] D150989: [Inliner] Mark inlinings stopped with inlining history as noinline
Jeremy Morse via Phabricator via llvm-commits
- [PATCH] D145516: [Inliner] Avoid excessive inlining through devirtualised calls
Jeremy Morse via Phabricator via llvm-commits
- [PATCH] D151328: [IRTranslator][NFC] Refactor if/else chain into early returns
Felipe de Azevedo Piovezan via Phabricator via llvm-commits
- [llvm] b5983a3 - [IRTranslator][NFC] Refactor if/else chain into early returns
Felipe de Azevedo Piovezan via llvm-commits
- [PATCH] D151328: [IRTranslator][NFC] Refactor if/else chain into early returns
Felipe de Azevedo Piovezan via Phabricator via llvm-commits
- [PATCH] D151416: [NFC][DAGCombiner]: Only consider nodes with no uses for pruning when forming initial worklist
Nikita Popov via Phabricator via llvm-commits
- [PATCH] D151329: [IRTranslator] Implement translation of entry_value dbg.value intrinsics
Felipe de Azevedo Piovezan via Phabricator via llvm-commits
- [PATCH] D151348: [DWARFLinker] Set size of location expression of DW_FORM_block1 properly.
Alexey Lapshin via Phabricator via llvm-commits
- [PATCH] D151419: [DebugInfo][RemoveDIs] Eliminate some debug-intrinsics-affect-codegen errors
Jeremy Morse via Phabricator via llvm-commits
- [PATCH] D134599: [RISCV] Readjusting the framestack for Zcmp
Xinlong Wu via Phabricator via llvm-commits
- [PATCH] D150577: [CodeGen] Fix for MachineBasicBlock::rfindDebugLoc(instr_rend())
Bjorn Pettersson via Phabricator via llvm-commits
- [PATCH] D134599: [RISCV] Readjusting the framestack for Zcmp
Xinlong Wu via Phabricator via llvm-commits
- [PATCH] D151420: [APInt] Add unsigned overloads of shift functions
Jay Foad via Phabricator via llvm-commits
- [PATCH] D151421: [KnownBits] Simplify shl. NFCI.
Jay Foad via Phabricator via llvm-commits
- [PATCH] D151421: [KnownBits] Simplify shl. NFCI.
Jay Foad via Phabricator via llvm-commits
- [compiler-rt] 4c46c7c - [sanitizer_common] Fix StripFunctionName() on Windows
Marco Elver via llvm-commits
- [PATCH] D151423: [MachineInstr] Implement new operand accessors all_defs and all_uses
Jay Foad via Phabricator via llvm-commits
- [PATCH] D151424: [CodeGen] Make use of MachineInstr::all_defs and all_uses. NFCI.
Jay Foad via Phabricator via llvm-commits
- [PATCH] D151188: [lld] Find resource and lib dir
Tobias Hieta via Phabricator via llvm-commits
- [PATCH] D151427: Fix build file forhttps://github.com/llvm/llvm-project/commit/12648492998bd22d268eb1d4d476c6c3acc6c43d
Aliia Khasanova via Phabricator via llvm-commits
- [PATCH] D150963: [AArch64] merge scaled and unscaled zero narrow stores.
Zain Jaffal via Phabricator via llvm-commits
- [PATCH] D150312: [MISched] Introduce and use ResourceSegments.
Andrea Di Biagio via Phabricator via llvm-commits
- [PATCH] D151421: [KnownBits] Simplify shl. NFCI.
Nikita Popov via Phabricator via llvm-commits
- [PATCH] D144565: dwp check overflow
zhuna via Phabricator via llvm-commits
- [PATCH] D150264: [libcxx] Add strict weak ordering checks to sorting algorithms
Danila Kutenin via Phabricator via llvm-commits
- [PATCH] D151423: [MachineInstr] Implement new operand accessors all_defs and all_uses
Sergei Barannikov via Phabricator via llvm-commits
- [PATCH] D151313: [RISCV][BF16] Make backend type bf16 to follow the psABI
Jun Sha via Phabricator via llvm-commits
- [PATCH] D151348: [DWARFLinker] Set size of location expression of DW_FORM_block1 properly.
Alexey Lapshin via Phabricator via llvm-commits
- [llvm] ce2631d - [DWARFLinker] Set size of location expression of DW_FORM_block1 properly.
Alexey Lapshin via llvm-commits
- [PATCH] D151348: [DWARFLinker] Set size of location expression of DW_FORM_block1 properly.
Alexey Lapshin via Phabricator via llvm-commits
- [PATCH] D151432: [NFC][RFC][TableGen] Split GlobalISelEmitter.cpp
Pierre van Houtryve via Phabricator via llvm-commits
- [PATCH] D150803: [WebAssembly] Add a new `wasm_async` clang attribute for marking async functions.
Aaron Ballman via Phabricator via llvm-commits
- [PATCH] D145218: PHI-def LIveInterval's LaneMask can be calculated by subranges LaneMask when Reg has SubRanges.
michael_zhang via Phabricator via llvm-commits
- [PATCH] D151385: test-release.sh: Add support for cross-compiling
Tobias Hieta via Phabricator via llvm-commits
- [PATCH] D151434: [RISCV] Generalise shouldExtendTypeInLibcall logic to apply to all <XLEN floats on soft ABIs
Alex Bradbury via Phabricator via llvm-commits
- [PATCH] D151385: test-release.sh: Add support for cross-compiling
Sergei Barannikov via Phabricator via llvm-commits
- [PATCH] D151385: test-release.sh: Add support for cross-compiling
Tobias Hieta via Phabricator via llvm-commits
- [PATCH] D151423: [MachineInstr] Implement new operand accessors all_defs and all_uses
Jay Foad via Phabricator via llvm-commits
- [PATCH] D151435: [RISCV] Fix -Wunused-variable in release builds. NFCI
Alexander Kornienko via Phabricator via llvm-commits
- [PATCH] D150568: OptTable: stop parsing options after "--" alone.
Tim Northover via Phabricator via llvm-commits
- [PATCH] D71742: Added intrinsics for access to FP environment
Serge Pavlov via Phabricator via llvm-commits
- [PATCH] D150568: OptTable: stop parsing options after "--" alone.
Tim Northover via Phabricator via llvm-commits
- [PATCH] D150963: [AArch64] merge scaled and unscaled zero narrow stores.
Florian Hahn via Phabricator via llvm-commits
- [llvm] a23f984 - [CodeGen] Add unittest for findDebugLoc, rfindDebugLoc, findPrevDebugLoc and rfindPrevDebugLoc. NFC
Bjorn Pettersson via llvm-commits
- [llvm] 63c9fe2 - [CodeGen] Fix for MachineBasicBlock::rfindDebugLoc(instr_rend())
Bjorn Pettersson via llvm-commits
- [PATCH] D150577: [CodeGen] Fix for MachineBasicBlock::rfindDebugLoc(instr_rend())
Bjorn Pettersson via Phabricator via llvm-commits
- [PATCH] D151423: [MachineInstr] Implement new operand accessors all_defs and all_uses
Jay Foad via Phabricator via llvm-commits
- [PATCH] D151385: test-release.sh: Add support for cross-compiling
Sergei Barannikov via Phabricator via llvm-commits
- [PATCH] D71742: Added intrinsics for access to FP environment
Serge Pavlov via Phabricator via llvm-commits
- [PATCH] D150969: [AArch64] Try to convert two XTN and two SMLSL to UZP1, SMLSL and SMLSL2
JinGu Kang via Phabricator via llvm-commits
- [PATCH] D151436: [compiler-rt][SelectionDAG] Add extendbfsf2 libcall and use it for bf16 extends with soft FP
Alex Bradbury via Phabricator via llvm-commits
- [PATCH] D150967: [MemCpyOpt] precommit test for memcpy removal for immutable arguments from attributes (NFC)
Kohei Asano via Phabricator via llvm-commits
- [PATCH] D151170: [StandardInstrumentations] Add option to dump IR to a file on crash
Jamie Schmeiser via Phabricator via llvm-commits
- [PATCH] D139010: [clang][WebAssembly] Implement support for table types and builtins
Aaron Ballman via Phabricator via llvm-commits
- [PATCH] D151385: test-release.sh: Add support for cross-compiling
Tom Stellard via Phabricator via llvm-commits
- [PATCH] D150375: [FuncSpec] Replace LoopInfo with BlockFrequencyInfo.
Mikael Holmén via Phabricator via llvm-commits
- [llvm] 56cdeac - [X86] Regenerate x86-32-intrcc.ll test checks
Simon Pilgrim via llvm-commits
- [PATCH] D149872: [OpenMP][OMPIRBuilder] Migrate emitOffloadingArrays and EmitNonContiguousDescriptor from Clang
Akash Banerjee via Phabricator via llvm-commits
- [PATCH] D151400: [X86] Align stack to 16-bytes on 32-bit with X86_INTR call convention
Simon Pilgrim via Phabricator via llvm-commits
- [PATCH] D150860: [OpenMP] Change clang emitTargetDataCalls to use OMPIRBuilder
Akash Banerjee via Phabricator via llvm-commits
- [PATCH] D147321: [RFC][Flang][OMPIRBuilder] Add nounwind attribute to the LLVM IR
Dominik Adamski via Phabricator via llvm-commits
- [PATCH] D150568: OptTable: stop parsing options after "--" alone.
Tim Northover via Phabricator via llvm-commits
- [PATCH] D151385: test-release.sh: Add support for cross-compiling
Tobias Hieta via Phabricator via llvm-commits
- [PATCH] D151400: [X86] Align stack to 16-bytes on 32-bit with X86_INTR call convention
Phoebe Wang via Phabricator via llvm-commits
- [PATCH] D150253: [RISCV] Add Zvfhmin extension for clang.
Michael Maitland via Phabricator via llvm-commits
- [PATCH] D150601: [ADT] Allow specifying the size of resulting `SmallVector` in `map_to_vector`
Laszlo Kindrat via Phabricator via llvm-commits
- [llvm] 236bfac - [RISCV] Fix -Wunused-variable in release builds. NFCI
Alexander Kornienko via llvm-commits
- [PATCH] D151435: [RISCV] Fix -Wunused-variable in release builds. NFCI
Alexander Kornienko via Phabricator via llvm-commits
- [PATCH] D151423: [MachineInstr] Implement new operand accessors all_defs and all_uses
Jay Foad via Phabricator via llvm-commits
- [PATCH] D151421: [KnownBits] Simplify shl. NFCI.
Nikita Popov via Phabricator via llvm-commits
- [PATCH] D150253: [RISCV] Add Zvfhmin extension for clang.
Michael Maitland via Phabricator via llvm-commits
- [PATCH] D151427: Fix build file forhttps://github.com/llvm/llvm-project/commit/12648492998bd22d268eb1d4d476c6c3acc6c43d
Aliia Khasanova via Phabricator via llvm-commits
- [PATCH] D151441: Avoid pointless canonicalize when using Dwarf names
Mark Santaniello via Phabricator via llvm-commits
- [PATCH] D151423: [MachineInstr] Implement new operand accessors all_defs and all_uses
Sergei Barannikov via Phabricator via llvm-commits
- [PATCH] D150360: [InstCombine] Optimize compares with multiple selects as operands
Nikita Popov via Phabricator via llvm-commits
- [PATCH] D150769: [SelectionDAG][computeKnownBits]: Move ISD::ADD/ISD::SUB into their own cases
Bjorn Pettersson via Phabricator via llvm-commits
- [PATCH] D148703: [CodeGen] Refactor IR generation functions to use IRBuilder in ComplexDeinterleaving pass
Nicholas Guy via Phabricator via llvm-commits
- [PATCH] D151403: [LoopPeel] Peel iterations based on and, or conditions
Nikita Popov via Phabricator via llvm-commits
- [PATCH] D148703: [CodeGen] Refactor IR generation functions to use IRBuilder in ComplexDeinterleaving pass
Igor Kirillov via Phabricator via llvm-commits
- [PATCH] D150769: [SelectionDAG][computeKnownBits]: Move ISD::ADD/ISD::SUB into their own cases
Alexander Kornienko via Phabricator via llvm-commits
- [llvm] 51572c2 - [NFC][DAGCombiner]: Only consider nodes with no uses for pruning when forming initial worklist
Dhruv Chawla via llvm-commits
- [PATCH] D151421: [KnownBits] Simplify shl. NFCI.
Jay Foad via Phabricator via llvm-commits
- [PATCH] D151416: [NFC][DAGCombiner]: Only consider nodes with no uses for pruning when forming initial worklist
Dhruv Chawla via Phabricator via llvm-commits
- [PATCH] D151448: [LoopLoadElimination] Add support for stride equal to -1
Igor Kirillov via Phabricator via llvm-commits
- [PATCH] D151449: [RISCV] Add DAG combine for CTTZ in the case of input 0
Djordje Todorovic via Phabricator via llvm-commits
- [PATCH] D151420: [APInt] Add unsigned overloads of shift functions
Nikita Popov via Phabricator via llvm-commits
- [PATCH] D151448: [LoopLoadElimination] Add support for stride equal to -1
Igor Kirillov via Phabricator via llvm-commits
- [PATCH] D150859: [llvm-objcopy][ELF] Preserve sh_link to .symtab when applicable
Andrew Ng via Phabricator via llvm-commits
- [PATCH] D151421: [KnownBits] Simplify shl. NFCI.
Nikita Popov via Phabricator via llvm-commits
- [PATCH] D151394: [LSR] Treat URem as uninteresting
Nikita Popov via Phabricator via llvm-commits
- [lld] 8aea109 - [ELF] x86-64: place .lrodata, .lbss, and .ldata away from code sections
Fangrui Song via llvm-commits
- [PATCH] D150510: [ELF] x86-64: place .lrodata, .lbss, and .ldata away from code sections
Fangrui Song via Phabricator via llvm-commits
- [PATCH] D151441: Avoid pointless canonicalize when using Dwarf names
Wenlei He via Phabricator via llvm-commits
- [llvm] bc713b1 - [GlobalIsel][X86] fix legalization of G_CTLZ and G_CTPOP
Thorsten Schütt via llvm-commits
- [PATCH] D150790: [GlobalIsel][X86] fix legalization of G_CTLZ and G_CTPOP
Thorsten via Phabricator via llvm-commits
- [PATCH] D150967: [MemCpyOpt] precommit test for memcpy removal for immutable arguments from attributes (NFC)
Kohei Asano via Phabricator via llvm-commits
- [llvm] 0f64d4f - [RISCV] Add test coverage for shuffle/insert idioms which can become v(f)slide1ups
Philip Reames via llvm-commits
- [PATCH] D149443: [ARM] add Thumb-1 8-bit movs/adds relocations to LLVM
Simon Wallis via Phabricator via llvm-commits
- [PATCH] D151456: [KnownBits] Check functions that return zero for poison results
Jay Foad via Phabricator via llvm-commits
- [PATCH] D151421: [KnownBits] Simplify shl. NFCI.
Jay Foad via Phabricator via llvm-commits
- [PATCH] D151456: [KnownBits] Check functions that return zero for poison results
Nikita Popov via Phabricator via llvm-commits
- [PATCH] D151421: [KnownBits] Simplify shl. NFCI.
Jay Foad via Phabricator via llvm-commits
- [PATCH] D151156: [WIP][libc++] Support on-the-fly generated tests
Louis Dionne via Phabricator via llvm-commits
- [PATCH] D151156: [libc++] Use the new .gen tests to implement __verbose_abort tests
Louis Dionne via Phabricator via llvm-commits
- [llvm] 5aa6bbe - [KnownBits] Check functions that return zero for poison results
Jay Foad via llvm-commits
- [PATCH] D151456: [KnownBits] Check functions that return zero for poison results
Jay Foad via Phabricator via llvm-commits
- [PATCH] D150253: [RISCV] Add Zvfhmin extension for clang.
Craig Topper via Phabricator via llvm-commits
- [llvm] bf358e2 - [APInt] Add unsigned overloads of shift functions
Jay Foad via llvm-commits
- [llvm] 2b1678c - [KnownBits] Simplify shl. NFCI.
Jay Foad via llvm-commits
- [PATCH] D151420: [APInt] Add unsigned overloads of shift functions
Jay Foad via Phabricator via llvm-commits
- [PATCH] D151421: [KnownBits] Simplify shl. NFCI.
Jay Foad via Phabricator via llvm-commits
- [llvm] 27c3732 - Avoid pointless canonicalize when using Dwarf names
Wenlei He via llvm-commits
- [PATCH] D151441: Avoid pointless canonicalize when using Dwarf names
Wenlei He via Phabricator via llvm-commits
- [PATCH] D149404: [ValueTracking][InstCombine] Add a new API to allow to ignore poison generating flags or metadatas when implying poison
Florian Hahn via Phabricator via llvm-commits
- [PATCH] D75362: [InstCombine] Process blocks in RPO
Nikita Popov via Phabricator via llvm-commits
- [PATCH] D123515: [RISCV] Support '.option arch' directive
Alex Bradbury via Phabricator via llvm-commits
- [PATCH] D149288: [X86] Introduce a large data threshold for the medium code model
Fangrui Song via Phabricator via llvm-commits
- [PATCH] D123515: [RISCV] Support '.option arch' directive
Jessica Clarke via Phabricator via llvm-commits
- [PATCH] D151249: [ThinLTO] Disable partial sample profile scaling by default
David Li via Phabricator via llvm-commits
- [PATCH] D148216: Add support for annotations in UpdateTestChecks (NFC)
Henrik G Olsson via Phabricator via llvm-commits
- [llvm] aae8524 - [ThinLTO] Disable partial sample profile scaling by default
Teresa Johnson via llvm-commits
- [PATCH] D151249: [ThinLTO] Disable partial sample profile scaling by default
Teresa Johnson via Phabricator via llvm-commits
- [llvm] f3ece29 - [ADT] Allow specifying the size of resulting `SmallVector` in `map_to_vector`
Laszlo Kindrat via llvm-commits
- [PATCH] D150601: [ADT] Allow specifying the size of resulting `SmallVector` in `map_to_vector`
Phabricator via llvm-commits
- [PATCH] D149800: [WIP][PGO] Add ability to mark cold functions as optsize/minsize/optnone
David Li via Phabricator via llvm-commits
- [PATCH] D151349: [HIP] emit macro `__HIP_NO_IMAGE_SUPPORT`
Yaxun Liu via Phabricator via llvm-commits
- [compiler-rt] 5c0f96d - sanitizer-common: temporarily disable release_to_os test for powerpc64
Thurston Dang via llvm-commits
- [PATCH] D149288: [X86] Introduce a large data threshold for the medium code model
Thomas Köppe via Phabricator via llvm-commits
- [PATCH] D151457: [TableGen] Add !getdagargs and !getdagnames
Michael Liao via Phabricator via llvm-commits
- [PATCH] D151458: [RISCV] Support TLSDESC in the RISC-V backend
Paul Kirth via Phabricator via llvm-commits
- [PATCH] D151458: [RISCV] Support TLSDESC in the RISC-V backend
Paul Kirth via Phabricator via llvm-commits
- [llvm] 2912234 - [InlineCost] Consider branches with !make.implicit metadata as free.
Denis Antrushin via llvm-commits
- [PATCH] D149747: [InlineCost] Consider branches with !make.implicit metadata as free.
Denis Antrushin via Phabricator via llvm-commits
- [PATCH] D151436: [compiler-rt][SelectionDAG] Add extendbfsf2 libcall and use it for bf16 extends with soft FP
Craig Topper via Phabricator via llvm-commits
- [PATCH] D151459: [GlobalIsel][X86] Legalize G_CTLZ and G_CTPOP for 32-bit
Thorsten via Phabricator via llvm-commits
- [PATCH] D151461: [Clang][SVE2.1] Add builtins and intrinsics for SVBFMLSLB/T
Caroline via Phabricator via llvm-commits
- [PATCH] D151349: [HIP] emit macro `__HIP_NO_IMAGE_SUPPORT`
Matt Arsenault via Phabricator via llvm-commits
- [compiler-rt] a32a163 - [asan] Fix Windows tests after StripFunctionName() improvements
Marco Elver via llvm-commits
- [PATCH] D123515: [RISCV] Support '.option arch' directive
Craig Topper via Phabricator via llvm-commits
- [compiler-rt] 6f026ff - Discussion: Darwin Sanitizers Stable ABI
Roy Sundahl via llvm-commits
- [PATCH] D147740: [NFC][llvm-profdata] Refactoring Sample Profile Reader to increase FDO build speed
David Li via Phabricator via llvm-commits
- [PATCH] D147740: [NFC][llvm-profdata] Refactoring Sample Profile Reader to increase FDO build speed
David Li via Phabricator via llvm-commits
- [PATCH] D151462: [RISCV] Add cleanup pass for TLS local dynamic
Paul Kirth via Phabricator via llvm-commits
- [PATCH] D151462: [RISCV] Add cleanup pass for TLS local dynamic
Paul Kirth via Phabricator via llvm-commits
- [PATCH] D151457: [TableGen] Add !getdagargs and !getdagnames
Simon Tatham via Phabricator via llvm-commits
- [PATCH] D151349: [HIP] emit macro `__HIP_NO_IMAGE_SUPPORT`
Matt Arsenault via Phabricator via llvm-commits
- [PATCH] D151457: [TableGen] Add !getdagargs and !getdagnames
Paul C. Anagnostopoulos via Phabricator via llvm-commits
- [PATCH] D150769: [SelectionDAG][computeKnownBits]: Move ISD::ADD/ISD::SUB into their own cases
Craig Topper via Phabricator via llvm-commits
- [llvm] eb9ba24 - [StandardInstrumentations] Add option to dump IR to a file on crash
Arthur Eubanks via llvm-commits
- [PATCH] D151170: [StandardInstrumentations] Add option to dump IR to a file on crash
Arthur Eubanks via Phabricator via llvm-commits
- [PATCH] D150577: [CodeGen] Fix for MachineBasicBlock::rfindDebugLoc(instr_rend())
Thurston Dang via Phabricator via llvm-commits
- [PATCH] D151349: [HIP] emit macro `__HIP_NO_IMAGE_SUPPORT`
Yaxun Liu via Phabricator via llvm-commits
- [PATCH] D151403: [LoopPeel] Peel iterations based on and, or conditions
Joshua Cao via Phabricator via llvm-commits
- [PATCH] D151463: [AMDGPU] 4-align SGPR triples
Jay Foad via Phabricator via llvm-commits
- [PATCH] D151458: [RISCV] Support TLSDESC in the RISC-V backend
Paul Kirth via Phabricator via llvm-commits
- [llvm] 28d418b - [unittest][codegen] Avoid memory leak in recently added FindDebugLocTest unittest
Bjorn Pettersson via llvm-commits
- [PATCH] D151462: [RISCV] Add cleanup pass for TLS local dynamic
Paul Kirth via Phabricator via llvm-commits
- [llvm] 13e3d4a - [Pipeline] Don't run EarlyFPM in LTO post link
Arthur Eubanks via llvm-commits
- [PATCH] D145403: [Pipeline] Don't run EarlyFPM in LTO post link
Arthur Eubanks via Phabricator via llvm-commits
- [PATCH] D151156: [libc++] Use the new .gen tests to implement __verbose_abort tests
Nikolas Klauser via Phabricator via llvm-commits
- [PATCH] D125717: [InstCombine] Optimize and of icmps with power-of-2 and contiguous masks
Noah Goldstein via Phabricator via llvm-commits
- [PATCH] D150577: [CodeGen] Fix for MachineBasicBlock::rfindDebugLoc(instr_rend())
Bjorn Pettersson via Phabricator via llvm-commits
- [PATCH] D150577: [CodeGen] Fix for MachineBasicBlock::rfindDebugLoc(instr_rend())
Thurston Dang via Phabricator via llvm-commits
- [PATCH] D151464: [RISCV] Enable TLSDESC by default on RISC-V
Paul Kirth via Phabricator via llvm-commits
- [PATCH] D151465: [Dexter] Remove builder from Dexter
Stephen Tozer via Phabricator via llvm-commits
- [PATCH] D151465: [Dexter] Remove builder from Dexter
Stephen Tozer via Phabricator via llvm-commits
- [PATCH] D151349: [HIP] emit macro `__HIP_NO_IMAGE_SUPPORT`
Yaxun Liu via Phabricator via llvm-commits
- [PATCH] D150769: [SelectionDAG][computeKnownBits]: Move ISD::ADD/ISD::SUB into their own cases
Dhruv Chawla via Phabricator via llvm-commits
- [PATCH] D151436: [compiler-rt][SelectionDAG] Add extendbfsf2 libcall and use it for bf16 extends with soft FP
Alex Bradbury via Phabricator via llvm-commits
- [llvm] aceaea6 - [Inliner] Mark inlinings stopped with inlining history as noinline
Arthur Eubanks via llvm-commits
- [PATCH] D151459: [GlobalIsel][X86] Legalize G_CTLZ and G_CTPOP for 32-bit
Simon Pilgrim via Phabricator via llvm-commits
- [PATCH] D150989: [Inliner] Mark inlinings stopped with inlining history as noinline
Arthur Eubanks via Phabricator via llvm-commits
- [PATCH] D151459: [GlobalIsel][X86] Legalize G_CTLZ and G_CTPOP for 32-bit
Simon Pilgrim via Phabricator via llvm-commits
- [PATCH] D151468: [RISCV] Use v(f)slide1up for shuffle+insert idiom
Philip Reames via Phabricator via llvm-commits
- [PATCH] D151468: [RISCV] Use v(f)slide1up for shuffle+insert idiom
Philip Reames via Phabricator via llvm-commits
- [PATCH] D151245: [InstCombine] Add regression test cases for bitreverse optimization; NFC
Noah Goldstein via Phabricator via llvm-commits
- [PATCH] D151463: [AMDGPU] 4-align SGPR triples
Matt Arsenault via Phabricator via llvm-commits
- [PATCH] D151459: [GlobalIsel][X86] Legalize G_CTLZ and G_CTPOP for 32-bit
Thorsten via Phabricator via llvm-commits
- [PATCH] D150769: [SelectionDAG][computeKnownBits]: Move ISD::ADD/ISD::SUB into their own cases
Craig Topper via Phabricator via llvm-commits
- [PATCH] D149486: [RISCV] Strengthen atomic ordering for sequentially consistent stores
Paul Kirth via Phabricator via llvm-commits
- [PATCH] D151470: [RISCV][NFC] Make Reduction scheduler resources SEW aware
Michael Maitland via Phabricator via llvm-commits
- [PATCH] D151470: [RISCV][NFC] Make Reduction scheduler resources SEW aware
Michael Maitland via Phabricator via llvm-commits
- [PATCH] D151470: [RISCV][NFC] Make Reduction scheduler resources SEW aware
Michael Maitland via Phabricator via llvm-commits
- [PATCH] D151472: [SelectionDAG][AArch64][ARM] Remove setFlags call from DAGTypeLegalizer::SetPromotedInteger.
Craig Topper via Phabricator via llvm-commits
- [PATCH] D149864: [M68k] Add new calling convention M68k_RTD
Min-Yih Hsu via Phabricator via llvm-commits
- [PATCH] D151459: [GlobalIsel][X86] Legalize G_CTLZ and G_CTPOP for 32-bit
Simon Pilgrim via Phabricator via llvm-commits
- [PATCH] D14327: IR: Add llvm.ldexp and llvm.experimental.constrained.ldexp intrinsics
Joshua Cranmer via Phabricator via llvm-commits
- [PATCH] D151459: [GlobalIsel][X86] Legalize G_CTLZ and G_CTPOP for 32-bit
Thorsten via Phabricator via llvm-commits
- [PATCH] D86126: Fix issue 47160: "`llvm::is_trivially_copyable` -- static assertion failure after DR 1734"
Nicole Mazzuca via Phabricator via llvm-commits
- [PATCH] D149393: [AMDGPU][IGLP] Parameterize the SchedGroup processing / linking in Solver
Austin Kerbow via Phabricator via llvm-commits
- [compiler-rt] 150470a - Fix "[sanitizer_common] Support stripping interceptor prefixes in RenderFrame()"
Marco Elver via llvm-commits
- [PATCH] D151472: [SelectionDAG][AArch64][ARM] Remove setFlags call from DAGTypeLegalizer::SetPromotedInteger.
Eli Friedman via Phabricator via llvm-commits
- [PATCH] D151473: [LegalizeTypes][AArch64][ARM] Teach PromoteIntegerResult to preserve NSW/NUW flags for ADD/SUB.
Craig Topper via Phabricator via llvm-commits
- [PATCH] D151459: [GlobalIsel][X86] Legalize G_CTLZ and G_CTPOP for 32-bit
Thorsten via Phabricator via llvm-commits
- [PATCH] D147285: [Support] Extended llvm-profdata's merge functionality to exclude profiles from functions matching configurable patterns
NILANJANA BASU via Phabricator via llvm-commits
- [PATCH] D151470: [RISCV][NFC] Make Reduction scheduler resources SEW aware
Michael Maitland via Phabricator via llvm-commits
- [PATCH] D151353: [DebugInfo] Add error-handling to DWARFAbbreviationDeclarationSet
Alex Langford via Phabricator via llvm-commits
- [PATCH] D150859: [llvm-objcopy][ELF] Preserve sh_link to .symtab when applicable
Fangrui Song via Phabricator via llvm-commits
- [PATCH] D151473: [LegalizeTypes][AArch64][ARM] Teach PromoteIntegerResult to preserve NSW/NUW flags for ADD/SUB.
Eli Friedman via Phabricator via llvm-commits
- [llvm] 8cdbf8d - [SelectionDAG][AArch64][ARM] Remove setFlags call from DAGTypeLegalizer::SetPromotedInteger.
Craig Topper via llvm-commits
- [PATCH] D151472: [SelectionDAG][AArch64][ARM] Remove setFlags call from DAGTypeLegalizer::SetPromotedInteger.
Craig Topper via Phabricator via llvm-commits
- [PATCH] D150859: [llvm-objcopy][ELF] Preserve sh_link to .symtab when applicable
Fangrui Song via Phabricator via llvm-commits
- [PATCH] D146776: [llvm] Preliminary fat-lto-objects support
Paul Kirth via Phabricator via llvm-commits
- [compiler-rt] 11ea40c - [scudo] releaseToOSMaybe can fail if it can't allocate PageMap
Chia-hung Duan via llvm-commits
- [PATCH] D151458: [RISCV] Support TLSDESC in the RISC-V backend
Fangrui Song via Phabricator via llvm-commits
- [PATCH] D151473: [LegalizeTypes][AArch64][ARM] Teach PromoteIntegerResult to preserve NSW/NUW flags for ADD/SUB.
Craig Topper via Phabricator via llvm-commits
- [PATCH] D151459: [GlobalIsel][X86] Legalize G_CTLZ and G_CTPOP for 32-bit
Simon Pilgrim via Phabricator via llvm-commits
- [PATCH] D151458: [RISCV] Support TLSDESC in the RISC-V backend
Paul Kirth via Phabricator via llvm-commits
- [PATCH] D150667: [GlobalIsel][X86] Legalize G_BSWAP
Simon Pilgrim via Phabricator via llvm-commits
- [PATCH] D150859: [llvm-objcopy][ELF] Preserve sh_link to .symtab when applicable
Andrew Ng via Phabricator via llvm-commits
- [PATCH] D151459: [GlobalIsel][X86] Legalize G_CTLZ and G_CTPOP for 32-bit
Matt Arsenault via Phabricator via llvm-commits
- [PATCH] D150667: [GlobalIsel][X86] Legalize G_BSWAP
Thorsten via Phabricator via llvm-commits
- [PATCH] D150297: [X86] Use RIP-relative addressing for data under large data threshold for medium code model
Arthur Eubanks via Phabricator via llvm-commits
- [PATCH] D151459: [GlobalIsel][X86] Legalize G_CTLZ and G_CTPOP for 32-bit
Thorsten via Phabricator via llvm-commits
- [PATCH] D151436: [compiler-rt][SelectionDAG] Add extendbfsf2 libcall and use it for bf16 extends with soft FP
Matt Arsenault via Phabricator via llvm-commits
- [PATCH] D140347: SelectionDAG: Teach ComputeKnownBits about VSCALE
Craig Topper via Phabricator via llvm-commits
- [PATCH] D146776: [llvm] Preliminary fat-lto-objects support
Teresa Johnson via Phabricator via llvm-commits
- [PATCH] D151458: [RISCV] Support TLSDESC in the RISC-V backend
Paul Kirth via Phabricator via llvm-commits
- [PATCH] D151473: [LegalizeTypes][AArch64][ARM] Teach PromoteIntegerResult to preserve NSW/NUW flags for ADD/SUB.
Nikita Popov via Phabricator via llvm-commits
- [PATCH] D151482: [LV] Add support for minimum/maximum intrinsics
Anna Thomas via Phabricator via llvm-commits
- [llvm] 1d1f7ee - [InstCombine] Add regression test cases for bitreverse optimization; NFC
Noah Goldstein via llvm-commits
- [llvm] 68c5d46 - [InstCombine] Improve bitreverse optimization
Noah Goldstein via llvm-commits
- [PATCH] D151245: [InstCombine] Add regression test cases for bitreverse optimization; NFC
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Artem Belevich via llvm-commits
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Artem Belevich via llvm-commits
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Artem Belevich via llvm-commits
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Alexander Timofeev via llvm-commits
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- [PATCH] D151500: [RISCV] Don't scalarize vector stores if volatile
Luke Lau via Phabricator via llvm-commits
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Arthur Eubanks via Phabricator via llvm-commits
- [PATCH] D146753: [llvm-readobj] Include section information in summary
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Nick Desaulniers via llvm-commits
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Paul Kirth via Phabricator via llvm-commits
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- [PATCH] D149423: [ValueTracking] Use knownbits interface for determining if `div`/`rem` are safe to speculate
Noah Goldstein via Phabricator via llvm-commits
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Noah Goldstein via Phabricator via llvm-commits
- [PATCH] D146348: [InstCombine] Add more tests for folding irem/idiv/mul with select; NFC
Noah Goldstein via Phabricator via llvm-commits
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Noah Goldstein via Phabricator via llvm-commits
- [PATCH] D149345: [Utils] Added the ability to print the pass number and IR after it is triggered
Arthur Eubanks via Phabricator via llvm-commits
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Anshil Gandhi via Phabricator via llvm-commits
- [PATCH] D151506: [RISCV] Fix typo VLUpperBound to VLEN in SiFive7. NFC.
Michael Maitland via Phabricator via llvm-commits
- [PATCH] D123496: [RISCV] Add Stackmap/Statepoint/Patchpoint support without targets
Philip Reames via Phabricator via llvm-commits
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- [compiler-rt] a2b677e - [fuzzer] Don't hard-code page size in FuzzerUtil.h
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Jin Xin Ng via llvm-commits
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Craig Topper via Phabricator via llvm-commits
- [PATCH] D151506: [RISCV] Fix typo VLUpperBound to VLEN in SiFive7. NFC.
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Craig Topper via Phabricator via llvm-commits
- [PATCH] D151344: Reland "[CMake] Bumps minimum version to 3.20.0.
H. Vetinari via Phabricator via llvm-commits
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Craig Topper via Phabricator via llvm-commits
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Craig Topper via Phabricator via llvm-commits
- [PATCH] D150427: [AMDGPU] Non hostcall printf support for HIP
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- [PATCH] D151534: [RISCV] Add more tests in zdinx-boundary-check.ll
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Jessica Clarke via Phabricator via llvm-commits
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- [PATCH] D151397: [3/N][RISCV] Model vxrm in C intrinsics for RVV fixed-point instruction vaadd
Yueh-Ting (eop) Chen via Phabricator via llvm-commits
- [PATCH] D150824: [RISCV] Lower experimental_get_vector_length intrinsic to vsetvli for some cases.
Craig Topper via Phabricator via llvm-commits
- [llvm] a22ef95 - [AMDGPUCodegenPrepare] Add NewPM Support
Anshil Gandhi via llvm-commits
- [PATCH] D151241: [AMDGPUCodegenPrepare] Add NewPM Support
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- [llvm] f9e64ae - [lit][NFC] Fix a couple of typos
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Mateja Marjanovic via Phabricator via llvm-commits
- [PATCH] D150700: [LV] Stability fix for outerloop vectorization
Kolya Panchenko via Phabricator via llvm-commits
- [PATCH] D147812: [InstrProf] Use BalancedPartitioning to order temporal profiling trace data
Ellis Hoag via Phabricator via llvm-commits
- [PATCH] D147812: [InstrProf] Use BalancedPartitioning to order temporal profiling trace data
Ellis Hoag via Phabricator via llvm-commits
- [PATCH] D151561: [RISCV][InsertVSETVLI] Avoid vmv.s.x SEW toggle if at start of block
Luke Lau via Phabricator via llvm-commits
- [PATCH] D151561: [RISCV][InsertVSETVLI] Avoid vmv.s.x SEW toggle if at start of block
Luke Lau via Phabricator via llvm-commits
- [PATCH] D151457: [TableGen] Add !getdagargs and !getdagnames
Michael Liao via Phabricator via llvm-commits
- [PATCH] D150375: [FuncSpec] Replace LoopInfo with BlockFrequencyInfo.
Arthur Eubanks via Phabricator via llvm-commits
- [PATCH] D151534: [RISCV] Add more tests in zdinx-boundary-check.ll
Shao-Ce SUN via Phabricator via llvm-commits
- [llvm] a4f437f - SelectionDAG: Teach ComputeKnownBits about VSCALE
Craig Topper via llvm-commits
- [PATCH] D140347: SelectionDAG: Teach ComputeKnownBits about VSCALE
Craig Topper via Phabricator via llvm-commits
- [PATCH] D151552: [compiler-rt] Refactor memintrinsic interceptors
Vitaly Buka via Phabricator via llvm-commits
- [PATCH] D151568: [PseudoProbe] Do not force the calliste debug loc to inlined probes from __nodebug__ functions.
Wenlei He via Phabricator via llvm-commits
- [PATCH] D149893: Rewrite LSV to handle longer chains.
Justin Lebar via Phabricator via llvm-commits
- [PATCH] D149893: Rewrite LSV to handle longer chains.
Justin Lebar via Phabricator via llvm-commits
- [PATCH] D148010: [Pipelines] Don't run module optimization in full LTO pre-link
Shoaib Meenai via Phabricator via llvm-commits
- [PATCH] D151568: [PseudoProbe] Do not force the calliste debug loc to inlined probes from __nodebug__ functions.
Hongtao Yu via Phabricator via llvm-commits
- [PATCH] D151568: [PseudoProbe] Do not force the calliste debug loc to inlined probes from __nodebug__ functions.
Hongtao Yu via Phabricator via llvm-commits
- [llvm] e892193 - [SLP][NFC]Add a test for spill cost, NFC.
Alexey Bataev via llvm-commits
- [PATCH] D150859: [llvm-objcopy][ELF] Preserve sh_link to .symtab when applicable
Andrew Ng via Phabricator via llvm-commits
- [PATCH] D151470: [RISCV][NFC] Make Reduction scheduler resources SEW aware
Craig Topper via Phabricator via llvm-commits
- [PATCH] D149393: [AMDGPU][IGLP] Parameterize the SchedGroup processing / linking in Solver
Jeffrey Byrnes via Phabricator via llvm-commits
- [llvm] dcd5f31 - [RISCV] Tighten type constraint for RISCVISD::FCLASS_VL.
Craig Topper via llvm-commits
- [PATCH] D151568: [PseudoProbe] Do not force the calliste debug loc to inlined probes from __nodebug__ functions.
Wenlei He via Phabricator via llvm-commits
- [PATCH] D151396: [2/N][RISCV] Model vxrm in LLVM intrinsics and machine instructions for RVV fixed-point instructions
Craig Topper via Phabricator via llvm-commits
- [llvm] 1fea6bd - [RISCV] Remove extra MVT::Other result from creation of RISCVISD::FCLASS_VL.
Craig Topper via llvm-commits
- [PATCH] D151176: [RISCV] Custom lower vector llvm.is.fpclass to vfclass.v
Craig Topper via Phabricator via llvm-commits
- [PATCH] D151579: Fix -u option in dsymutil, to not emit an extra DW_LNE_set_address if the original line table was empty
Shubham Sandeep Rastogi via Phabricator via llvm-commits
- [PATCH] D151579: Fix -u option in dsymutil, to not emit an extra DW_LNE_set_address if the original line table was empty
Shubham Sandeep Rastogi via Phabricator via llvm-commits
- [llvm] 9b9e9ab - [RISCV] Simplify code in LowerIS_FPCLASS. NFC
Craig Topper via llvm-commits
- [llvm] 95b6311 - [SLP]Fix getSpillCost functions.
Alexey Bataev via llvm-commits
- [PATCH] D32198: [TySan] A Type Sanitizer (LLVM)
Florian Hahn via Phabricator via llvm-commits
- [llvm] 7c91d82 - [PhaseOrdering] Add test for loop over span with hardened libc++.
Florian Hahn via llvm-commits
- [llvm] 23da210 - [PseudoProbe] Do not force the calliste debug loc to inlined probes from __nodebug__ functions.
Hongtao Yu via llvm-commits
- [PATCH] D151568: [PseudoProbe] Do not force the calliste debug loc to inlined probes from __nodebug__ functions.
Hongtao Yu via Phabricator via llvm-commits
- [PATCH] D149404: [ValueTracking][InstCombine] Add a new API to allow to ignore poison generating flags or metadatas when implying poison
Florian Hahn via Phabricator via llvm-commits
- [PATCH] D151579: Fix -u option in dsymutil, to not emit an extra DW_LNE_set_address if the original line table was empty
Shubham Sandeep Rastogi via Phabricator via llvm-commits
- [PATCH] D149404: [ValueTracking][InstCombine] Add a new API to allow to ignore poison generating flags or metadatas when implying poison
Nikita Popov via Phabricator via llvm-commits
- [PATCH] D149893: Rewrite LSV to handle longer chains.
Justin Lebar via Phabricator via llvm-commits
- [PATCH] D123803: [WIP][llvm] A Unified LTO Bitcode Frontend
Matthew Voss via Phabricator via llvm-commits
- [PATCH] D123804: [WIP][clang][lld] A Unified LTO Bitcode Frontend
Matthew Voss via Phabricator via llvm-commits
- [PATCH] D123971: [clang][PS4] Enable SplitLTOUnits by default
Matthew Voss via Phabricator via llvm-commits
- [PATCH] D141712: [GVN] Improve PRE on load instructions
Guozhi Wei via Phabricator via llvm-commits
- [PATCH] D151434: [RISCV] Generalise shouldExtendTypeInLibcall logic to apply to all <XLEN floats on soft ABIs
Alex Bradbury via Phabricator via llvm-commits
- [PATCH] D151563: [SelectionDAG] Implement soft FP legalisation for bf16 FP_EXTEND and BF16_TO_FP
Alex Bradbury via Phabricator via llvm-commits
- [PATCH] D151499: [MLIR] Reformat the Bazel build
Aart Bik via Phabricator via llvm-commits
- [PATCH] D151579: Fix -u option in dsymutil, to not emit an extra DW_LNE_set_address if the original line table was empty
Jonas Devlieghere via Phabricator via llvm-commits
- [PATCH] D151457: [TableGen] Add !getdagargs and !getdagnames
Michael Liao via Phabricator via llvm-commits
- [PATCH] D148915: [TableGen] Introduce function and lambda
Artem Belevich via Phabricator via llvm-commits
- [llvm] 1610627 - [llvm-debuginfod][NFC] Switch to OptTable
Daniel Thornburgh via llvm-commits
- [PATCH] D151273: [llvm-debuginfod][NFC] Switch to OptTable
Daniel Thornburgh via Phabricator via llvm-commits
- [PATCH] D151593: [MemProf] Clean up MemProf instrumentation pass invocation
Teresa Johnson via Phabricator via llvm-commits
- [PATCH] D151595: [BOLT][CMake] Use LLVM macros for install targets
Petr Hosek via Phabricator via llvm-commits
- [PATCH] D151593: [MemProf] Clean up MemProf instrumentation pass invocation
Vitaly Buka via Phabricator via llvm-commits
- [llvm] 2be0abb - Rewrite load-store-vectorizer.
Justin Lebar via llvm-commits
- [PATCH] D149893: Rewrite LSV to handle longer chains.
Justin Lebar via Phabricator via llvm-commits
- [PATCH] D148010: [Pipelines] Don't run module optimization in full LTO pre-link
Nathan Lanza via Phabricator via llvm-commits
- [PATCH] D151593: [MemProf] Clean up MemProf instrumentation pass invocation
Teresa Johnson via Phabricator via llvm-commits
- [PATCH] D148915: [TableGen] Introduce function and lambda
Artem Belevich via Phabricator via llvm-commits
- [PATCH] D151593: [MemProf] Clean up MemProf instrumentation pass invocation
Vitaly Buka via Phabricator via llvm-commits
- [PATCH] D151596: [RISCV] Teach performCombineVMergeAndVOps to handle instructions FMA instructions.
Craig Topper via Phabricator via llvm-commits
- [PATCH] D149893: Rewrite LSV to handle longer chains.
Justin Lebar via Phabricator via llvm-commits
- [PATCH] D148915: [TableGen] Introduce function and lambda
Artem Belevich via Phabricator via llvm-commits
- [PATCH] D151593: [MemProf] Clean up MemProf instrumentation pass invocation
Vitaly Buka via Phabricator via llvm-commits
- [llvm] 6585599 - Fix test failure after 2be0abb7fe7 (caused by bad merge, sorry).
Justin Lebar via llvm-commits
- [PATCH] D149893: Rewrite LSV to handle longer chains.
Justin Lebar via Phabricator via llvm-commits
- [PATCH] D150264: [libcxx] Add strict weak ordering checks to sorting algorithms
Nikolas Klauser via Phabricator via llvm-commits
- [PATCH] D151593: [MemProf] Clean up MemProf instrumentation pass invocation
Teresa Johnson via Phabricator via llvm-commits
- [PATCH] D151598: Small typo in the instruction comments of WithColor header
Dirk MG Seynhaeve via Phabricator via llvm-commits
- [PATCH] D144500: [BOLT] stale profile matching [part 1 out of 2]
Maksim Panchenko via Phabricator via llvm-commits
- [PATCH] D144911: adding bf16 support to NVPTX
Artem Belevich via Phabricator via llvm-commits
- [PATCH] D149893: Rewrite LSV to handle longer chains.
Craig Topper via Phabricator via llvm-commits
- [PATCH] D149893: Rewrite LSV to handle longer chains.
Thurston Dang via Phabricator via llvm-commits
- [PATCH] D149893: Rewrite LSV to handle longer chains.
Justin Lebar via Phabricator via llvm-commits
- [llvm] 8d57b00 - Fix -Wsign-compare from D149893.
Justin Lebar via llvm-commits
- [PATCH] D149893: Rewrite LSV to handle longer chains.
Justin Lebar via Phabricator via llvm-commits
- [PATCH] D151593: [MemProf] Clean up MemProf instrumentation pass invocation
Snehasish Kumar via Phabricator via llvm-commits
- [llvm] 28ab032 - [RISCV] Add isel patterns to form tail undisturbed vfwadd.wv from fpextend_vl+vfwadd_vl+vp_merge.
Craig Topper via llvm-commits
- [llvm] 0508ac3 - [Vectorize] Fix a warning
Kazu Hirata via llvm-commits
- [PATCH] D144911: adding bf16 support to NVPTX
Artem Belevich via Phabricator via llvm-commits
- [llvm] b1b04ed - [Vectorize] Fix warnings
Kazu Hirata via llvm-commits
- [PATCH] D151593: [MemProf] Clean up MemProf instrumentation pass invocation
Teresa Johnson via Phabricator via llvm-commits
- [llvm] f354e97 - [MemProf] Clean up MemProf instrumentation pass invocation
Teresa Johnson via llvm-commits
- [PATCH] D151602: [TableGen] Add !getdagarg and !getdagname
Michael Liao via Phabricator via llvm-commits
- [PATCH] D151457: [TableGen] Add !getdagargs and !getdagnames
Michael Liao via Phabricator via llvm-commits
- [PATCH] D151457: [TableGen] Add !getdagargs and !getdagnames
Michael Liao via Phabricator via llvm-commits
- [llvm] a919a3a - [CodeGen][NFC] Declare copy constructor & copy assignment as deleted for ScheduleDAG
Shengchen Kan via llvm-commits
- [PATCH] D151538: [CodeGen][NFC] Declare copy constructor & copy assignment as deleted for ScheduleDAG
Kan Shengchen via Phabricator via llvm-commits
- [llvm] b33dcc5 - [hwasan] support hwasan-match-all-tag flag for callback memory access instrumentation
via llvm-commits
- [PATCH] D149580: [hwasan] support hwasan-match-all-tag flag for callback memory access instrumentation
Mingjie Xu via Phabricator via llvm-commits
- [compiler-rt] ba13e1b - [hwasan] support hwasan-match-all-tag flag for hwasan meminstrinsic calls
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- [PATCH] D149943: [hwasan] support hwasan-match-all-tag flag for hwasan meminstrinsic calls
Mingjie Xu via Phabricator via llvm-commits
- [PATCH] D151605: [NFC][HWASAN] make variables names for callback functions more consistent
Mingjie Xu via Phabricator via llvm-commits
- [llvm] addc156 - [CodeGen] Remove unused MachineMemOperand::Profile (NFC)
Sergei Barannikov via llvm-commits
- [PATCH] D147763: [ARM] Emit code alignment after .arm and .thumb directives
Antonio Abbatangelo via Phabricator via llvm-commits
- [PATCH] D151567: [LLVM][Support] Report EISDIR when opening a directory on AIX
Serge Pavlov via Phabricator via llvm-commits
- [PATCH] D151273: [llvm-debuginfod][NFC] Switch to OptTable
Michał Górny via Phabricator via llvm-commits
- [PATCH] D149404: [ValueTracking][InstCombine] Add a new API to allow to ignore poison generating flags or metadatas when implying poison
luxufan via Phabricator via llvm-commits
- [PATCH] D138278: TableGen: honor LLVM_LINK_LLVM_DYLIB by default
Tobias Grosser via Phabricator via llvm-commits
- [PATCH] D151394: [LSR] Treat URem as uninteresting
Nikita Popov via Phabricator via llvm-commits
- [PATCH] D151344: Reland "[CMake] Bumps minimum version to 3.20.0.
Mark de Wever via Phabricator via llvm-commits
- [polly] cbaa359 - Reland "[CMake] Bumps minimum version to 3.20.0.
Mark de Wever via llvm-commits
- [compiler-rt] cbaa359 - Reland "[CMake] Bumps minimum version to 3.20.0.
Mark de Wever via llvm-commits
- [PATCH] D151344: Reland "[CMake] Bumps minimum version to 3.20.0.
Mark de Wever via Phabricator via llvm-commits
- [PATCH] D150967: (WIP) [MemCpyOpt] precommit test for memcpy removal for immutable arguments from attributes (NFC)
Kohei Asano via Phabricator via llvm-commits
- [PATCH] D150967: (WIP) [MemCpyOpt] precommit test for memcpy removal for immutable arguments from attributes (NFC)
Kohei Asano via Phabricator via llvm-commits
- [PATCH] D150967: (WIP) [MemCpyOpt] precommit test for memcpy removal for immutable arguments from attributes (NFC)
Kohei Asano via Phabricator via llvm-commits
- [llvm] 0f8e0f4 - [X86] lowerBuildVectorAsBroadcast - broadcast Constant of original (BuildVector) element size
Simon Pilgrim via llvm-commits
- [PATCH] D151349: [HIP] emit macro `__HIP_NO_IMAGE_SUPPORT`
Yaxun Liu via Phabricator via llvm-commits
- [PATCH] D151613: Do not set CMAKE_CXX_FLAGS_<config> with FORCE
Artemy via Phabricator via llvm-commits
- [PATCH] D151459: [GlobalIsel][X86] Legalize G_CTLZ and G_CTPOP for 32-bit
Thorsten via Phabricator via llvm-commits
- [llvm] 1845d9d - [CGP] Disable default copy ctor and copy assignment operator for InstructionRemover
Bing1 Yu via llvm-commits
- [PATCH] D151543: [CGP] Disable default copy ctor and copy assignment operator for InstructionRemover
Bing Yu via Phabricator via llvm-commits
- [PATCH] D89492: [compiler-rt] Enable building builtins using top-level CMake file
Sergei Barannikov via Phabricator via llvm-commits
- [PATCH] D69542: Full Restrict Support - single patch
Jeroen Dobbelaere via Phabricator via llvm-commits
- [llvm] 96b59b4 - [Hexagon] Use scalar evolution to calculate pointer difference in HVC
Krzysztof Parzyszek via llvm-commits
- [PATCH] D144565: dwp check overflow
zhuna via Phabricator via llvm-commits
- [PATCH] D151614: [BOLT] Align BranchInfo and FuncBranchData in DataAggregator::recordTrace
Amir Ayupov via Phabricator via llvm-commits
- [polly] 27f7546 - [polly] Fix typos in documentation
Kazu Hirata via llvm-commits
- [PATCH] D151510: [BOLT] Add skip-non-simple for boltdiff
Amir Ayupov via Phabricator via llvm-commits
- [llvm] d679cdd - [Bitcode] Modernize PerBlockIDStats (NFC)
Kazu Hirata via llvm-commits
- [PATCH] D150980: [AMDGPU][AsmParser][NFC] Refine parsing of NamedOperandU32 operands.
Dmitry Preobrazhensky via Phabricator via llvm-commits
- [PATCH] D151616: [Transforms][Reassociate] "Reassociate expressions" pass optimizations not always profitable
Paul Osmialowski via Phabricator via llvm-commits
- [PATCH] D151616: [Transforms][Reassociate] "Reassociate expressions" pass optimizations not always profitable
Paul Osmialowski via Phabricator via llvm-commits
- [PATCH] D151617: A test case for the revision D151616
Paul Osmialowski via Phabricator via llvm-commits
- [PATCH] D151616: [Transforms][Reassociate] "Reassociate expressions" pass optimizations not always profitable
Thorsten via Phabricator via llvm-commits
- [llvm] f104d64 - [gn] port b22965df1304
Nico Weber via llvm-commits
- [PATCH] D151616: [Transforms][Reassociate] "Reassociate expressions" pass optimizations not always profitable
Nikita Popov via Phabricator via llvm-commits
- [llvm] 6260153 - [gn build] Port ddeab07ca632
LLVM GN Syncbot via llvm-commits
- [llvm] 6607f62 - [ConstraintElimination] Add tests with incrementing pointer IV.
Florian Hahn via llvm-commits
- [PATCH] D151499: [MLIR] Reformat the Bazel build
Aart Bik via Phabricator via llvm-commits
- [PATCH] D151618: [mlir][bazel] Port for 660f714, third attempt
Eugene Burmako via Phabricator via llvm-commits
- [PATCH] D151618: [mlir][bazel] Port for 660f714, third attempt
Aart Bik via Phabricator via llvm-commits
- [PATCH] D151273: [llvm-debuginfod][NFC] Switch to OptTable
Nico Weber via Phabricator via llvm-commits
- [PATCH] D147763: [ARM] Emit code alignment after .arm and .thumb directives
Fangrui Song via Phabricator via llvm-commits
- [PATCH] D151013: [CMake] Add option to link LLVM/subproject executables
Aiden Grossman via Phabricator via llvm-commits
- [PATCH] D151013: [CMake] Add option to link LLVM/subproject executables
Aiden Grossman via Phabricator via llvm-commits
- [PATCH] D150967: (WIP) [MemCpyOpt] precommit test for memcpy removal for immutable arguments from attributes (NFC)
Kohei Asano via Phabricator via llvm-commits
- [PATCH] D134599: [RISCV] Readjusting the framestack for Zcmp
Xinlong Wu via Phabricator via llvm-commits
- [PATCH] D134893: [LSR][TTI][RISCV] Add isAllowTerminatingConditionFoldingAfterLSR into TTI and enable it for RISC-V
Yueh-Ting (eop) Chen via Phabricator via llvm-commits
- [llvm] 65f40cb - [ModuleInliner] Remove an inapplicable comment
Kazu Hirata via llvm-commits
- [PATCH] D150862: [RISCV][CodeGenPrepare] Select the optimal base offset for GEPs with large offset
Yingwei Zheng via Phabricator via llvm-commits
- [PATCH] D151596: [RISCV] Teach performCombineVMergeAndVOps to handle instructions FMA instructions.
Yeting Kuo via Phabricator via llvm-commits
- [PATCH] D150862: [RISCV][CodeGenPrepare] Select the optimal base offset for GEPs with large offset
Yingwei Zheng via Phabricator via llvm-commits
- [PATCH] D151406: [Hexagon] Check if register is non-null before calling subregs_inclusive
Sergei Barannikov via Phabricator via llvm-commits
- [PATCH] D151626: [MemCpyOpt] clarify the comment in byval alignment test(NFC)
Kohei Asano via Phabricator via llvm-commits
- [PATCH] D151395: [1/N][RISCV] Define machine instruction to write an immediate into vxrm
Yueh-Ting (eop) Chen via Phabricator via llvm-commits
- [PATCH] D150579: [*]: fix syntax errors in HTML files
Mohammed Keyvanzadeh via Phabricator via llvm-commits
- [PATCH] D149129: [CodeGen] fix ungated debug call
Ezra Shaw via Phabricator via llvm-commits
- [PATCH] D151468: [RISCV] Use v(f)slide1up for shuffle+insert idiom
Fraser Cormack via Phabricator via llvm-commits
- [PATCH] D151626: [MemCpyOpt] clarify the comment in byval alignment test(NFC)
Nikita Popov via Phabricator via llvm-commits
- [PATCH] D145341: [InstCombine] Add transform `(icmp pred (shl {nsw and/or nuw} X, Y), C)` -> `(icmp pred X, C)`
Nikita Popov via Phabricator via llvm-commits
- [PATCH] D145340: [InstCombine] Add tests for tranforming `(icmp pred (shl {nsw and/or nuw} X, Y), C)`; NFC
Nikita Popov via Phabricator via llvm-commits
- [PATCH] D145425: [InstCombine] Transform `(icmp ult/uge (and X, Y), X)` -> `(icmp ne/eq (and X, Y), X)`
Nikita Popov via Phabricator via llvm-commits
- [PATCH] D145424: [InstCombine] Add tests for transforming `(icmp pred (and X, Y), X)`; NFC
Nikita Popov via Phabricator via llvm-commits
- [PATCH] D144941: [m68k] Add TLS Support
John Paul Adrian Glaubitz via Phabricator via llvm-commits
- [PATCH] D144610: [InstCombine] Add transforms for `(icmp upred (or X, Y), X)`
Nikita Popov via Phabricator via llvm-commits
- [PATCH] D138135: [lld][ELF] Support LoongArch
WÁNG Xuěruì via Phabricator via llvm-commits
- [PATCH] D144565: dwp check overflow
Alexander Yermolovich via Phabricator via llvm-commits
- [PATCH] D144565: dwp check overflow
zhuna via Phabricator via llvm-commits
- [PATCH] D149893: Rewrite LSV to handle longer chains.
Ron Lieberman via Phabricator via llvm-commits
- [PATCH] D149893: Rewrite LSV to handle longer chains.
Justin Lebar via Phabricator via llvm-commits
- [PATCH] D149893: Rewrite LSV to handle longer chains.
Justin Lebar via Phabricator via llvm-commits
- [PATCH] D151630: [LSV] Fix the ContextInst for computeKnownBits.
Justin Lebar via Phabricator via llvm-commits
- [PATCH] D149893: Rewrite LSV to handle longer chains.
Justin Lebar via Phabricator via llvm-commits
- [PATCH] D151630: [LSV] Fix the ContextInst for computeKnownBits.
Ron Lieberman via Phabricator via llvm-commits
- [PATCH] D151630: [LSV] Fix the ContextInst for computeKnownBits.
Justin Lebar via Phabricator via llvm-commits
- [PATCH] D151630: [LSV] Fix the ContextInst for computeKnownBits.
Justin Lebar via Phabricator via llvm-commits
- [llvm] f225471 - [LSV] Fix the ContextInst for computeKnownBits.
Justin Lebar via llvm-commits
- [PATCH] D151630: [LSV] Fix the ContextInst for computeKnownBits.
Justin Lebar via Phabricator via llvm-commits
- [PATCH] D151631: [InstSimplify] Simplify select i1 ConstExpr, i1 true, i1 false to ConstExpr
luxufan via Phabricator via llvm-commits
- [llvm] 8a4e367 - [Hexagon] Explicitly make vector subregs have unknown size and offset
Krzysztof Parzyszek via llvm-commits
- [PATCH] D151631: [InstSimplify] Simplify select i1 ConstExpr, i1 true, i1 false to ConstExpr
Nikita Popov via Phabricator via llvm-commits
- [PATCH] D144610: [InstCombine] Add transforms for `(icmp upred (or X, Y), X)`
Noah Goldstein via Phabricator via llvm-commits
- [PATCH] D144610: [InstCombine] Add transforms for `(icmp upred (or X, Y), X)`
Noah Goldstein via Phabricator via llvm-commits
- [PATCH] D151099: [InstCombine] Remove computeKnownBits() fold for returns
Noah Goldstein via Phabricator via llvm-commits
- [PATCH] D151630: [LSV] Fix the ContextInst for computeKnownBits.
Ron Lieberman via Phabricator via llvm-commits
- [PATCH] D151630: [LSV] Fix the ContextInst for computeKnownBits.
Ron Lieberman via Phabricator via llvm-commits
- [llvm] 0a762ec - [ARM] Allow D-reg copies to use VMOVD with fpregs64
David Green via llvm-commits
- [PATCH] D145163: Add support for vectorization of interleaved memory accesses for scalable VF
Florian Hahn via Phabricator via llvm-commits
- [llvm] 280656e - [LV] Add check line with VF=4 to uniformity test.
Florian Hahn via llvm-commits
- [PATCH] D148841: [LV] Use SCEV for uniformity analysis across VF
Florian Hahn via Phabricator via llvm-commits
- [PATCH] D148841: [LV] Use SCEV for uniformity analysis across VF
Florian Hahn via Phabricator via llvm-commits
- [PATCH] D149889: [TTI] Use users of GEP to guess access type in getGEPCost
Nikita Popov via Phabricator via llvm-commits
- [PATCH] D150583: [IR] Add getAccessType to Instruction
Nikita Popov via Phabricator via llvm-commits
- [PATCH] D131699: add arcanist patch
Uday Bondhugula via Phabricator via llvm-commits
- [lld] a82f2b2 - Fix typos in documentation
Kazu Hirata via llvm-commits
- [llvm] a82f2b2 - Fix typos in documentation
Kazu Hirata via llvm-commits
- [llvm] b66308b - [Bitcode] Modernize PerRecordStats (NFC)
Kazu Hirata via llvm-commits
- [PATCH] D150579: [*]: fix syntax errors in HTML files
Mohammed Keyvanzadeh via Phabricator via llvm-commits
- [PATCH] D150921: [KnownBits] Cleanup some misspelling / logic in {u,s}div
Noah Goldstein via Phabricator via llvm-commits
- [PATCH] D150922: [KnownBits] Return `0` for poison {s,u}div inputs
Noah Goldstein via Phabricator via llvm-commits
- [PATCH] D150923: [KnownBits] Factor out and improve the lowbit computation for {u,s}div
Noah Goldstein via Phabricator via llvm-commits
- [PATCH] D150641: [bazel] Refactor entries in WORKSPACE to bzl files
Matt via Phabricator via llvm-commits
- [PATCH] D150641: [bazel] Refactor entries in WORKSPACE to bzl files
Matt via Phabricator via llvm-commits
- [compiler-rt] 2aef605 - [NFC][sanitizer] Micro optimize push_back()
Vitaly Buka via llvm-commits
- [llvm] af55b0d - [X86][NFC] Fix a bug after D150436 and update some comments
via llvm-commits
- [PATCH] D151527: [X86][NFC] Fix a bug after D150436 and update some comments
Wang, Xin via Phabricator via llvm-commits
- [lld] c384fcd - [lld] Partially revert "Always emit symbol table when dwarf section exists in COFF"
Haohai Wen via llvm-commits
- [PATCH] D151417: [lld] Partially revert "Always emit symbol table when dwarf section exists in COFF"
Haohai, Wen via Phabricator via llvm-commits
- [PATCH] D144565: dwp check overflow
zhuna via Phabricator via llvm-commits
- [PATCH] D150024: use ref to avoid copy in range for-loop
Wang, Xin via Phabricator via llvm-commits
- [llvm] 9032a94 - [NFC][DAGISel] Remove dead code.
via llvm-commits
- [PATCH] D150388: [CodeGen]Allow targets to use target specific COPY instructions for live range splitting
Yashwant Singh via Phabricator via llvm-commits
- [PATCH] D150024: use ref to avoid copy in range for-loop
Kan Shengchen via Phabricator via llvm-commits
- [llvm] fbb241c - use ref to avoid copy in range for-loop
via llvm-commits
- [PATCH] D150024: use ref to avoid copy in range for-loop
Wang, Xin via Phabricator via llvm-commits
- [PATCH] D151630: [LSV] Fix the ContextInst for computeKnownBits.
Justin Lebar via Phabricator via llvm-commits
- [PATCH] D151635: [NFC][TableGen] Remove dead code.
LuoYuanke via Phabricator via llvm-commits
- [PATCH] D151630: [LSV] Fix the ContextInst for computeKnownBits.
Ron Lieberman via Phabricator via llvm-commits
- [PATCH] D150324: [X86] Make constant `mul` -> `shl` + `add`/`sub` work for vector types
Noah Goldstein via Phabricator via llvm-commits
- [PATCH] D131699: add arcanist patch
Uday Bondhugula via Phabricator via llvm-commits
- [PATCH] D131699: add arcanist patch
Uday Bondhugula via Phabricator via llvm-commits
- [PATCH] D151313: [RISCV][BF16] Make backend type bf16 to follow the psABI
Jun Sha via Phabricator via llvm-commits
- [PATCH] D151631: [InstSimplify] Simplify select i1 ConstExpr, i1 true, i1 false to ConstExpr
luxufan via Phabricator via llvm-commits
- [PATCH] D148001: [LICM] Reassociate & hoist sub expressions
Max Kazantsev via Phabricator via llvm-commits
- [PATCH] D145280: [InstCombine] Add transforms for `(icmp (xor X, Y), X)`
Noah Goldstein via Phabricator via llvm-commits
- [PATCH] D144609: [InstCombine] Add tests for transforming `(icmp (or X, Y), X)`; NFC
Noah Goldstein via Phabricator via llvm-commits
- [PATCH] D144610: [InstCombine] Add transforms for `(icmp upred (or X, Y), X)`
Noah Goldstein via Phabricator via llvm-commits
- [PATCH] D144610: [InstCombine] Add transforms for `(icmp upred (or X, Y), X)`
Noah Goldstein via Phabricator via llvm-commits
- [PATCH] D145281: [InstCombine] Add transforms for `(icmp spred (or X, Y), X)`
Noah Goldstein via Phabricator via llvm-commits
- [PATCH] D145424: [InstCombine] Add tests for transforming `(icmp pred (and X, Y), X)`; NFC
Noah Goldstein via Phabricator via llvm-commits
- [PATCH] D145425: [InstCombine] Transform `(icmp ult/uge (and X, Y), X)` -> `(icmp ne/eq (and X, Y), X)`
Noah Goldstein via Phabricator via llvm-commits
- [PATCH] D145426: [InstCombine] Add transforms `(icmp spred (and X, Y), X)` if `X` or `Y` are known signed/unsigned
Noah Goldstein via Phabricator via llvm-commits
- [PATCH] D148001: [LICM] Reassociate & hoist sub expressions
Serguei Katkov via Phabricator via llvm-commits
- [PATCH] D151639: [emacs] Highlight 'nocapture' keyword as an attribute
Noah Goldstein via Phabricator via llvm-commits
- [compiler-rt] 1068cf7 - [NFC][lsan] Rename RootRegion and replace size with end
Vitaly Buka via llvm-commits
- [compiler-rt] e4b02c6 - [NFC][lsan] Make mutex static
Vitaly Buka via llvm-commits
- [compiler-rt] 8ce66a1 - [NFC][lsan] Add CHECKs for root regions
Vitaly Buka via llvm-commits
- [PATCH] D151640: [LSV] Attempt to fix comparison of APInt's with different bit widths.
Justin Lebar via Phabricator via llvm-commits
- [PATCH] D151630: [LSV] Fix the ContextInst for computeKnownBits.
Justin Lebar via Phabricator via llvm-commits
- [PATCH] D151638: [TRE] icmp does not escape an alloca
Joshua Cao via Phabricator via llvm-commits
- [compiler-rt] 0a6aec2 - [NFC][lsan] Change Mac root regions scan
Vitaly Buka via llvm-commits
- [llvm] dd0cf23 - [LICM] Reassociate & hoist sub expressions
Max Kazantsev via llvm-commits
- [PATCH] D148001: [LICM] Reassociate & hoist sub expressions
Max Kazantsev via Phabricator via llvm-commits
- [PATCH] D138135: [lld][ELF] Support LoongArch
WÁNG Xuěruì via Phabricator via llvm-commits
- [PATCH] D147506: [DebugLine] save one debug line entry for empty prologue
ChenZheng via Phabricator via llvm-commits
- [PATCH] D151640: [LSV] Attempt to fix comparison of APInt's with different bit widths.
Thorsten via Phabricator via llvm-commits
- [compiler-rt] 19b7b93 - [lsan] Iterate MemoryMappingLayout once
Vitaly Buka via llvm-commits
- [compiler-rt] 506923a - [lsan] Don't use InternalMmapVectorNoCtor as local var
Vitaly Buka via llvm-commits
- [PATCH] D151019: [llvm-exegesis] Refactor FunctionExecutorImpl and create factory
Aiden Grossman via Phabricator via llvm-commits
- [PATCH] D151020: [llvm-exegesis] Add ability to assign perf counters to specific PID
Aiden Grossman via Phabricator via llvm-commits
- [PATCH] D151021: [llvm-exegesis] Introduce Subprocess Executor Mode
Aiden Grossman via Phabricator via llvm-commits
- [PATCH] D151022: [llvm-exegesis] Introduce SubprocessMemory Utility Class
Aiden Grossman via Phabricator via llvm-commits
- [PATCH] D151023: [llvm-exegesis] Add Target Memory Utility Functions
Aiden Grossman via Phabricator via llvm-commits
- [PATCH] D151024: [llvm-exegesis] Add memory annotation parsing
Aiden Grossman via Phabricator via llvm-commits
- [PATCH] D151626: [MemCpyOpt] clarify the comment in byval alignment test(NFC)
Kohei Asano via Phabricator via llvm-commits
- [PATCH] D151025: [llvm-exegesis] Add support for using memory annotations
Aiden Grossman via Phabricator via llvm-commits
- [PATCH] D151039: [Docs][llvm-exegesis] Add documentation for memory
Aiden Grossman via Phabricator via llvm-commits
- [PATCH] D151626: [MemCpyOpt] clarify the comment in byval alignment test(NFC)
Kohei Asano via Phabricator via llvm-commits
Last message date:
Sun May 28 23:47:09 PDT 2023
Archived on: Sun May 28 23:47:12 PDT 2023
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