[llvm] 7420413 - [AMDGPU] Check if register is non-null before calling isSubRegisterEq (NFCI)

[Sergei Barannikov via llvm-commits]

Author: Sergei Barannikov
Date: 2023-05-24T10:32:07+03:00
New Revision: 74204138f4ebd53e4cb3ef4c49ac9c521b8d21a8

URL: https://github.com/llvm/llvm-project/commit/74204138f4ebd53e4cb3ef4c49ac9c521b8d21a8
DIFF: https://github.com/llvm/llvm-project/commit/74204138f4ebd53e4cb3ef4c49ac9c521b8d21a8.diff

LOG: [AMDGPU] Check if register is non-null before calling isSubRegisterEq (NFCI)

D151036 adds an assertions that prohibits iterating over sub- and
super-registers of a null register. This is already the case when
iterating over register units of a null register, and worked by
accident for sub- and super-registers.

Reviewed By: foad

Differential Revision: https://reviews.llvm.org/D151289

Added: 
    

Modified: 
    llvm/lib/Target/AMDGPU/SIFrameLowering.cpp

Removed: 
    


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diff  --git a/llvm/lib/Target/AMDGPU/SIFrameLowering.cpp b/llvm/lib/Target/AMDGPU/SIFrameLowering.cpp
index 3e45d33fc118..7d97a0703523 100644
--- a/llvm/lib/Target/AMDGPU/SIFrameLowering.cpp
+++ b/llvm/lib/Target/AMDGPU/SIFrameLowering.cpp
@@ -565,7 +565,7 @@ Register SIFrameLowering::getEntryFunctionReservedScratchRsrcReg(
     // reserved input we needed. Also for PAL, make sure we don't clobber
     // the GIT pointer passed in SGPR0 or SGPR8.
     if (!MRI.isPhysRegUsed(Reg) && MRI.isAllocatable(Reg) &&
-        !TRI->isSubRegisterEq(Reg, GITPtrLoReg)) {
+        (!GITPtrLoReg || !TRI->isSubRegisterEq(Reg, GITPtrLoReg))) {
       MRI.replaceRegWith(ScratchRsrcReg, Reg);
       MFI->setScratchRSrcReg(Reg);
       return Reg;