[llvm] 1d8820c - [gn] port 98e342dca2372 (RISCV MCA)

[Nico Weber via llvm-commits]

Author: Nico Weber
Date: 2023-05-22T20:32:59-04:00
New Revision: 1d8820c342560a2fbf8e1970b861193ba8137177

URL: https://github.com/llvm/llvm-project/commit/1d8820c342560a2fbf8e1970b861193ba8137177
DIFF: https://github.com/llvm/llvm-project/commit/1d8820c342560a2fbf8e1970b861193ba8137177.diff

LOG: [gn] port 98e342dca2372 (RISCV MCA)

Added: 
    llvm/utils/gn/secondary/llvm/lib/Target/RISCV/MCA/BUILD.gn

Modified: 
    llvm/utils/gn/secondary/llvm/lib/Target/RISCV/BUILD.gn
    llvm/utils/gn/secondary/llvm/lib/Target/targets_with_mcas.gni

Removed: 
    


################################################################################
diff  --git a/llvm/utils/gn/secondary/llvm/lib/Target/RISCV/BUILD.gn b/llvm/utils/gn/secondary/llvm/lib/Target/RISCV/BUILD.gn
index 8c30924204fdf..b8ea3d126dd11 100644
--- a/llvm/utils/gn/secondary/llvm/lib/Target/RISCV/BUILD.gn
+++ b/llvm/utils/gn/secondary/llvm/lib/Target/RISCV/BUILD.gn
@@ -105,6 +105,7 @@ group("RISCV") {
     ":LLVMRISCVCodeGen",
     "AsmParser",
     "Disassembler",
+    "MCA",
     "MCTargetDesc",
     "TargetInfo",
   ]

diff  --git a/llvm/utils/gn/secondary/llvm/lib/Target/RISCV/MCA/BUILD.gn b/llvm/utils/gn/secondary/llvm/lib/Target/RISCV/MCA/BUILD.gn
new file mode 100644
index 0000000000000..a4d95f5381afc
--- /dev/null
+++ b/llvm/utils/gn/secondary/llvm/lib/Target/RISCV/MCA/BUILD.gn
@@ -0,0 +1,14 @@
+static_library("MCA") {
+  output_name = "LLVMTargetRISCVMCA"
+  deps = [
+    "//llvm/lib/CodeGen",
+    "//llvm/lib/MC",
+    "//llvm/lib/MC/MCParser",
+    "//llvm/lib/MCA",
+    "//llvm/lib/Support",
+    "//llvm/lib/Target/RISCV/MCTargetDesc",
+    "//llvm/lib/Target/RISCV/TargetInfo",
+  ]
+  include_dirs = [ ".." ]
+  sources = [ "RISCVCustomBehaviour.cpp" ]
+}

diff  --git a/llvm/utils/gn/secondary/llvm/lib/Target/targets_with_mcas.gni b/llvm/utils/gn/secondary/llvm/lib/Target/targets_with_mcas.gni
index 950393bc7be74..bae8da104d054 100644
--- a/llvm/utils/gn/secondary/llvm/lib/Target/targets_with_mcas.gni
+++ b/llvm/utils/gn/secondary/llvm/lib/Target/targets_with_mcas.gni
@@ -2,7 +2,7 @@ import("//llvm/lib/Target/targets.gni")
 
 targets_with_mcas = []
 foreach(target, llvm_targets_to_build) {
-  if (target == "AMDGPU" || target == "X86") {
+  if (target == "AMDGPU" || target == "RISCV" || target == "X86") {
     targets_with_mcas += [ target ]
   }
 }