[PATCH] D151176: [RISCV] Custom lower fixed-length vector llvm.is.fpclass to vfclass.v

[Craig Topper via Phabricator via llvm-commits]

craig.topper added a comment.

In D151176#4366686 <https://reviews.llvm.org/D151176#4366686>, @liaolucy wrote:

> Update try to address comments.
> Use AND and SETNE.
> Update test case.
>
> If the changes are correct, then it seems that this patch is not needed:
> testcase:
>
>   declare <2 x i1> @llvm.is.fpclass.v2f32(<2 x float>, i32)
>   define <2 x i1> @isnan_v2f32(<2 x float> %x) nounwind {
>     %1 = call <2 x i1> @llvm.is.fpclass.v2f32(<2 x float> %x, i32 3)  ; nan
>     ret <2 x i1> %1
>   }
>
> Without this patch:
>
>   vsetivli        zero, 2, e32, mf2, ta, ma
>   vmfne.vv        v8, v8, v8
>   vmor.mm v0, v8, v8
>
> with the patch, we get:
>
>   vsetivli        zero, 2, e32, mf2, ta, ma
>   vfclass.v       v8, v8
>   li      a0, 768
>   vand.vx v8, v8, a0
>   vmsne.vi        v0, v8, 0
>   ret

The default expansion does know to create single instructions for some cases, but will probably generate worse code for mixing classes together. You should add more testing of different combinations of bits. Maybe we want to use fclass for some cases and default expansion for others.



================
Comment at: llvm/lib/Target/RISCV/RISCVISelLowering.cpp:4392
+
+  if (VT.isFixedLengthVector()) {
+    SDValue Op0 = Op.getOperand(0);
----------------
liaolucy wrote:
> craig.topper wrote:
> > Why not scalable vectors?
> I did not find the scalable llvm.is.fpclass.
> https://llvm.org/docs/LangRef.html#llvm-is-fpclass-intrinsic
> It seems that this scalableintrinsic should be supported first.
I don't think the syntax in the LangRef is an exhaustive list. Have you tried it?


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