[PATCH] D151036: [CodeGen] Fix incorrect usage of MCPhysReg for diff list elements

Sergei Barannikov via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Tue May 23 11:17:41 PDT 2023


barannikov88 added a comment.

I added a couple of assertions.
Although there were many crashes, they narrowed down to just four places, so I thought I might be able to fix them is this patch.



================
Comment at: llvm/lib/Target/AMDGPU/SIFrameLowering.cpp:568
     if (!MRI.isPhysRegUsed(Reg) && MRI.isAllocatable(Reg) &&
-        !TRI->isSubRegisterEq(Reg, GITPtrLoReg)) {
+        !(GITPtrLoReg && TRI->isSubRegisterEq(Reg, GITPtrLoReg))) {
       MRI.replaceRegWith(ScratchRsrcReg, Reg);
----------------
@arsenm @foad Please take a look. Is this a correct change?
`MFI->getGITPtrLoReg(MF)` above returns null register for `!ST.isAmdPalOS()`.
Also, is it ok for this change to be part of this patch or should it be fixed separately?



Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D151036/new/

https://reviews.llvm.org/D151036



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