[PATCH] D150670: [WebAssembly] Disable generation of fshl/fshr for rotates

[Paulo Matos via Phabricator via llvm-commits]

pmatos added inline comments.


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Comment at: llvm/test/Transforms/InstCombine/fsh.ll:664
+; CHECK-NEXT:    [[T1:%.*]] = and i32 [[A:%.*]], -65536
+; CHECK-NEXT:    [[T2:%.*]] = call i32 @llvm.fshl.i32(i32 [[T1]], i32 [[T1]], i32 16)
 ; CHECK-NEXT:    ret i32 [[T2]]
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nikic wrote:
> We still want to simplify this case. Could possibly be done by checking whether all demanded bits are zero for one of the operands in the rotate case.
Ah, yes,  right. That should be just a simple shift right. Will see how to still allow that change. Thanks.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D150670/new/

https://reviews.llvm.org/D150670