[PATCH] D151396: [2/N][RISCV] Model vxrm in LLVM intrinsics and machine instructions for RVV fixed-point instructions

[Yueh-Ting (eop) Chen via Phabricator via llvm-commits]

eopXD created this revision.
Herald added subscribers: jobnoorman, luke, VincentWu, vkmr, frasercrmck, luismarques, apazos, sameer.abuasal, s.egerton, Jim, benna, psnobl, jocewei, PkmX, the_o, brucehoult, MartinMosbeck, rogfer01, edward-jones, zzheng, jrtc27, shiva0217, kito-cheng, niosHD, sabuasal, simoncook, johnrusso, rbar, asb, hiraditya, arichardson.
Herald added a project: All.
eopXD requested review of this revision.
Herald added subscribers: llvm-commits, pcwang-thead, MaskRay.
Herald added a project: LLVM.

This commit models vxrm by adding an immediate operand into intrinsics
and machine instructions of RVV fixed-point instruction `vaadd`. This
commit only covers `vaadd`, the proceeding patches of the patch-set
woll do the same to other RVV fixed-point instructions.

The current naiive approach is to have a write to vxrm inserted before
every fixed-point instruction. This is done by the new added
`RISCVInsertReadWriteCSR`. The reason to name the pass in a more general
term is because we will also model rounding mode for the RVV floating-
point instructions. The approach will be improved in the future.

The original LLVM intrinsics and machine instructions for vaadd that
does not model the rounding mode is not removed in this patch. That is
`int.riscv.vaadd.*` co-exists with `int.riscv.vaadd.rm.*` after this
patch. The next patch will add C intrinsics of vaadd with an additional
operand that models the control of the rounding mode, in this patch,
`int.riscv.vaadd.rm.*` will replace `int.riscv.vaadd.*`.

Authored-by: ShihPo Hung <shihpo.hung at sifive.com>
Co-Authored-by: eop Chen <eop.chen at sifive.com>


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D151396

Files:
  llvm/include/llvm/IR/IntrinsicsRISCV.td
  llvm/lib/Target/RISCV/CMakeLists.txt
  llvm/lib/Target/RISCV/MCTargetDesc/RISCVBaseInfo.h
  llvm/lib/Target/RISCV/RISCV.h
  llvm/lib/Target/RISCV/RISCVInsertReadWriteCSR.cpp
  llvm/lib/Target/RISCV/RISCVInstrFormats.td
  llvm/lib/Target/RISCV/RISCVInstrInfoVPseudos.td
  llvm/lib/Target/RISCV/RISCVMCInstLower.cpp
  llvm/lib/Target/RISCV/RISCVTargetMachine.cpp
  llvm/test/CodeGen/RISCV/rvv/masked-tama.ll
  llvm/test/CodeGen/RISCV/rvv/masked-tamu.ll
  llvm/test/CodeGen/RISCV/rvv/masked-tuma.ll
  llvm/test/CodeGen/RISCV/rvv/masked-tumu.ll
  llvm/test/CodeGen/RISCV/rvv/vaadd.ll

-------------- next part --------------
A non-text attachment was scrubbed...
Name: D151396.525401.patch
Type: text/x-patch
Size: 116493 bytes
Desc: not available
URL: <http://lists.llvm.org/pipermail/llvm-commits/attachments/20230525/f09ce7c0/attachment-0001.bin>