[PATCH] D149916: [VP][SelectionDAG][RISCV] Add get_vector_length intrinsics and generic SelectionDAG support.
Philip Reames via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Thu May 25 16:45:33 PDT 2023
reames added inline comments.
================
Comment at: llvm/docs/LangRef.rst:18103
+
+If the count is larger than the vectorization factor, including vscale, this
+intrinsic may not return the full vectorization factor. The result will be
----------------
craig.topper wrote:
> reames wrote:
> > reword: larger than the maximum legal vectorization factor.
> >
> > Also, should probably add a requirement here that zero is only returned when the requested trip count is zero.
> >
> >
> I'm not sure what you mean by "maximum legalization factor"? My statement here was intended to only refer to the vectorization factor passed in. If the vectorization factor is for a type that isn't supported legally by hardware, the intrinsic will still return a vector length that utilizes the whole type.
How about something like this? (For clarity, this is going in a different direction than my original comment.)
If the count is larger than the number of lanes in the type described by the last two arguments, then this intrinsic may return a value less than the number of lanes implied by the type.
Basically, what if we were explicit about the VF and scalable bit mapping to a type, and then described the behavior in terms of the number of runtime lanes in that type?
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https://reviews.llvm.org/D149916/new/
https://reviews.llvm.org/D149916
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