[PATCH] D151396: [2/N][RISCV] Model vxrm in LLVM intrinsics and machine instructions for RVV fixed-point instructions
Craig Topper via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Fri May 26 12:00:44 PDT 2023
craig.topper added inline comments.
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Comment at: llvm/test/CodeGen/RISCV/rvv/vxrm.mir:17
; MIR-NEXT: WriteVXRMImm 0, implicit-def $vxrm
- ; MIR-NEXT: renamable $v8 = PseudoVAADD_VV_MF8 renamable $v8, renamable $v9, $noreg, 3 /* e8 */, implicit $vxrm, implicit $vl, implicit $vtype, implicit $vl, implicit $vtype
+ ; MIR-NEXT: renamable $v8 = PseudoVAADD_VV_MF8 renamable $v8, renamable $v9, 0, $noreg, 3 /* e8 */, implicit $vxrm, implicit $vl, implicit $vtype, implicit $vl, implicit $vtype
; MIR-NEXT: PseudoRET implicit $v8
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I would expect there to be two $vxrm operands since you started with one and the pass added one.
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Comment at: llvm/test/CodeGen/RISCV/rvv/vxrm.mir:28
dead $x0 = PseudoVSETVLI killed renamable $x10, 197 /* e8, mf8, ta, ma */, implicit-def $vl, implicit-def $vtype
- WriteVXRMImm 0, implicit-def $vxrm
- renamable $v8 = PseudoVAADD_VV_MF8 killed renamable $v8, killed renamable $v9, $noreg, 3 /* e8 */, implicit $vxrm, implicit $vl, implicit $vtype
+ renamable $v8 = PseudoVAADD_VV_MF8 killed renamable $v8, killed renamable $v9, 0, $noreg, 3 /* e8 */, implicit $vxrm, implicit $vl, implicit $vtype
PseudoRET implicit $v8
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Drop the `implicit $vxrm` here. It shouldn't exist until the pass runs.
The implicit $vl, implicit $vtype operands shouldn't exist until the InsertVSETVLI pass runs.
Repository:
rG LLVM Github Monorepo
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https://reviews.llvm.org/D151396/new/
https://reviews.llvm.org/D151396
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