[PATCH] D151506: [RISCV] Fix typo VLUpperBound to VLEN in SiFive7. NFC.
Michael Maitland via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Fri May 26 07:29:49 PDT 2023
This revision was automatically updated to reflect the committed changes.
Closed by commit rGc73c7678e066: [RISCV] Fix typo VLUpperBound to VLEN in SiFive7. NFC. (authored by michaelmaitland).
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D151506/new/
https://reviews.llvm.org/D151506
Files:
llvm/lib/Target/RISCV/RISCVSchedSiFive7.td
Index: llvm/lib/Target/RISCV/RISCVSchedSiFive7.td
===================================================================
--- llvm/lib/Target/RISCV/RISCVSchedSiFive7.td
+++ llvm/lib/Target/RISCV/RISCVSchedSiFive7.td
@@ -108,18 +108,18 @@
// to use a different VLEN, this model will not make scheduling decisions
// based on the user specified VLEN.
// c = ceil(VLEN / SEW) * LMUL
- // Note: c >= 1 since the smallest VLUpperBound is 512 / 8 = 8, and the
- // largest division performed on VLUpperBound is in MF8 case with division
+ // Note: c >= 1 since the smallest VLEN is 512 / 8 = 8, and the
+ // largest division performed on VLEN is in MF8 case with division
// by 8. Therefore, there is no need to ceil the result.
- int VLUpperBound = !div(512, sew);
+ int VLEN = !div(512, sew);
int c = !cond(
- !eq(mx, "M1") : VLUpperBound,
- !eq(mx, "M2") : !mul(VLUpperBound, 2),
- !eq(mx, "M4") : !mul(VLUpperBound, 4),
- !eq(mx, "M8") : !mul(VLUpperBound, 8),
- !eq(mx, "MF2") : !div(VLUpperBound, 2),
- !eq(mx, "MF4") : !div(VLUpperBound, 4),
- !eq(mx, "MF8") : !div(VLUpperBound, 8)
+ !eq(mx, "M1") : VLEN,
+ !eq(mx, "M2") : !mul(VLEN, 2),
+ !eq(mx, "M4") : !mul(VLEN, 4),
+ !eq(mx, "M8") : !mul(VLEN, 8),
+ !eq(mx, "MF2") : !div(VLEN, 2),
+ !eq(mx, "MF4") : !div(VLEN, 4),
+ !eq(mx, "MF8") : !div(VLEN, 8)
);
}
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