[PATCH] D151313: [RISCV][BF16] Make backend type bf16 to follow the psABI
Jun Sha via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Sun May 28 20:39:35 PDT 2023
joshua-arch1 added a comment.
Ping.
================
Comment at: llvm/lib/Target/RISCV/RISCVISelLowering.cpp:2486
+ DAG.getNode(ISD::ANY_EXTEND, DL, MVT::i32,
+ DAG.getNode(ISD::BITCAST, DL, MVT::i16, Op.getOperand(0)));
+ } else {
----------------
craig.topper wrote:
> This creates an MVT::i16 after type legalization which is illegal.
In fact, without Zfbfmin enabled, bf16 type isn't legal and this condition will never happen. If Zfbfmin is enabled, maybe we can use FCVT.S.BF16 to directly convert BF16 value to an FP32 value.
================
Comment at: llvm/lib/Target/RISCV/RISCVISelLowering.cpp:2458
+ SDValue Res =
+ makeLibCall(DAG, RTLIB::FPEXT_F16_F32, MVT::f32, Arg, CallOptions, DL)
+ .first;
----------------
craig.topper wrote:
> craig.topper wrote:
> > If the libcall doesn't exist, you can cast it to i16, any_extend to i32, and shift it left by 16 and bitcast it to f32.
> Which is what the default lowering in LegalizeDAG.cpp does.
We cannot directly use the default lowering in LegalizeDAG.cpp. It uses a bitcast from i32 to f32. However, i32 is not a legal type in RV64 backend.
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D151313/new/
https://reviews.llvm.org/D151313
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