[PATCH] D151227: RFC: LiveIntervalCalc: Always split separate components

[Jay Foad via Phabricator via llvm-commits]

foad created this revision.
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With D129208 <https://reviews.llvm.org/D129208> applied but without this patch,
CodeGen/AMDGPU/subreg-intervals.mir fails machine verification
immediately after running LiveIntervals:

Machine code for function test0: NoPHIs
=======================================

0B	bb.0:
16B	  S_NOP 0, implicit-def %0:sreg_64
32B	  S_NOP 0, implicit %0:sreg_64
48B	  S_NOP 0, implicit-def undef %0.sub0:sreg_64
64B	  S_NOP 0, implicit %0:sreg_64

End machine code for function test0.
====================================

  - Bad machine code: Multiple connected components in live interval ***
- function:    test0
- interval:    %0 [16r,32r:0)[48r,64r:1) 0 at 16r 1 at 48r  L000000000000000C [16r,32r:0) 0 at 16r  L0000000000000003 [16r,32r:1)[48r,64r:0) 0 at 48r 1 at 16r  weight:0.000000e+00


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D151227

Files:
  llvm/lib/CodeGen/LiveIntervals.cpp


Index: llvm/lib/CodeGen/LiveIntervals.cpp
===================================================================
--- llvm/lib/CodeGen/LiveIntervals.cpp
+++ llvm/lib/CodeGen/LiveIntervals.cpp
@@ -199,11 +199,9 @@
     if (MRI->reg_nodbg_empty(Reg))
       continue;
     LiveInterval &LI = createEmptyInterval(Reg);
-    bool NeedSplit = computeVirtRegInterval(LI);
-    if (NeedSplit) {
-      SmallVector<LiveInterval*, 8> SplitLIs;
-      splitSeparateComponents(LI, SplitLIs);
-    }
+    computeVirtRegInterval(LI);
+    SmallVector<LiveInterval*, 8> SplitLIs;
+    splitSeparateComponents(LI, SplitLIs);
   }
 }
 


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