[PATCH] D149916: [VP][SelectionDAG][RISCV] Add get_vector_length intrinsics and generic SelectionDAG support.
Philip Reames via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Thu May 25 12:07:56 PDT 2023
reames added a comment.
This looks reasonable to me, minor comments only.
================
Comment at: llvm/docs/LangRef.rst:18083
+
+The first argument is of any integer type and specifies total number of elements
+to be processed. The second argument is an i32 immediate for the element width
----------------
First argument is interpreted an unsigned integer correct? Should state that.
================
Comment at: llvm/docs/LangRef.rst:18103
+
+If the count is larger than the vectorization factor, including vscale, this
+intrinsic may not return the full vectorization factor. The result will be
----------------
reword: larger than the maximum legal vectorization factor.
Also, should probably add a requirement here that zero is only returned when the requested trip count is zero.
================
Comment at: llvm/lib/IR/Verifier.cpp:5463
+ case Intrinsic::experimental_get_vector_length: {
+ ConstantInt *VF = cast<ConstantInt>(Call.getArgOperand(2));
+ Check(!VF->isNegative() && !VF->isZero(),
----------------
I don't think the element width can be zero or negative either can it?
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https://reviews.llvm.org/D149916
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