[PATCH] D149443: [ARM] add Thumb-1 8-bit movs/adds relocations to LLVM

Simon Wallis via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Thu May 25 07:54:57 PDT 2023


simonwallis2 added inline comments.


================
Comment at: llvm/lib/Target/ARM/MCTargetDesc/ARMMCCodeEmitter.cpp:1248
+      if (!isThumb(STI))
+        llvm_unreachable(":upper_8_15: not supported in Arm mode");
+      Kind = MCFixupKind(ARM::fixup_arm_thumb_upper_8_15);
----------------
        llvm_unreachable(":upper_8_15: not supported in ARM state");



================
Comment at: llvm/lib/Target/ARM/MCTargetDesc/ARMMCCodeEmitter.cpp:1253
+      if (!isThumb(STI))
+        llvm_unreachable(":upper_0_7: not supported in Arm mode");
+      Kind = MCFixupKind(ARM::fixup_arm_thumb_upper_0_7);
----------------
Following the architectural definitions,
the term "state" describes an instruction set state (ARM state or Thumb state);
and the term "mode" or "processor mode" relates to execution privilege level.


================
Comment at: llvm/lib/Target/ARM/MCTargetDesc/ARMMCCodeEmitter.cpp:1258
+      if (!isThumb(STI))
+        llvm_unreachable(":lower_8_15: not supported in Arm mode");
+      Kind = MCFixupKind(ARM::fixup_arm_thumb_lower_8_15);
----------------
ARM state


================
Comment at: llvm/lib/Target/ARM/MCTargetDesc/ARMMCCodeEmitter.cpp:1263
+      if (!isThumb(STI))
+        llvm_unreachable(":lower_0_7: not supported in Arm mode");
+      Kind = MCFixupKind(ARM::fixup_arm_thumb_lower_0_7);
----------------
ARM state


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D149443/new/

https://reviews.llvm.org/D149443



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