[PATCH] D151182: [LegalizeTypes][ARM][AArch6][RISCV][VE][WebAssembly] Add special case for smin(X, -1) and smax(X, 0) to ExpandIntRes_MINMAX.

[Eli Friedman via Phabricator via llvm-commits]

efriedma added a comment.

The default lowering here is weird. It appears to be written to minimize the latency of the high half of the result, which is not useful in most cases.

I expect that it would be more efficient in most cases to expand to "a < b ? a : b", which can use the same condition to select both the high and low halves.  Particularly on targets that have an efficient SETCCCARRY.


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  https://reviews.llvm.org/D151182/new/

https://reviews.llvm.org/D151182