[PATCH] D149715: IR: Add llvm.frexp intrinsic

Matt Arsenault via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Tue May 23 03:03:54 PDT 2023


arsenm added inline comments.


================
Comment at: llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp:5202
+        DAG.getNode(ISD::FP_ROUND, dl, OVT, Tmp2,
+                    DAG.getIntPtrConstant(0, dl, /*isTarget=*/true)));
+
----------------
arsenm wrote:
> sepavloff wrote:
> > Can we use 1 for the second operand? The value produced by FFREXP should not add extra bits to mantissa.
> Would that even compile on most targets? I view the second operand here as a historical artifact/mistake and don't really expect a value other than 0 to work to exactly correspond to fptrunc 
Oh, I thought this was a rounding mode control. not a rounding-known-not-to-happen bit. Not sure, it's probably OK


CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D149715/new/

https://reviews.llvm.org/D149715



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