[PATCH] D149393: [AMDGPU][IGLP] Parameterize the SchedGroup processing / linking in Solver

[Jeffrey Byrnes via Phabricator via llvm-commits]

jrbyrnes added inline comments.


================
Comment at: llvm/lib/Target/AMDGPU/AMDGPUIGroupLP.cpp:395
   for (auto &SyncPipeline : BestPipeline) {
-    auto I = SyncPipeline.rbegin();
-    auto E = SyncPipeline.rend();
-    for (; I != E; ++I) {
-      auto &GroupA = *I;
-      for (auto J = std::next(I); J != E; ++J) {
-        auto &GroupB = *J;
+    for (int I = 0; I < (int)SyncPipeline.size(); I++) {
+      int Idx = ProcessDirection == Direction::BOTTOM_UP
----------------
kerbowa wrote:
> Are we able to still use iterators here?
> auto I = IsBottomUp ? SyncPipeline.rbegin() : SyncPipeline.begin();
> auto E = IsBottomUp ? SyncPipeline.rend() : SyncPipeline.end();
This doesn't work out of the box. SmallVector::iterator (T *) isn't compatible with SmallVector::reverse_iterator (std::reverse_iterator<T*>). I can template this code based on the iterator, but I thought the current implementation was the cleanest way to do it (unfortunately). We can switch to ranges in c++20. Please correct me if I'm missing something.


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  https://reviews.llvm.org/D149393/new/

https://reviews.llvm.org/D149393