[PATCH] D151105: [AMDGPU] Fix lowering of @llvm.amdgcn.set.inactive(imm, poison)

Jay Foad via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Mon May 22 07:47:01 PDT 2023


foad added reviewers: dstuttard, piotr.
foad added inline comments.


================
Comment at: llvm/test/CodeGen/AMDGPU/wqm.ll:1179
+; GFX9-W64-NEXT:    s_waitcnt vmcnt(1)
+; GFX9-W64-NEXT:    v_mov_b32_e32 v1, v1
 ; GFX9-W64-NEXT:    s_and_b64 exec, exec, s[2:3]
----------------
Ugh. So using MOV handled the copy-immediate-to-register case nicely, but apparently does not optimize away register-to-same-register copies. Any ideas for a neat way of handling both cases?


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D151105/new/

https://reviews.llvm.org/D151105



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