[llvm] 3c0d81d - [AMDGPU] Simplify scavenging in indirectCopyToAGPR

[Jay Foad via llvm-commits]

Author: Jay Foad
Date: 2023-05-22T11:55:26+01:00
New Revision: 3c0d81d43fd75ca89fdf59c4887afe6908ffb35e

URL: https://github.com/llvm/llvm-project/commit/3c0d81d43fd75ca89fdf59c4887afe6908ffb35e
DIFF: https://github.com/llvm/llvm-project/commit/3c0d81d43fd75ca89fdf59c4887afe6908ffb35e.diff

LOG: [AMDGPU] Simplify scavenging in indirectCopyToAGPR

This just makes it clearer that we do not want the scavenger to spill
here. NFCI.

Differential Revision: https://reviews.llvm.org/D150774

Added: 
    

Modified: 
    llvm/lib/Target/AMDGPU/SIInstrInfo.cpp

Removed: 
    


################################################################################
diff  --git a/llvm/lib/Target/AMDGPU/SIInstrInfo.cpp b/llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
index a38a835fd196e..6ecc848a36704 100644
--- a/llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
+++ b/llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
@@ -634,11 +634,11 @@ static void indirectCopyToAGPR(const SIInstrInfo &TII,
   assert(MBB.getParent()->getRegInfo().isReserved(Tmp) &&
          "VGPR used for an intermediate copy should have been reserved.");
 
-  // Only loop through if there are any free registers left, otherwise
-  // scavenger may report a fatal error without emergency spill slot
-  // or spill with the slot.
-  while (RegNo-- && RS.FindUnusedReg(&AMDGPU::VGPR_32RegClass)) {
-    Register Tmp2 = RS.scavengeRegister(&AMDGPU::VGPR_32RegClass, 0);
+  // Only loop through if there are any free registers left. We don't want to
+  // spill.
+  while (RegNo--) {
+    Register Tmp2 = RS.scavengeRegister(&AMDGPU::VGPR_32RegClass, 0,
+                                        /* AllowSpill */ false);
     if (!Tmp2 || RI.getHWRegIndex(Tmp2) >= MaxVGPRs)
       break;
     Tmp = Tmp2;
@@ -7919,9 +7919,10 @@ MachineInstrBuilder SIInstrInfo::getAddNoCarry(MachineBasicBlock &MBB,
     return BuildMI(MBB, I, DL, get(AMDGPU::V_ADD_U32_e32), DestReg);
 
   // If available, prefer to use vcc.
-  Register UnusedCarry = !RS.isRegUsed(AMDGPU::VCC)
-                             ? Register(RI.getVCC())
-                             : RS.scavengeRegister(RI.getBoolRC(), I, 0, false);
+  Register UnusedCarry =
+      !RS.isRegUsed(AMDGPU::VCC)
+          ? Register(RI.getVCC())
+          : RS.scavengeRegister(RI.getBoolRC(), I, 0, /* AllowSpill */ false);
 
   // TODO: Users need to deal with this.
   if (!UnusedCarry.isValid())