[PATCH] D151289: [AMDGPU] Check if register is non-null before calling isSubRegisterEq (NFCI)

[Sergei Barannikov via Phabricator via llvm-commits]

barannikov88 created this revision.
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D151036 <https://reviews.llvm.org/D151036> adds an assertions that prohibits iterating over sub- and
super-registers of a null register. This is already the case when
iterating over register units of a null register, and worked by
accident for sub- and super-registers.


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D151289

Files:
  llvm/lib/Target/AMDGPU/SIFrameLowering.cpp


Index: llvm/lib/Target/AMDGPU/SIFrameLowering.cpp
===================================================================
--- llvm/lib/Target/AMDGPU/SIFrameLowering.cpp
+++ llvm/lib/Target/AMDGPU/SIFrameLowering.cpp
@@ -565,7 +565,7 @@
     // reserved input we needed. Also for PAL, make sure we don't clobber
     // the GIT pointer passed in SGPR0 or SGPR8.
     if (!MRI.isPhysRegUsed(Reg) && MRI.isAllocatable(Reg) &&
-        !TRI->isSubRegisterEq(Reg, GITPtrLoReg)) {
+        !(GITPtrLoReg && TRI->isSubRegisterEq(Reg, GITPtrLoReg))) {
       MRI.replaceRegWith(ScratchRsrcReg, Reg);
       MFI->setScratchRSrcReg(Reg);
       return Reg;


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