[PATCH] D151458: [RISCV] Support TLSDESC in the RISC-V backend

[Fangrui Song via Phabricator via llvm-commits]

MaskRay added a comment.

TLSDESC has a calling convention that assumes most registers are not clobbered. Does this patch implement it?



================
Comment at: llvm/lib/Target/RISCV/RISCVTargetMachine.cpp:76
+                                 cl::desc("Enable the tlsdesc for RISC-V"),
+                                 cl::init(false), cl::Hidden);
+
----------------
Delete `cl::init(false), `


Repository:
  rG LLVM Github Monorepo

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  https://reviews.llvm.org/D151458/new/

https://reviews.llvm.org/D151458