[llvm] e8aee45 - [IRTranslator] Implement translation of entry_value dbg.value intrinsics

[Felipe de Azevedo Piovezan via llvm-commits]

Author: Felipe de Azevedo Piovezan
Date: 2023-05-26T06:45:01-04:00
New Revision: e8aee45be7a2b5976431de7020014b7523652a32

URL: https://github.com/llvm/llvm-project/commit/e8aee45be7a2b5976431de7020014b7523652a32
DIFF: https://github.com/llvm/llvm-project/commit/e8aee45be7a2b5976431de7020014b7523652a32.diff

LOG: [IRTranslator] Implement translation of entry_value dbg.value intrinsics

For dbg.value intrinsics targeting an llvm::Argument address whose expression
starts with an entry value, we lower this to a DEBUG_VALUE targeting the livein
physical register corresponding to that Argument.

Depends on D151328

Differential Revision: https://reviews.llvm.org/D151329

Added: 
    llvm/test/CodeGen/AArch64/dbg-value-swift-async.ll

Modified: 
    llvm/include/llvm/CodeGen/GlobalISel/IRTranslator.h
    llvm/lib/CodeGen/GlobalISel/IRTranslator.cpp

Removed: 
    


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diff  --git a/llvm/include/llvm/CodeGen/GlobalISel/IRTranslator.h b/llvm/include/llvm/CodeGen/GlobalISel/IRTranslator.h
index bb77bd94c33f4..4d26af3e3e6d2 100644
--- a/llvm/include/llvm/CodeGen/GlobalISel/IRTranslator.h
+++ b/llvm/include/llvm/CodeGen/GlobalISel/IRTranslator.h
@@ -42,6 +42,7 @@ class Constant;
 class ConstrainedFPIntrinsic;
 class DataLayout;
 class DbgDeclareInst;
+class DbgValueInst;
 class Instruction;
 class MachineBasicBlock;
 class MachineFunction;
@@ -253,6 +254,12 @@ class IRTranslator : public MachineFunctionPass {
   /// lower it as an entry in the MF debug table.
   bool translateIfEntryValueArgument(const DbgDeclareInst &DebugInst);
 
+  /// If DebugInst targets an Argument and its expression is an EntryValue,
+  /// lower as a DBG_VALUE targeting the corresponding livein register for that
+  /// Argument.
+  bool translateIfEntryValueArgument(const DbgValueInst &DebugInst,
+                                     MachineIRBuilder &MIRBuilder);
+
   bool translateInlineAsm(const CallBase &CB, MachineIRBuilder &MIRBuilder);
 
   /// Common code for translating normal calls or invokes.

diff  --git a/llvm/lib/CodeGen/GlobalISel/IRTranslator.cpp b/llvm/lib/CodeGen/GlobalISel/IRTranslator.cpp
index d128de938d94f..ee3573ea6977c 100644
--- a/llvm/lib/CodeGen/GlobalISel/IRTranslator.cpp
+++ b/llvm/lib/CodeGen/GlobalISel/IRTranslator.cpp
@@ -1891,6 +1891,29 @@ std::optional<MCRegister> IRTranslator::getArgPhysReg(Argument &Arg) {
   return VRegDef->getOperand(1).getReg().asMCReg();
 }
 
+bool IRTranslator::translateIfEntryValueArgument(const DbgValueInst &DebugInst,
+                                                 MachineIRBuilder &MIRBuilder) {
+  auto *Arg = dyn_cast<Argument>(DebugInst.getValue());
+  if (!Arg)
+    return false;
+
+  const DIExpression *Expr = DebugInst.getExpression();
+  if (!Expr->isEntryValue())
+    return false;
+
+  std::optional<MCRegister> PhysReg = getArgPhysReg(*Arg);
+  if (!PhysReg) {
+    LLVM_DEBUG(dbgs() << "Dropping dbg.value: expression is entry_value but "
+                         "couldn't find a physical register\n"
+                      << DebugInst << "\n");
+    return true;
+  }
+
+  MIRBuilder.buildDirectDbgValue(*PhysReg, DebugInst.getVariable(),
+                                 DebugInst.getExpression());
+  return true;
+}
+
 bool IRTranslator::translateIfEntryValueArgument(
     const DbgDeclareInst &DebugInst) {
   auto *Arg = dyn_cast<Argument>(DebugInst.getAddress());
@@ -2044,6 +2067,8 @@ bool IRTranslator::translateKnownIntrinsic(const CallInst &CI, Intrinsic::ID ID,
                                  ExprDerefRemoved);
       return true;
     }
+    if (translateIfEntryValueArgument(DI, MIRBuilder))
+      return true;
     for (Register Reg : getOrCreateVRegs(*V)) {
       // FIXME: This does not handle register-indirect values at offset 0. The
       // direct/indirect thing shouldn't really be handled by something as

diff  --git a/llvm/test/CodeGen/AArch64/dbg-value-swift-async.ll b/llvm/test/CodeGen/AArch64/dbg-value-swift-async.ll
new file mode 100644
index 0000000000000..b70c7c6c17fee
--- /dev/null
+++ b/llvm/test/CodeGen/AArch64/dbg-value-swift-async.ll
@@ -0,0 +1,35 @@
+; RUN: llc -O0 -global-isel -stop-after=irtranslator -verify-machineinstrs %s -o - | FileCheck %s
+
+; CHECK-NOT:  DBG_VALUE
+; CHECK:      DBG_VALUE $x22, $noreg, !{{.*}}, !DIExpression(DW_OP_LLVM_entry_value, 1)
+; CHECK-NEXT: DBG_VALUE $x22, $noreg, !{{.*}}, !DIExpression(DW_OP_LLVM_entry_value, 1)
+; CHECK-NOT:  DBG_VALUE
+
+target triple="aarch64--"
+
+define void @foo(ptr %unused_arg, ptr swiftasync %async_arg) !dbg !6 {
+  call void @llvm.dbg.value(metadata ptr %async_arg, metadata !12, metadata !DIExpression(DW_OP_LLVM_entry_value, 1)), !dbg !14
+  call void @llvm.dbg.value(metadata ptr %async_arg, metadata !12, metadata !DIExpression(DW_OP_LLVM_entry_value, 1)), !dbg !14
+  call void @consume(ptr %async_arg)
+  ret void, !dbg !15
+}
+
+declare void @llvm.dbg.value(metadata, metadata, metadata)
+declare void @consume(ptr %ptr)
+
+!llvm.dbg.cu = !{!0}
+!llvm.module.flags = !{!3, !4}
+
+!0 = distinct !DICompileUnit(language: DW_LANG_C99, file: !1, producer: "clang", isOptimized: false, runtimeVersion: 0, emissionKind: FullDebug)
+!1 = !DIFile(filename: "x.c", directory: "/")
+!3 = !{i32 2, !"Dwarf Version", i32 4}
+!4 = !{i32 2, !"Debug Info Version", i32 3}
+!6 = distinct !DISubprogram(name: "f", scope: !1, file: !1, line: 1, type: !7, isLocal: false, isDefinition: true, scopeLine: 1, unit: !0)
+!7 = !DISubroutineType(types: !8)
+!8 = !{null, !9, !9, !9}
+!9 = !DIDerivedType(tag: DW_TAG_pointer_type, baseType: !10, size: 64)
+!10 = !DIDerivedType(tag: DW_TAG_const_type, baseType: !11)
+!11 = !DIBasicType(name: "char", size: 8, encoding: DW_ATE_signed_char)
+!12 = !DILocalVariable(name: "a", scope: !6, file: !1, line: 1, type: !9)
+!14 = !DILocation(line: 1, column: 29, scope: !6)
+!15 = !DILocation(line: 1, column: 37, scope: !6)