[PATCH] D151069: [AMDGPU] Handle multiple occurences of an incoming value in break large PHIs
Pierre van Houtryve via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Mon May 22 02:15:43 PDT 2023
Pierre-vh created this revision.
Pierre-vh added reviewers: AMDGPU, foad, arsenm.
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We naively broke all incoming values, assuming they'd be unique.
However it's not illegal to have multiple occurences of, e.g. `[BB0, V0]`
in a PHI node. What's illegal though is having the same basic block
multiple times but with different values, and it's exactly what the
transform caused. This broke in some rare applications where the pattern
arised.
Now we cache the `BasicBlock, Value` pairs we're breaking so we can reuse the values and preserve this invariant.
Solves SWDEV-399460
Repository:
rG LLVM Github Monorepo
https://reviews.llvm.org/D151069
Files:
llvm/lib/Target/AMDGPU/AMDGPUCodeGenPrepare.cpp
llvm/test/CodeGen/AMDGPU/amdgpu-codegenprepare-break-large-phis-heuristics.ll
llvm/test/CodeGen/AMDGPU/amdgpu-codegenprepare-break-large-phis.ll
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