[PATCH] D151289: [AMDGPU] Check if register is non-null before calling isSubRegisterEq (NFCI)

[Sergei Barannikov via Phabricator via llvm-commits]

barannikov88 updated this revision to Diff 525028.
barannikov88 added a comment.

Apply the suggestion and rebase on top of 8e16365c <https://reviews.llvm.org/rG8e16365cb6162a29a2a8d26f2d5f0081a651d73a> to get a green mark


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D151289/new/

https://reviews.llvm.org/D151289

Files:
  llvm/lib/Target/AMDGPU/SIFrameLowering.cpp


Index: llvm/lib/Target/AMDGPU/SIFrameLowering.cpp
===================================================================
--- llvm/lib/Target/AMDGPU/SIFrameLowering.cpp
+++ llvm/lib/Target/AMDGPU/SIFrameLowering.cpp
@@ -565,7 +565,7 @@
     // reserved input we needed. Also for PAL, make sure we don't clobber
     // the GIT pointer passed in SGPR0 or SGPR8.
     if (!MRI.isPhysRegUsed(Reg) && MRI.isAllocatable(Reg) &&
-        !TRI->isSubRegisterEq(Reg, GITPtrLoReg)) {
+        (!GITPtrLoReg || !TRI->isSubRegisterEq(Reg, GITPtrLoReg))) {
       MRI.replaceRegWith(ScratchRsrcReg, Reg);
       MFI->setScratchRSrcReg(Reg);
       return Reg;


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