[PATCH] D151289: [AMDGPU] Check if register is non-null before calling isSubRegisterEq (NFCI)
Jay Foad via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Tue May 23 23:35:59 PDT 2023
foad accepted this revision.
foad added a comment.
This revision is now accepted and ready to land.
> D151036 <https://reviews.llvm.org/D151036> adds an assertions that prohibits iterating over sub- and
> super-registers of a null register. This is already the case when
> iterating over register units of a null register, and worked by
> accident for sub- and super-registers.
OK. I had been wondering if it made sense to treat 0 as a kind of empty register, i.e. no regunits, no subregs, no aliases, (not sure about superregs). But if the existing code did not allow you to iterate its regunits then I think it's pretty clear that this was not the intended design.
================
Comment at: llvm/lib/Target/AMDGPU/SIFrameLowering.cpp:568
if (!MRI.isPhysRegUsed(Reg) && MRI.isAllocatable(Reg) &&
- !TRI->isSubRegisterEq(Reg, GITPtrLoReg)) {
+ !(GITPtrLoReg && TRI->isSubRegisterEq(Reg, GITPtrLoReg))) {
MRI.replaceRegWith(ScratchRsrcReg, Reg);
----------------
@arsenm will ask you to "De Morgan" this :)
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D151289/new/
https://reviews.llvm.org/D151289
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