[PATCH] D151285: [MC] Check if register is non-null before calling isSubRegisterEq (NFCI)

[Sergei Barannikov via Phabricator via llvm-commits]

barannikov88 updated this revision to Diff 524994.
barannikov88 added a comment.

Fix typo


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D151285/new/

https://reviews.llvm.org/D151285

Files:
  bolt/lib/Core/MCPlusBuilder.cpp
  llvm/lib/MC/MCInstrDesc.cpp


Index: llvm/lib/MC/MCInstrDesc.cpp
===================================================================
--- llvm/lib/MC/MCInstrDesc.cpp
+++ llvm/lib/MC/MCInstrDesc.cpp
@@ -40,7 +40,7 @@
 bool MCInstrDesc::hasDefOfPhysReg(const MCInst &MI, unsigned Reg,
                                   const MCRegisterInfo &RI) const {
   for (int i = 0, e = NumDefs; i != e; ++i)
-    if (MI.getOperand(i).isReg() &&
+    if (MI.getOperand(i).isReg() && MI.getOperand(i).getReg() &&
         RI.isSubRegisterEq(Reg, MI.getOperand(i).getReg()))
       return true;
   if (variadicOpsAreDefs())
Index: bolt/lib/Core/MCPlusBuilder.cpp
===================================================================
--- bolt/lib/Core/MCPlusBuilder.cpp
+++ bolt/lib/Core/MCPlusBuilder.cpp
@@ -425,7 +425,7 @@
 bool MCPlusBuilder::hasUseOfPhysReg(const MCInst &MI, unsigned Reg) const {
   const MCInstrDesc &InstInfo = Info->get(MI.getOpcode());
   for (int I = InstInfo.NumDefs; I < InstInfo.NumOperands; ++I)
-    if (MI.getOperand(I).isReg() &&
+    if (MI.getOperand(I).isReg() && MI.getOperand(I).getReg() &&
         RegInfo->isSubRegisterEq(Reg, MI.getOperand(I).getReg()))
       return true;
   for (MCPhysReg ImplicitUse : InstInfo.implicit_uses()) {


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