[llvm] a6e2b1e - [RISCV][test] Remove unneeded (implied) 'f' from Zvfbfwma, Zvfbfmin attribute tests

[Alex Bradbury via llvm-commits]

Author: Alex Bradbury
Date: 2023-05-22T14:36:01+01:00
New Revision: a6e2b1ee49f553a06e22729d90e0a2738caf052e

URL: https://github.com/llvm/llvm-project/commit/a6e2b1ee49f553a06e22729d90e0a2738caf052e
DIFF: https://github.com/llvm/llvm-project/commit/a6e2b1ee49f553a06e22729d90e0a2738caf052e.diff

LOG: [RISCV][test] Remove unneeded (implied) 'f' from Zvfbfwma, Zvfbfmin attribute tests

This means the test properly checks that RISCVISAInfo includes the
implication for the F extension (directly, or indirectly through
zve32f).

Added: 
    

Modified: 
    llvm/test/CodeGen/RISCV/attributes.ll
    llvm/test/MC/RISCV/attribute-arch.s

Removed: 
    


################################################################################
diff  --git a/llvm/test/CodeGen/RISCV/attributes.ll b/llvm/test/CodeGen/RISCV/attributes.ll
index 532fe55962563..88070e27fb918 100644
--- a/llvm/test/CodeGen/RISCV/attributes.ll
+++ b/llvm/test/CodeGen/RISCV/attributes.ll
@@ -159,8 +159,8 @@
 ; RUN: llc -mtriple=riscv64 -mattr=+experimental-smaia %s -o - | FileCheck --check-prefixes=CHECK,RV64SMAIA %s
 ; RUN: llc -mtriple=riscv64 -mattr=+experimental-ssaia %s -o - | FileCheck --check-prefixes=CHECK,RV64SSAIA %s
 ; RUN: llc -mtriple=riscv64 -mattr=+experimental-zfbfmin %s -o - | FileCheck --check-prefixes=CHECK,RV64ZFBFMIN %s
-; RUN: llc -mtriple=riscv64 -mattr=+f,+experimental-zvfbfmin %s -o - | FileCheck --check-prefixes=CHECK,RV64ZVFBFMIN %s
-; RUN: llc -mtriple=riscv64 -mattr=+f,+experimental-zvfbfwma %s -o - | FileCheck --check-prefixes=CHECK,RV64ZVFBFWMA %s
+; RUN: llc -mtriple=riscv64 -mattr=+experimental-zvfbfmin %s -o - | FileCheck --check-prefixes=CHECK,RV64ZVFBFMIN %s
+; RUN: llc -mtriple=riscv64 -mattr=+experimental-zvfbfwma %s -o - | FileCheck --check-prefixes=CHECK,RV64ZVFBFWMA %s
 
 ; CHECK: .attribute 4, 16
 

diff  --git a/llvm/test/MC/RISCV/attribute-arch.s b/llvm/test/MC/RISCV/attribute-arch.s
index 327b8cea44469..663cc66c29bf0 100644
--- a/llvm/test/MC/RISCV/attribute-arch.s
+++ b/llvm/test/MC/RISCV/attribute-arch.s
@@ -267,8 +267,8 @@
 .attribute arch, "rv32if_zfbfmin0p6"
 # CHECK: .attribute     5, "rv32i2p1_f2p2_zicsr2p0_zfbfmin0p6"
 
-.attribute arch, "rv32if_zvfbfmin0p6"
+.attribute arch, "rv32i_zvfbfmin0p6"
 # CHECK: .attribute     5, "rv32i2p1_f2p2_zicsr2p0_zve32f1p0_zve32x1p0_zvfbfmin0p6_zvl32b1p0"
 
-.attribute arch, "rv32if_zvfbfwma0p6"
+.attribute arch, "rv32i_zvfbfwma0p6"
 # CHECK: .attribute     5, "rv32i2p1_f2p2_zicsr2p0_zve32f1p0_zve32x1p0_zvfbfwma0p6_zvl32b1p0"