[PATCH] D150956: [AArch64][SME2/SVE2p1] Add predicate-as-counter intrinsics for ld1/ldnt1/st1/stnt1

[Caroline via Phabricator via llvm-commits]

CarolineConcatto accepted this revision.
CarolineConcatto added a comment.
This revision is now accepted and ready to land.

Probably because the test does not use any sve registers. So it can use the ones available.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D150956/new/

https://reviews.llvm.org/D150956