[PATCH] D151182: [LegalizeTypes][ARM][AArch6][RISCV][VE][WebAssembly] Add special case for smin(X, -1) and smax(X, 0) to ExpandIntRes_MINMAX.
Simon Pilgrim via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Tue May 23 08:59:11 PDT 2023
RKSimon accepted this revision.
RKSimon added a comment.
This revision is now accepted and ready to land.
LGTM
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D151182/new/
https://reviews.llvm.org/D151182
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