[PATCH] D151358: [LegalizeTypes] Improve expansion of wide SMIN/SMAX/UMIN/UMAX

[Eli Friedman via Phabricator via llvm-commits]

efriedma added inline comments.


================
Comment at: llvm/test/CodeGen/RISCV/min-max.ll:80
+; RV32I-NEXT:    sltu a4, a2, a0
+; RV32I-NEXT:    bnez a4, .LBB3_4
 ; RV32I-NEXT:  .LBB3_3:
----------------
It's easier to see the reason we end up with slt+beqz/sltu+bnez/etc. here.  Immediately after isel, we have one triangle followed by another triangle.  Later folding mashes the code together.  You can see the original form if you pass this function to "llc -opt-bisect-limit=0":

```
smax_i64:                               # @smax_i64
        .cfi_startproc
# %bb.0:
        slt     a5, a3, a1
        sltu    a4, a2, a0
        beq     a1, a3, .LBB0_2
# %bb.1:
        mv      a4, a5
.LBB0_2:
        bnez    a4, .LBB0_4
# %bb.3:
        mv      a0, a2
        mv      a1, a3
.LBB0_4:
        ret
```


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D151358/new/

https://reviews.llvm.org/D151358