The Week Of Monday 2 March 2026 Archives by author

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Starting: Mon Mar 2 00:00:12 PST 2026
Ending: Sun Mar 8 23:59:38 PDT 2026
Messages: 6099

• [llvm] [IR] LangRef: document behavior of double-lifetime.start (PR #184296)   Amanieu d'Antras via llvm-commits
• [llvm] [X86] Added sincos vector lib codegen test coverage (PR #183702)   Aadarsh Keshri via llvm-commits
• [llvm] [X86] Added sincos vector lib codegen test coverage (PR #183702)   Aadarsh Keshri via llvm-commits
• [llvm] [X86] Added sincos vector lib codegen test coverage (PR #183702)   Aadarsh Keshri via llvm-commits
• [llvm] [X86] Added sincos vector lib codegen test coverage (PR #183702)   Aadarsh Keshri via llvm-commits
• [llvm] [X86] Added sincos vector lib codegen test coverage (PR #183702)   Aadarsh Keshri via llvm-commits
• [llvm] [X86] Added sincos vector lib codegen test coverage (PR #183702)   Aadarsh Keshri via llvm-commits
• [llvm] [X86] Added sincos vector lib codegen test coverage (PR #183702)   Aadarsh Keshri via llvm-commits
• [llvm] [X86] Added sincos vector lib codegen test coverage (PR #183702)   Aadarsh Keshri via llvm-commits
• [llvm] [docs] Add exception to AI tool policy for Bazel build fixer (PR #183408)   Aaron Ballman via llvm-commits
• [clang] [llvm] [clang] Add `-verify-directives` cc1 flag (PR #179835)   Aaron Ballman via llvm-commits
• [llvm] [LIT] Fix env without subcommand causing early return in pipeline (PR #184028)   Aaron Chen via llvm-commits
• [llvm] [LIT] Fix env without subcommand causing early return in pipeline (PR #184028)   Aaron Chen via llvm-commits
• [llvm] [LIT] Fix env without subcommand causing early return in pipeline (PR #184028)   Aaron Chen via llvm-commits
• [llvm] [LIT] Fix env without subcommand causing early return in pipeline (PR #184028)   Aaron Chen via llvm-commits
• [llvm] [LIT] Fix env without subcommand causing early return in pipeline (PR #184028)   Aaron Chen via llvm-commits
• [llvm] [LIT] Fix env without subcommand causing early return in pipeline (PR #184028)   Aaron Chen via llvm-commits
• [llvm] [bazel] Fix building lldb with zlib disabled (PR #184525)   Aaron Siddhartha Mondal via llvm-commits
• [llvm] Fixing upper lane return source for X86 intrinsics (PR #185329)   Aaron Smull via llvm-commits
• [llvm] Fixing upper lane return source for X86 intrinsics (PR #185329)   Aaron Smull via llvm-commits
• [llvm] Fixing upper lane return source for X86 intrinsics (PR #185329)   Aaron Smull via llvm-commits
• [llvm] Fixing upper lane return source for X86 intrinsics (PR #185329)   Aaron Smull via llvm-commits
• [llvm] [SystemZ][z/OS] Add a parameter Align to emitIncrement() and use 32 for XPLINK stack on z/OS. (PR #182348)   Abhina Sree via llvm-commits
• [clang] [llvm] Enable fexec-charset option (PR #138895)   Abhina Sree via llvm-commits
• [clang] [llvm] Enable fexec-charset option (PR #138895)   Abhina Sree via llvm-commits
• [clang] [llvm] Enable fexec-charset option (PR #138895)   Abhina Sree via llvm-commits
• [clang] [llvm] Enable fexec-charset option (PR #138895)   Abhina Sree via llvm-commits
• [clang] [llvm] Enable fexec-charset option (PR #138895)   Abhina Sree via llvm-commits
• [clang] [llvm] Enable fexec-charset option (PR #138895)   Abhina Sree via llvm-commits
• [clang] [llvm] Enable fexec-charset option (PR #138895)   Abhina Sree via llvm-commits
• [clang] [llvm] Enable fexec-charset option (PR #138895)   Abhina Sree via llvm-commits
• [clang] [llvm] Enable fexec-charset option (PR #138895)   Abhina Sree via llvm-commits
• [llvm] Revert "[OpenMP][Offload] Handle `present/to/from` when a different entry did `alloc/delete`." (PR #184240)   Abhinav Gaba via llvm-commits
• [llvm] Revert "[OpenMP][Offload] Handle `present/to/from` when a different entry did `alloc/delete`." (PR #184240)   Abhinav Gaba via llvm-commits
• [llvm] Revert "[OpenMP][Offload] Handle `present/to/from` when a different entry did `alloc/delete`." (PR #184240)   Abhinav Gaba via llvm-commits
• [llvm] Revert "[OpenMP][Offload] Handle `present/to/from` when a different entry did `alloc/delete`." (PR #184240)   Abhinav Gaba via llvm-commits
• [llvm] Revert "[OpenMP][Offload] Handle `present/to/from` when a different entry did `alloc/delete`." (PR #184240)   Abhinav Gaba via llvm-commits
• [llvm] [NFC][OpenMP] Remove redundant prints in `target` regions from tests added in #184260. (PR #184266)   Abhinav Gaba via llvm-commits
• [llvm] [NFC][OpenMP] Remove redundant prints in `target` regions from tests added in #184260. (PR #184266)   Abhinav Gaba via llvm-commits
• [llvm] [NFC][OpenMP] Remove redundant prints in `target` regions from tests added in #184260. (PR #184266)   Abhinav Gaba via llvm-commits
• [llvm] [NFC][OpenMP] Remove redundant prints in `target` regions from tests added in #184260. (PR #184266)   Abhinav Gaba via llvm-commits
• [llvm] [NFC][OpenMP] Remove redundant prints in `target` regions from tests added in #184260. (PR #184266)   Abhinav Gaba via llvm-commits
• [clang] [llvm] [Clang][OpenMP] Support expression semantics in target update fields with non-contiguous array sections (PR #176708)   Abhinav Gaba via llvm-commits
• [clang] [llvm] [Clang][OpenMP] Support expression semantics in target update fields with non-contiguous array sections (PR #176708)   Abhinav Gaba via llvm-commits
• [clang] [llvm] [Clang][OpenMP] Handled `NonContig` Descriptor `DimCount` (PR #181987)   Abhinav Gaba via llvm-commits
• [llvm] [LoopUnroll] Enable allowexpensivetripcounts when user provides pragma (PR #181267)   Adel Ejjeh via llvm-commits
• [llvm] [LoopUnroll] Enable allowexpensivetripcounts when user provides pragma (PR #181267)   Adel Ejjeh via llvm-commits
• [llvm] [llvm][DebugInfo] Emit DW_LNAME_Assembly for DWARFv6 assembly CUs (PR #183897)   Adrian Prantl via llvm-commits
• [llvm] [LoopFusion] remove else after return (NFC) (PR #184993)   Afonso Rafael via llvm-commits
• [llvm] [LoopFusion] remove else after return (NFC) (PR #184993)   Afonso Rafael via llvm-commits
• [llvm] [LoopFusion] remove else after return (NFC) (PR #184993)   Afonso Rafael via llvm-commits
• [llvm] [LoopFusion] remove else after return (NFC) (PR #184993)   Afonso Rafael via llvm-commits
• [llvm] [LoopFusion] remove else after return (NFC) (PR #184993)   Afonso Rafael via llvm-commits
• [llvm] [LoopFusion] remove else after return (NFC) (PR #184993)   Afonso Rafael via llvm-commits
• [llvm] [AArch64] New pass for code layout optimizations. (PR #184434)   Ahmad Yasin via llvm-commits
• [llvm] [AArch64] New pass for code layout optimizations. (PR #184434)   Ahmad Yasin via llvm-commits
• [llvm] [AArch64] Adding FeatureFuseFCmpFCSel (PR #184881)   Ahmad Yasin via llvm-commits
• [llvm] [Github] Enable long paths in windows CI Container (PR #184224)   Aiden Grossman via llvm-commits
• [llvm] [Github] Enable long paths in windows CI Container (PR #184224)   Aiden Grossman via llvm-commits
• [llvm] [utils] use annotations from __future__ in lit (PR #184225)   Aiden Grossman via llvm-commits
• [llvm] [Github] Bump Github Runner to v2.332.0 (PR #184230)   Aiden Grossman via llvm-commits
• [llvm] [LoopUnrollPass] Don't use clang specific syntax in optimization remarks (PR #182430)   Aiden Grossman via llvm-commits
• [llvm] [LIT] Fix env without subcommand causing early return in pipeline (PR #184028)   Aiden Grossman via llvm-commits
• [llvm] [CI][SPIRV][NFC] Remove unneccessary mkdir from workflow (PR #184353)   Aiden Grossman via llvm-commits
• [llvm] [ARM] Add basic NPM support for LoadStoreOptimizer (PR #184139)   Aiden Grossman via llvm-commits
• [llvm] [ARM] Add basic NPM support for LoadStoreOptimizer (PR #184139)   Aiden Grossman via llvm-commits
• [llvm] [ARM] Add basic NPM support for LoadStoreOptimizer (PR #184139)   Aiden Grossman via llvm-commits
• [llvm] [ARM] Add basic NPM support for LoadStoreOptimizer (PR #184139)   Aiden Grossman via llvm-commits
• [llvm] [ARM] Add basic NPM support for LoadStoreOptimizer (PR #184139)   Aiden Grossman via llvm-commits
• [llvm] [Github] Bump clang-format/clang-tidy to v22.1.0 (PR #184374)   Aiden Grossman via llvm-commits
• [llvm] [bazel][mlir] Fix Bazel build for a232b5b (PR #184394)   Aiden Grossman via llvm-commits
• [llvm] [Benchmark] Fix warnings around usage of __COUNTER__ (PR #184524)   Aiden Grossman via llvm-commits
• [llvm] Reapply "[AArch64] Wrap integer SCALAR_TO_VECTOR nodes in bitcasts (#172837)" (#183380) (PR #184403)   Aiden Grossman via llvm-commits
• [llvm] [AArch64] Update clmul tests after #184403 (PR #184611)   Aiden Grossman via llvm-commits
• [llvm] [AArch64] Update clmul tests after #184403 (PR #184611)   Aiden Grossman via llvm-commits
• [llvm] [CI] Install binutils-dev in pre-merge container (PR #184608)   Aiden Grossman via llvm-commits
• [llvm] [CI] Install binutils-dev in pre-merge container (PR #184608)   Aiden Grossman via llvm-commits
• [llvm] [CI] Install binutils-dev in pre-merge container (PR #184608)   Aiden Grossman via llvm-commits
• [llvm] [X86] remove unnecessary movs when %rdx is an input to mulx (PR #184462)   Aiden Grossman via llvm-commits
• [llvm] [AArch64] Update clmul tests after #184403 (PR #184611)   Aiden Grossman via llvm-commits
• [llvm] [SelectionDAG] Fix -Wunused-variable after #179318 (PR #184623)   Aiden Grossman via llvm-commits
• [llvm] [CI] Install binutils-dev in pre-merge container (PR #184608)   Aiden Grossman via llvm-commits
• [llvm] [AArch64] Update clmul tests after #184403 (PR #184611)   Aiden Grossman via llvm-commits
• [llvm] [X86] remove unnecessary movs when %rdx is an input to mulx (PR #184462)   Aiden Grossman via llvm-commits
• [llvm] [SelectionDAG] Fix -Wunused-variable after #179318 (PR #184623)   Aiden Grossman via llvm-commits
• [llvm] [X86] remove unnecessary movs when %rdx is an input to mulx (PR #184462)   Aiden Grossman via llvm-commits
• [llvm] [X86] remove unnecessary movs when %rdx is an input to mulx (PR #184462)   Aiden Grossman via llvm-commits
• [llvm] [SelectionDAG] Fix -Wunused-variable after #179318 (PR #184623)   Aiden Grossman via llvm-commits
• [llvm] [CI] Enable LTO linker plugin tests (PR #184076)   Aiden Grossman via llvm-commits
• [llvm] [bazel] Add target for `clang-nvlink-wrapper` (PR #184644)   Aiden Grossman via llvm-commits
• [llvm] [CI] Enable LTO linker plugin tests (PR #184076)   Aiden Grossman via llvm-commits
• [llvm] [ci][github][analyzer] Enable Z3 for Clang Static Analyzer on Linux (PR #184695)   Aiden Grossman via llvm-commits
• [llvm] [CI] Enable OpenMP and Offload runtime in premerge (PR #174955)   Aiden Grossman via llvm-commits
• [llvm] Update Bazel build files for a9fb8b0 (PR #184823)   Aiden Grossman via llvm-commits
• [llvm] [CI][libsycl] Add libsycl precommit testing job (PR #184174)   Aiden Grossman via llvm-commits
• [llvm] ad6d87d - Revert "[ConstantFolding] Consider `tanh*` to always be a noop (#70794)"   Aiden Grossman via llvm-commits
• [llvm] [ConstantFolding] Consider `tanh*` to always be a noop (PR #70794)   Aiden Grossman via llvm-commits
• [llvm] Fix bazel build for 00e247ad76fdd0cd5841193950c8d4927e3015f8 (PR #185055)   Aiden Grossman via llvm-commits
• [llvm] [NewPM] Port for AArch64A53Fix835769 (PR #184965)   Aiden Grossman via llvm-commits
• [llvm] [NewPM] Port for AArch64A53Fix835769 (PR #184965)   Aiden Grossman via llvm-commits
• [llvm] [NewPM] Port for AArch64A53Fix835769 (PR #184965)   Aiden Grossman via llvm-commits
• [llvm] [NewPM] Port for AArch64A53Fix835769 (PR #184965)   Aiden Grossman via llvm-commits
• [llvm] [CodGen] Port UnpackMachineBundles to new pass manager (PR #184918)   Aiden Grossman via llvm-commits
• [llvm] [LoopFusion] remove else after return (NFC) (PR #184993)   Aiden Grossman via llvm-commits
• [llvm] [LoopFusion] remove else after return (NFC) (PR #184993)   Aiden Grossman via llvm-commits
• [llvm] [LoopFusion] remove else after return (NFC) (PR #184993)   Aiden Grossman via llvm-commits
• [llvm] Git ignore install directory (PR #77181)   Aiden Grossman via llvm-commits
• [llvm] [NewPM] Port for AArch64A53Fix835769 (PR #184965)   Aiden Grossman via llvm-commits
• [llvm] Git ignore install directory (PR #77181)   Aiden Grossman via llvm-commits
• [llvm] [Bazel] Fixes 58efc42 (PR #185227)   Aiden Grossman via llvm-commits
• [llvm] [Bazel] Fixes 58efc42 (PR #185223)   Aiden Grossman via llvm-commits
• [llvm] [Bazel] Fixes 58efc42 (PR #185223)   Aiden Grossman via llvm-commits
• [llvm] [Bazel] Fixes 58efc42 (PR #185227)   Aiden Grossman via llvm-commits
• [llvm] [Bazel] Fixes 58efc42 (PR #185227)   Aiden Grossman via llvm-commits
• [llvm] Testing windows flaky lld link (PR #185246)   Aiden Grossman via llvm-commits
• [llvm] Testing windows flaky lld link (PR #185246)   Aiden Grossman via llvm-commits
• [llvm] Testing windows flaky lld link (PR #185246)   Aiden Grossman via llvm-commits
• [llvm] Testing windows flaky lld link (PR #185246)   Aiden Grossman via llvm-commits
• [llvm] Testing windows flaky lld link (PR #185246)   Aiden Grossman via llvm-commits
• [llvm] Testing windows flaky lld link (PR #185246)   Aiden Grossman via llvm-commits
• [llvm] Testing windows flaky lld link (PR #185246)   Aiden Grossman via llvm-commits
• [llvm] Testing windows flaky lld link (PR #185246)   Aiden Grossman via llvm-commits
• [llvm] Testing windows flaky lld link 2 (PR #185249)   Aiden Grossman via llvm-commits
• [llvm] [CI] Try lowering max parallel link jobs on Windows (PR #185255)   Aiden Grossman via llvm-commits
• [llvm] [CI] Try lowering max parallel link jobs on Windows (PR #185255)   Aiden Grossman via llvm-commits
• [llvm] [CI] Try lowering max parallel link jobs on Windows (PR #185255)   Aiden Grossman via llvm-commits
• [llvm] [CI] Try lowering max parallel link jobs on Windows (PR #185255)   Aiden Grossman via llvm-commits
• [llvm] [Bazel] Fixes af7c352 (PR #185286)   Aiden Grossman via llvm-commits
• [llvm] [Bazel] Fix af7c352fa38d49096888df6c99d010d274362aa6 (PR #185308)   Aiden Grossman via llvm-commits
• [llvm] [Bazel] Fix af7c352fa38d49096888df6c99d010d274362aa6 (PR #185308)   Aiden Grossman via llvm-commits
• [llvm] [NewPM] Add port for aarch64-simd-scalar (PR #185256)   Aiden Grossman via llvm-commits
• [llvm] [VPlan] Remove manual region removal when simplifying for VF and UF. (PR #181252)   Aiden Grossman via llvm-commits
• [llvm] e30f9c1 - Revert "Reapply "[VPlan] Remove manual region removal when simplifying for VF and UF. (#181252)""   Aiden Grossman via llvm-commits
• [llvm] [mlir] [MLIR][Shape] Preserve ub.poison during canonicalization (PR #179896)   Akimasa Watanuki via llvm-commits
• [llvm] [mlir] [MLIR][Shape] Preserve ub.poison during canonicalization (PR #179896)   Akimasa Watanuki via llvm-commits
• [llvm] [llvm][tools] Add support to llvm-offload-binary to unbundle spirv64-intel images (PR #184774)   Alex Duran via llvm-commits
• [llvm] [llvm][tools] Add support to llvm-offload-binary to unbundle spirv64-intel images (PR #184774)   Alex Duran via llvm-commits
• [llvm] [OFFLOAD] New bintool to extract images from binaries (PR #181689)   Alex Duran via llvm-commits
• [llvm] [OFFLOAD] Add support to dump device images (PR #180545)   Alex Duran via llvm-commits
• [llvm] [OFFLOAD] Add support to dump device images (PR #180545)   Alex Duran via llvm-commits
• [llvm] [OFFOLOAD][L0] Add support to dump embedded spirv files (PR #180715)   Alex Duran via llvm-commits
• [llvm] [OFFOLOAD][L0] Add support to dump embedded spirv files (PR #180715)   Alex Duran via llvm-commits
• [llvm] [llvm][tools] Improve llvm-gpu-loader checks (PR #184791)   Alex Duran via llvm-commits
• [llvm] [llvm][tools] Add support to llvm-offload-binary to unbundle spirv64-intel images (PR #184774)   Alex Duran via llvm-commits
• [llvm] [llvm][tools] Add support to llvm-offload-binary to unbundle spirv64-intel images (PR #184774)   Alex Duran via llvm-commits
• [llvm] [llvm][tools] Add support to llvm-offload-binary to unbundle spirv64-intel images (PR #184774)   Alex Duran via llvm-commits
• [llvm] [llvm][tools] Add support to llvm-offload-binary to unbundle spirv64-intel images (PR #184774)   Alex Duran via llvm-commits
• [llvm] [llvm][tools] Add support to llvm-offload-binary to unbundle spirv64-intel images (PR #184774)   Alex Duran via llvm-commits
• [llvm] [llvm][tools] Improve llvm-gpu-loader checks (PR #184791)   Alex Duran via llvm-commits
• [llvm] [offload] Add properties parameter to olLaunchKernel (PR #184343)   Alex Duran via llvm-commits
• [llvm] [NVPTX] Merge consecutive elements while buffering constant vectors with sub-byte datatype. (PR #183628)   Alex MacLean via llvm-commits
• [llvm] [AArch64] Fix sign-extend-inreg combine for i1 types (PR #177976)   Alex Reinking via llvm-commits
• [llvm] [Support] Improve the logic for re-raising signals (PR #177864)   Alex Rønne Petersen via llvm-commits
• [llvm] [FastISel] Lower call instruction with illegal type returned (PR #180322)   Alex Rønne Petersen via llvm-commits
• [clang] [llvm] [HLSL][DXIL] InterlockedOr and InterlockedOr64 builtins (PR #180804)   Alexander Johnston via llvm-commits
• [lld] [ELF] Add target-specific relocation scanning for x86 (PR #178846)   Alexander Kornienko via llvm-commits
• [lld] [ELF] Add target-specific relocation scanning for x86 (PR #178846)   Alexander Kornienko via llvm-commits
• [lld] [ELF] Add target-specific relocation scanning for x86 (PR #178846)   Alexander Kornienko via llvm-commits
• [llvm] [MC] Rename PrivateGlobalPrefix to InternalSymbolPrefix. NFC (PR #185164)   Alexander Richardson via llvm-commits
• [llvm] [MC] Rename PrivateGlobalPrefix to InternalSymbolPrefix. NFC (PR #185164)   Alexander Richardson via llvm-commits
• [llvm] [MC] Rename PrivateGlobalPrefix to InternalSymbolPrefix. NFC (PR #185164)   Alexander Richardson via llvm-commits
• [lld] [lld] update maintainers (PR #183803)   Alexandre Ganea via llvm-commits
• [lld] [lld] update maintainers (PR #183803)   Alexandre Ganea via llvm-commits
• [lld] [lld] update maintainers (PR #183803)   Alexandre Ganea via llvm-commits
• [lld] [lld] Turn misc copy-assign to move-assign (PR #184145)   Alexandre Ganea via llvm-commits
• [lldb] [llvm] [Support] Move HTTP client/server to new LLVMSupportHTTP lib (NFC) (PR #184572)   Alexandre Ganea via llvm-commits
• [lldb] [llvm] [Support] Move HTTP client/server to new LLVMSupportHTTP lib (NFC) (PR #184572)   Alexandre Ganea via llvm-commits
• [lldb] [llvm] [Support] Move HTTP client/server to new LLVMSupportHTTP lib (NFC) (PR #184572)   Alexandre Ganea via llvm-commits
• [clang-tools-extra] [llvm] [LLVM][Support] Move default values out of the storage (PR #184581)   Alexandre Ganea via llvm-commits
• [llvm] [BOLT][AArch64] Add minimal support for liveness analysis. (PR #183298)   Alexandros Lamprineas via llvm-commits
• [llvm] [libsycl] Add sycl::queue stub (PR #184110)   Alexey Bader via llvm-commits
• [llvm] [libsycl] Add sycl::queue stub (PR #184110)   Alexey Bader via llvm-commits
• [llvm] [libsycl] Add sycl::queue stub (PR #184110)   Alexey Bader via llvm-commits
• [llvm] [CI][libsycl] Add libsycl precommit testing job (PR #184174)   Alexey Bader via llvm-commits
• [llvm] [SLP]Convert compares from zexts, promoted to selects, to inversed op, if improves codegen (PR #181580)   Alexey Bataev via llvm-commits
• [clang] [llvm] [OpenMP] Use CreatePtrDiff() (PR #184127)   Alexey Bataev via llvm-commits
• [llvm] [SLP] Loop aware cost model/tree building (PR #150450)   Alexey Bataev via llvm-commits
• [llvm] [SLP]Prefer copyable over alternate (PR #183777)   Alexey Bataev via llvm-commits
• [llvm] [SLP] Loop aware cost model/tree building (PR #150450)   Alexey Bataev via llvm-commits
• [llvm] [SLP] Loop aware cost model/tree building (PR #150450)   Alexey Bataev via llvm-commits
• [llvm] [SLP]Remove Alternate early profitability checks in favor of throttling (PR #182760)   Alexey Bataev via llvm-commits
• [llvm] [SLP]Allow bitcast/bswap based reductions for types, larger than the total strided size (PR #184018)   Alexey Bataev via llvm-commits
• [llvm] [SLP]Remove Alternate early profitability checks in favor of throttling (PR #182760)   Alexey Bataev via llvm-commits
• [llvm] 43fc0f3 - [SLP][NFC]Add a case with a missing matching between shl/add/sub, NFC   Alexey Bataev via llvm-commits
• [llvm] [SLP]Initial compatibility support for shl v, 1 and add v, v (PR #181168)   Alexey Bataev via llvm-commits
• [llvm] [SLP]Initial compatibility support for shl v, 1 and add v, v (PR #181168)   Alexey Bataev via llvm-commits
• [llvm] [SLP]Allow bitcast/bswap based reductions for types, larger than the total strided size (PR #184018)   Alexey Bataev via llvm-commits
• [llvm] b7ed29d - [SLP][NFC]Add a test with a loop with profiling info, NFC   Alexey Bataev via llvm-commits
• [llvm] [SLP] Fix logic for commuting copyable operands in buildInstructionsState() (PR #183773)   Alexey Bataev via llvm-commits
• [llvm] [SLP]Allow bitcast/bswap based reductions for types, larger than the total strided size (PR #184018)   Alexey Bataev via llvm-commits
• [llvm] ac5081a - [SLP][NFC]Add a test with the missing matching of same nodes with reuses, NFC   Alexey Bataev via llvm-commits
• [llvm] a96a0de - [SLP]Fix the matching of the nodes with the same scalars, but reused   Alexey Bataev via llvm-commits
• [llvm] [SLP] Fix misvectorization in commutative to non-commutative conversion (PR #185230)   Alexey Bataev via llvm-commits
• [llvm] [SLP]Initial compatibility support for shl v, 1 and add v, v (PR #181168)   Alexey Bataev via llvm-commits
• [llvm] [SLP]Initial compatibility support for shl v, 1 and add v, v (PR #181168)   Alexey Bataev via llvm-commits
• [llvm] d8b718a - [SLP]Match the mask size, when copying mask for full match   Alexey Bataev via llvm-commits
• [llvm] [SLP]Remove Alternate early profitability checks in favor of throttling (PR #182760)   Alexey Bataev via llvm-commits
• [llvm] [SLP]Remove Alternate early profitability checks in favor of throttling (PR #182760)   Alexey Bataev via llvm-commits
• [llvm] [SLP]Allow bitcast/bswap based reductions for types, larger than the total strided size (PR #184018)   Alexey Bataev via llvm-commits
• [llvm] [SLP]Allow bitcast/bswap based reductions for types, larger than the total strided size (PR #184018)   Alexey Bataev via llvm-commits
• [llvm] [SLP]Initial compatibility support for shl v, 1 and add v, v (PR #181168)   Alexey Bataev via llvm-commits
• [llvm] [SLP]Initial compatibility support for shl v, 1 and add v, v (PR #181168)   Alexey Bataev via llvm-commits
• [llvm] [SLP]Prefer copyable over alternate (PR #183777)   Alexey Bataev via llvm-commits
• [llvm] [SLP] Check the Operands of Copyable elements as well in getBestOperand() (PR #182443)   Alexey Bataev via llvm-commits
• [llvm] [SLP]Initial support for ordered reductions (PR #182644)   Alexey Bataev via llvm-commits
• [llvm] e25e010 - [SLP][NFC]Add a test for bswap of i64 by 2 i32 bswaps   Alexey Bataev via llvm-commits
• [llvm] [SLP]Improve analysis of copyables operands for commmutative main instruction (PR #185320)   Alexey Bataev via llvm-commits
• [llvm] [SLP]Improve analysis of copyables operands for commmutative main instruction (PR #185320)   Alexey Bataev via llvm-commits
• [llvm] [SLP]Improve analysis of copyables operands for commmutative main instruction (PR #185320)   Alexey Bataev via llvm-commits
• [llvm] [SLP]Improve analysis of copyables operands for commmutative main instruction (PR #185320)   Alexey Bataev via llvm-commits
• [llvm] [Hexagon] Shuffle patterns to vdeal + vpack (PR #146122)   Alexey Karyakin via llvm-commits
• [lld] [lld][Hexagon] Fix findMaskR8 missing duplex support (PR #183936)   Alexey Karyakin via llvm-commits
• [llvm] [Hexagon] Support .reloc asm directive (PR #183849)   Alexey Karyakin via llvm-commits
• [llvm] [Hexagon] Support .reloc asm directive (PR #183849)   Alexey Karyakin via llvm-commits
• [llvm] [Hexagon] Support .reloc asm directive (PR #183849)   Alexey Karyakin via llvm-commits
• [llvm] [BOLT] Check if symbol is in data area of function (PR #160143)   Alexey Moksyakov via llvm-commits
• [llvm] [BOLT][AArch64] Add indirect call promotion support (PR #184733)   Alexey Moksyakov via llvm-commits
• [llvm] [BOLT][AArch64] Add indirect call promotion support (PR #184733)   Alexey Moksyakov via llvm-commits
• [clang] [compiler-rt] [llvm] [TSan] Add escape analysis for redundant instrumentation elimination (PR #169896)   Alexey Paznikov via llvm-commits
• [clang] [compiler-rt] [llvm] [TSan] Add dominance-based redundant instrumentation elimination (PR #169897)   Alexey Paznikov via llvm-commits
• [clang] [compiler-rt] [llvm] [TSan] Add escape analysis for redundant instrumentation elimination (PR #169896)   Alexey Paznikov via llvm-commits
• [clang] [compiler-rt] [llvm] [TSan] Add dominance-based redundant instrumentation elimination (PR #169897)   Alexey Paznikov via llvm-commits
• [llvm] [mlir] [IR] Split Br into UncondBr and CondBr (PR #184027)   Alexis Engelke via llvm-commits
• [llvm] [mlir] [IR] Split Br into UncondBr and CondBr (PR #184027)   Alexis Engelke via llvm-commits
• [llvm] [mlir] [IR] Split Br into UncondBr and CondBr (PR #184027)   Alexis Engelke via llvm-commits
• [llvm] [mlir] [IR] Split Br into UncondBr and CondBr (PR #184027)   Alexis Engelke via llvm-commits
• [llvm] [mlir] [IR] Split Br into UncondBr and CondBr (PR #184027)   Alexis Engelke via llvm-commits
• [lldb] [llvm] [mlir] [IR] Split Br into UncondBr and CondBr (PR #184027)   Alexis Engelke via llvm-commits
• [lldb] [llvm] [mlir] [IR] Split Br into UncondBr and CondBr (PR #184027)   Alexis Engelke via llvm-commits
• [clang] [flang] [llvm] [mlir] [polly] [CMake][LLVM] Add PCH infrastructure and LLVMSupport PCH (PR #176420)   Alexis Engelke via llvm-commits
• [lldb] [llvm] [mlir] [IR] Split Br into UncondBr and CondBr (PR #184027)   Alexis Engelke via llvm-commits
• [lldb] [llvm] [mlir] [IR] Split Br into UncondBr and CondBr (PR #184027)   Alexis Engelke via llvm-commits
• [lldb] [llvm] [mlir] [IR] Split Br into UncondBr and CondBr (PR #184027)   Alexis Engelke via llvm-commits
• [clang] [flang] [llvm] [mlir] [polly] [CMake][LLVM] Add PCH infrastructure and LLVMSupport PCH (PR #176420)   Alexis Engelke via llvm-commits
• [clang] [lld] [llvm] Support -fpass-plugin + -fthinlto-index together (PR #183525)   Alexis Engelke via llvm-commits
• [llvm] [Analysis][NFC] Store CallbackVH in vector, not in map (PR #184323)   Alexis Engelke via llvm-commits
• [llvm] [Analysis][NFC] Store CallbackVH in vector, not in map (PR #184323)   Alexis Engelke via llvm-commits
• [llvm] [Analysis][NFC] Store CallbackVH in vector, not in map (PR #184323)   Alexis Engelke via llvm-commits
• [llvm] [Analysis][NFC] Store CallbackVH in vector, not in map (PR #184323)   Alexis Engelke via llvm-commits
• [clang] [flang] [llvm] [mlir] [polly] [CMake][LLVM] Add PCH infrastructure and LLVMSupport PCH (PR #176420)   Alexis Engelke via llvm-commits
• [clang] [llvm] [X86] support reserve r8~r15 on X86_64 (PR #180242)   Alexis Engelke via llvm-commits
• [clang] [llvm] [X86] Reduce -ffixed-r compile-time overhead (PR #184606)   Alexis Engelke via llvm-commits
• [clang] [llvm] [X86] Reduce -ffixed-r compile-time overhead (PR #184606)   Alexis Engelke via llvm-commits
• [clang] [llvm] [X86] Reduce -ffixed-r compile-time overhead (PR #184606)   Alexis Engelke via llvm-commits
• [clang] [llvm] [X86] Reduce -ffixed-r compile-time overhead (PR #184606)   Alexis Engelke via llvm-commits
• [clang] [llvm] [X86] Reduce -ffixed-r compile-time overhead (PR #184606)   Alexis Engelke via llvm-commits
• [clang] [llvm] [X86] Reduce -ffixed-r compile-time overhead (PR #184606)   Alexis Engelke via llvm-commits
• [clang] [llvm] [X86] Reduce -ffixed-r compile-time overhead (PR #184606)   Alexis Engelke via llvm-commits
• [clang] [flang] [llvm] [mlir] [polly] [CMake][LLVM] Add PCH infrastructure and LLVMSupport PCH (PR #176420)   Alexis Engelke via llvm-commits
• [clang] [llvm] [X86] Reduce -ffixed-r compile-time overhead (PR #184606)   Alexis Engelke via llvm-commits
• [clang] [llvm] [X86] Reduce -ffixed-r compile-time overhead (PR #184606)   Alexis Engelke via llvm-commits
• [lldb] [llvm] [mlir] [IR] Split Br into UncondBr and CondBr (PR #184027)   Alexis Engelke via llvm-commits
• [llvm] [MC] Rename getPrivateGlobalPrefix to getInternalSymbolPrefix. NFC (PR #185164)   Alexis Engelke via llvm-commits
• [llvm] [MC] Rename getPrivateGlobalPrefix to getInternalSymbolPrefix. NFC (PR #185164)   Alexis Engelke via llvm-commits
• [llvm] [MC] Rename getPrivateGlobalPrefix to getInternalSymbolPrefix. NFC (PR #185164)   Alexis Engelke via llvm-commits
• [lldb] [llvm] [mlir] [IR] Split Br into UncondBr and CondBr (PR #184027)   Alexis Engelke via llvm-commits
• [llvm] [Analysis] Require explict updates to BFI (PR #185184)   Alexis Engelke via llvm-commits
• [llvm] [Analysis] Require explict updates to BFI (PR #185184)   Alexis Engelke via llvm-commits
• [llvm] [Analysis] Require explict updates to BFI (PR #185184)   Alexis Engelke via llvm-commits
• [llvm] [IR] Add initial support for the byte type (PR #178666)   Alina Sbirlea via llvm-commits
• [llvm] [LoopFusion] Correction in the comments (NFC) (PR #184689)   Alireza Torabian via llvm-commits
• [llvm] [LoopFusion] remove else after return (NFC) (PR #184993)   Alireza Torabian via llvm-commits
• [llvm] [LoopFusion] remove else after return (NFC) (PR #184993)   Alireza Torabian via llvm-commits
• [llvm] [AArch64] Optimize vector multiplications by certain constants for v2i64 (PR #183827)   Aly ElAshram via llvm-commits
• [llvm] [AArch64] Optimize vector multiplications by certain constants for v2i64 (PR #183827)   Aly ElAshram via llvm-commits
• [llvm] [AArch64] Optimize vector multiplications by certain constants for v2i64 (PR #183827)   Aly ElAshram via llvm-commits
• [llvm] [AArch64] Optimize vector multiplications by certain constants for v2i64 (PR #183827)   Aly ElAshram via llvm-commits
• [llvm] [AArch64] Model late forwarding in Neoverse N1 (PR #177590)   Amina Chabane via llvm-commits
• [llvm] [AArch64] Fold zero-high vector inserts in MI peephole optimisation (PR #182835)   Amina Chabane via llvm-commits
• [llvm] [AArch64] Fold zero-high vector inserts in MI peephole optimisation (PR #182835)   Amina Chabane via llvm-commits
• [llvm] [AArch64] Fold zero-high vector inserts in MI peephole optimisation (PR #182835)   Amina Chabane via llvm-commits
• [llvm] [AArch64] Model late forwarding in Neoverse N1 (PR #177590)   Amina Chabane via llvm-commits
• [llvm] [AArch64] Model late forwarding in Neoverse N1 (PR #177590)   Amina Chabane via llvm-commits
• [llvm] [AArch64] Model late forwarding in Neoverse N1 (PR #177590)   Amina Chabane via llvm-commits
• [llvm] [AArch64] Model late forwarding in Neoverse N1 (PR #177590)   Amina Chabane via llvm-commits
• [llvm] [AArch64] Model late forwarding in Neoverse N1 (PR #177590)   Amina Chabane via llvm-commits
• [llvm] [AArch64] Model late forwarding in Neoverse N1 (PR #177590)   Amina Chabane via llvm-commits
• [llvm] [AArch64] Model late forwarding in Neoverse N1 (PR #177590)   Amina Chabane via llvm-commits
• [llvm] [AArch64] Model late forwarding in Neoverse N1 (PR #177590)   Amina Chabane via llvm-commits
• [llvm] [AArch64] Model late forwarding in Neoverse N1 (PR #177590)   Amina Chabane via llvm-commits
• [clang] [llvm] [Clang][OpenMP] Support expression semantics in target update fields with non-contiguous array sections (PR #176708)   Amit Tiwari via llvm-commits
• [clang] [llvm] [Clang][OpenMP] Support expression semantics in target update fields with non-contiguous array sections (PR #176708)   Amit Tiwari via llvm-commits
• [clang] [llvm] [Clang][OpenMP] Handled `NonContig` Descriptor `DimCount` (PR #181987)   Amit Tiwari via llvm-commits
• [clang] [llvm] [Clang][OpenMP] Handled `NonContig` Descriptor `DimCount` (PR #181987)   Amit Tiwari via llvm-commits
• [clang] [llvm] [Clang][OpenMP] Support expression semantics in target update fields with non-contiguous array sections (PR #176708)   Amit Tiwari via llvm-commits
• [clang] [llvm] [Clang][OpenMP] Support expression semantics in target update fields with non-contiguous array sections (PR #176708)   Amit Tiwari via llvm-commits
• [clang] [llvm] [Clang][OpenMP] Handled `NonContig` Descriptor `DimCount` (PR #181987)   Amit Tiwari via llvm-commits
• [clang] [llvm] [Clang][OpenMP] Implement Loop splitting `#pragma omp split` directive (PR #183261)   Amit Tiwari via llvm-commits
• [llvm] [PowerPC] Remove `UnsafeFPMath` uses (PR #154901)   Amy Kwan via llvm-commits
• [compiler-rt] Disable leak sanitizer test on ppc. (PR #184414)   Amy Kwan via llvm-commits
• [llvm] [AArch64][PAC] Don't skip global legalization for AUTH_TCRETURN (PR #182513)   Anatoly Trosinenko via llvm-commits
• [llvm] [AArch64][PAC] Don't skip global legalization for AUTH_TCRETURN (PR #182513)   Anatoly Trosinenko via llvm-commits
• [llvm] [AArch64][PAC] Don't skip global legalization for AUTH_TCRETURN (PR #182513)   Anatoly Trosinenko via llvm-commits
• [llvm] [AArch64][PAC] Don't skip global legalization for AUTH_TCRETURN (PR #182513)   Anatoly Trosinenko via llvm-commits
• [llvm] [AArch64][PAC] Don't skip global legalization for AUTH_TCRETURN (PR #182513)   Anatoly Trosinenko via llvm-commits
• [llvm] [InstCombine] Generalizing icmp ne X, 0 to trunc X to i1 IIF X in range (0,2] (PR #184182)   Andreas Jonson via llvm-commits
• [llvm] [InstCombine] Fold extended add/sub of the same type (PR #185259)   Andreas Jonson via llvm-commits
• [llvm] [InstCombine] Fold extended add/sub of the same type (PR #185259)   Andreas Jonson via llvm-commits
• [llvm] [InstCombine] Fold extended add/sub of the same type (PR #185259)   Andreas Jonson via llvm-commits
• [llvm] [InstCombine] Fold extended add/sub of the same type (PR #185259)   Andreas Jonson via llvm-commits
• [llvm] [InstCombine] Fold extended add/sub of the same type (PR #185259)   Andreas Jonson via llvm-commits
• [llvm] [DominanceFrontier] Support multiple root nodes for post-dom (PR #181257)   Andrei Elovikov via llvm-commits
• [llvm] [DominanceFrontier] Support multiple root nodes for post-dom (PR #181257)   Andrei Elovikov via llvm-commits
• [llvm] [VPlan] Introduce VPlan::get(Zero|AllOnes) (NFC) (PR #184085)   Andrei Elovikov via llvm-commits
• [llvm] [DominanceFrontier] Support multiple root nodes for post-dom (PR #181257)   Andrei Elovikov via llvm-commits
• [llvm] [DominanceFrontier] Support multiple root nodes for post-dom (PR #181257)   Andrei Elovikov via llvm-commits
• [llvm] [LV] Run VPlan licm late in executePlan (PR #181122)   Andrei Elovikov via llvm-commits
• [llvm] [LV] Run VPlan licm late in executePlan (PR #181122)   Andrei Elovikov via llvm-commits
• [llvm] [LV] Run VPlan licm late in executePlan (PR #181122)   Andrei Elovikov via llvm-commits
• [llvm] [NFCI][VPlan] Split initial mem-widening into a separate transformation (PR #182592)   Andrei Elovikov via llvm-commits
• [llvm] [LV] Transform tests for early-exit with stores (PR #183288)   Andrei Elovikov via llvm-commits
• [llvm] [VPlan] Use VPlan::getZero to improve code (NFC) (PR #184591)   Andrei Elovikov via llvm-commits
• [llvm] [LAA][LV]Allow recognition of strided pointers with constant stride (PR #171151)   Andrei Elovikov via llvm-commits
• [llvm] [NFCI][VPlan] Split initial mem-widening into a separate transformation (PR #182592)   Andrei Elovikov via llvm-commits
• [llvm] Fix misspelling (PR #184335)   Andrei Khropov via llvm-commits
• [llvm] [Hexagon] Fix 64-bit funnel shift miscompilation with register shift amounts (PR #183669)   Ankit Aggarwal via llvm-commits
• [llvm] [AMDGPU] Detect VALU-after-MFMA hazard in post-RA scheduler's getHazardType (PR #184084)   Anshil Gandhi via llvm-commits
• [llvm] [AMDGPU] Detect VALU-after-MFMA hazard in post-RA scheduler's getHazardType (PR #184084)   Anshil Gandhi via llvm-commits
• [llvm] [AMDGPU] Detect VALU-after-MFMA hazard in post-RA scheduler's getHazardType (PR #184084)   Anshil Gandhi via llvm-commits
• [llvm] [AMDGPU] Detect VALU-after-MFMA hazard in post-RA scheduler's getHazardType (PR #184084)   Anshil Gandhi via llvm-commits
• [llvm] [AMDGPU] Detect VALU-after-MFMA hazard in post-RA scheduler's getHazardType (PR #184084)   Anshil Gandhi via llvm-commits
• [llvm] [AMDGPU] Detect VALU-after-MFMA hazard in post-RA scheduler's getHazardType (PR #184084)   Anshil Gandhi via llvm-commits
• [llvm] [AMDGPU] Detect VALU-after-MFMA hazard in post-RA scheduler's getHazardType (PR #184084)   Anshil Gandhi via llvm-commits
• [llvm] Update Bazel build files for a9fb8b0 (PR #184823)   Anshul Nigham via llvm-commits
• [llvm] [NewPM] Port for AArch64A53Fix835769 (PR #184965)   Anshul Nigham via llvm-commits
• [llvm] [NewPM] Port for AArch64A53Fix835769 (PR #184965)   Anshul Nigham via llvm-commits
• [llvm] [NewPM] Port for AArch64A53Fix835769 (PR #184965)   Anshul Nigham via llvm-commits
• [llvm] [NewPM] Port for AArch64A53Fix835769 (PR #184965)   Anshul Nigham via llvm-commits
• [llvm] [NewPM] Port for AArch64A53Fix835769 (PR #184965)   Anshul Nigham via llvm-commits
• [llvm] Fix bazel build for 00e247ad76fdd0cd5841193950c8d4927e3015f8 (PR #185055)   Anshul Nigham via llvm-commits
• [llvm] [NewPM] Add port for aarch64-simd-scalar (PR #185256)   Anshul Nigham via llvm-commits
• [llvm] [NewPM] Add port for aarch64-simd-scalar (PR #185256)   Anshul Nigham via llvm-commits
• [llvm] [NewPM] Add port for aarch64-simd-scalar (PR #185256)   Anshul Nigham via llvm-commits
• [llvm] [NewPM] Add port for aarch64-simd-scalar (PR #185256)   Anshul Nigham via llvm-commits
• [llvm] [DSE] Introduce `eliminateRedundantStoresViaDominatingConditions` (PR #181709)   Antonio Frighetto via llvm-commits
• [llvm] [DSE] Introduce `eliminateRedundantStoresViaDominatingConditions` (PR #181709)   Antonio Frighetto via llvm-commits
• [llvm] [DSE] Introduce `eliminateRedundantStoresViaDominatingConditions` (PR #181709)   Antonio Frighetto via llvm-commits
• [llvm] [DSE] Introduce `eliminateRedundantStoresViaDominatingConditions` (PR #181709)   Antonio Frighetto via llvm-commits
• [llvm] [DSE] Introduce `eliminateRedundantStoresViaDominatingConditions` (PR #181709)   Antonio Frighetto via llvm-commits
• [llvm] [ValueLattice][SCCP] Consider provenance for predicate-derived pointer constants (PR #160083)   Antonio Frighetto via llvm-commits
• [llvm] [ValueLattice][SCCP] Consider provenance for predicate-derived pointer constants (PR #160083)   Antonio Frighetto via llvm-commits
• [llvm] [IR] LangRef: document behavior of double-lifetime.start (PR #184296)   Antonio Frighetto via llvm-commits
• [llvm] [DSE] Handle provenance when eliminating tautological assignments (PR #184311)   Antonio Frighetto via llvm-commits
• [llvm] [Loads] Allow replacement of null with ptr in `canReplacePointersIfEqual` (PR #184348)   Antonio Frighetto via llvm-commits
• [llvm] [DSE] Handle provenance when eliminating tautological assignments (PR #184311)   Antonio Frighetto via llvm-commits
• [llvm] [Loads] Allow replacement of null with ptr in `canReplacePointersIfEqual` (PR #184348)   Antonio Frighetto via llvm-commits
• [llvm] [Loads] Allow replacement of null with ptr in `canReplacePointersIfEqual` (PR #184348)   Antonio Frighetto via llvm-commits
• [llvm] [Loads] Allow replacement of null with ptr in `canReplacePointersIfEqual` (PR #184348)   Antonio Frighetto via llvm-commits
• [llvm] [DSE] Handle provenance when eliminating tautological assignments (PR #184311)   Antonio Frighetto via llvm-commits
• [llvm] [DSE] Handle provenance when eliminating tautological assignments (PR #184311)   Antonio Frighetto via llvm-commits
• [llvm] e7db3f1 - [DSE] Handle provenance when eliminating tautological assignments   Antonio Frighetto via llvm-commits
• [llvm] [DSE] Handle provenance when eliminating tautological assignments (PR #184311)   Antonio Frighetto via llvm-commits
• [llvm] [DSE] Introduce `eliminateRedundantStoresViaDominatingConditions` (PR #181709)   Antonio Frighetto via llvm-commits
• [llvm] [DSE] Introduce `eliminateRedundantStoresViaDominatingConditions` (PR #181709)   Antonio Frighetto via llvm-commits
• [llvm] [SimplifyCFG] Simplify identical predecessors (PR #173022)   Antonio Frighetto via llvm-commits
• [llvm] [SimplifyCFG] Simplify identical predecessors (PR #173022)   Antonio Frighetto via llvm-commits
• [llvm] [SimplifyCFG] Simplify identical predecessors (PR #173022)   Antonio Frighetto via llvm-commits
• [llvm] [SimplifyCFG] Simplify identical predecessors (PR #173022)   Antonio Frighetto via llvm-commits
• [llvm] [SimplifyCFG] Simplify identical predecessors (PR #173022)   Antonio Frighetto via llvm-commits
• [llvm] [SimplifyCFG] Simplify identical predecessors (PR #173022)   Antonio Frighetto via llvm-commits
• [llvm] [SimplifyCFG] Simplify identical predecessors (PR #173022)   Antonio Frighetto via llvm-commits
• [llvm] [SimplifyCFG] Simplify identical predecessors (PR #173022)   Antonio Frighetto via llvm-commits
• [llvm] [IR] Add initial support for the byte type (PR #178666)   Antonio Frighetto via llvm-commits
• [llvm] [IR] Add initial support for the byte type (PR #178666)   Antonio Frighetto via llvm-commits
• [llvm] [IR] Add initial support for the byte type (PR #178666)   Antonio Frighetto via llvm-commits
• [llvm] [IR] Add initial support for the byte type (PR #178666)   Antonio Frighetto via llvm-commits
• [llvm] [llubi] Add support for load/store/lifetime markers (PR #182532)   Antonio Frighetto via llvm-commits
• [llvm] [InstCombine] Simplify conditional round-up to power-of-2 alignment (PR #184989)   Antonio Frighetto via llvm-commits
• [llvm] [InstCombine] Simplify conditional round-up to power-of-2 alignment (PR #184989)   Antonio Frighetto via llvm-commits
• [llvm] [DSE] Introduce `eliminateRedundantStoresViaDominatingConditions` (PR #181709)   Antonio Frighetto via llvm-commits
• [llvm] [DSE] Introduce `eliminateRedundantStoresViaDominatingConditions` (PR #181709)   Antonio Frighetto via llvm-commits
• [llvm] [InferAttrs] malloc-family libcalls may write `errnomem` location (PR #164382)   Antonio Frighetto via llvm-commits
• [llvm] [InferAttrs] malloc-family libcalls may write `errnomem` location (PR #164382)   Antonio Frighetto via llvm-commits
• [llvm] [InferAttrs] malloc-family libcalls may write `errnomem` location (PR #164382)   Antonio Frighetto via llvm-commits
• [llvm] aa89092 - [InferAttrs] malloc-family libcalls may write `errnomem` location   Antonio Frighetto via llvm-commits
• [llvm] [InferAttrs] malloc-family libcalls may write `errnomem` location (PR #164382)   Antonio Frighetto via llvm-commits
• [llvm] [DAG] isKnownToBeAPowerOfTwo - add ISD::VECTOR_SHUFFLE handling (PR #185203)   Arjun Parmar via llvm-commits
• [llvm] [DAG] isKnownToBeAPowerOfTwo - add ISD::VECTOR_SHUFFLE handling (PR #185203)   Arjun Parmar via llvm-commits
• [llvm] [DAG] isKnownToBeAPowerOfTwo - add ISD::VECTOR_SHUFFLE handling (PR #185203)   Arjun Parmar via llvm-commits
• [llvm] [DAG] isKnownToBeAPowerOfTwo - add ISD::VECTOR_SHUFFLE handling (PR #185203)   Arjun Parmar via llvm-commits
• [llvm] [DAG] isKnownToBeAPowerOfTwo - add ISD::VECTOR_SHUFFLE handling (PR #185203)   Arjun Parmar via llvm-commits
• [llvm] [DAG] isKnownToBeAPowerOfTwo - add ISD::VECTOR_SHUFFLE handling (PR #185203)   Arjun Parmar via llvm-commits
• [llvm] [AMDGPU][GlobalISel] Fix VCC s1 phi instruction selection failure (PR #184632)   Arseniy Obolenskiy via llvm-commits
• [llvm] [AMDGPU][GlobalISel] Fix VCC s1 phi instruction selection failure (PR #184632)   Arseniy Obolenskiy via llvm-commits
• [llvm] [AMDGPU][GlobalISel] Fix VCC s1 phi instruction selection failure (PR #184632)   Arseniy Obolenskiy via llvm-commits
• [llvm] [AMDGPU] Poison invalid globals after emitting error in LowerBufferFatPointers pass (PR #184662)   Arseniy Obolenskiy via llvm-commits
• [llvm] [AMDGPU] Poison invalid globals after emitting error in LowerBufferFatPointers pass (PR #184662)   Arseniy Obolenskiy via llvm-commits
• [llvm] [AMDGPU] Poison invalid globals after emitting error in LowerBufferFatPointers pass (PR #184662)   Arseniy Obolenskiy via llvm-commits
• [llvm] [AMDGPU] Poison invalid globals after emitting error in LowerBufferFatPointers pass (PR #184662)   Arseniy Obolenskiy via llvm-commits
• [llvm] [AMDGPU] Widen sub-dword constant loads with dword alignment to match SelectionDAG behavior (PR #184790)   Arseniy Obolenskiy via llvm-commits
• [llvm] [SPIR-V] Scalarize vector of pointers for ptrtoint/inttoptr (PR #184817)   Arseniy Obolenskiy via llvm-commits
• [llvm] [SPIR-V] Scalarize vector of pointers for ptrtoint/inttoptr (PR #184817)   Arseniy Obolenskiy via llvm-commits
• [llvm] [SPIR-V] Scalarize vector of pointers for ptrtoint/inttoptr (PR #184817)   Arseniy Obolenskiy via llvm-commits
• [llvm] [VPlan] Use bitfield to store Cmp predicates and GEP wrap flags. (NFC) (PR #181571)   Arthur Eubanks via llvm-commits
• [llvm] [SimplifyLibCalls] Combine sin/cos libcall pairs into llvm.sincos (PR #184760)   Arthur Eubanks via llvm-commits
• [llvm] [LLVM] Add flatten function attribute to LLVM IR and implement recursive inlining in AlwaysInliner (PR #174899)   Arthur Eubanks via llvm-commits
• [llvm] [LLVM] Add flatten function attribute to LLVM IR and implement recursive inlining in AlwaysInliner (PR #174899)   Arthur Eubanks via llvm-commits
• [llvm] [LLVM] Add flatten function attribute to LLVM IR and implement recursive inlining in AlwaysInliner (PR #174899)   Arthur Eubanks via llvm-commits
• [llvm] [gn build] Guard the BLAKE3 assembly sources with platform (PR #70110)   Arthur Eubanks via llvm-commits
• [llvm] Revert "[gn build] Guard the BLAKE3 assembly sources with platform" (PR #185077)   Arthur Eubanks via llvm-commits
• [llvm] Revert "[gn build] Guard the BLAKE3 assembly sources with platform" (PR #185077)   Arthur Eubanks via llvm-commits
• [llvm] Revert "[gn build] Guard the BLAKE3 assembly sources with platform" (PR #185077)   Arthur Eubanks via llvm-commits
• [llvm] Revert "[gn build] Guard the BLAKE3 assembly sources with platform" (PR #185077)   Arthur Eubanks via llvm-commits
• [lld] [ELF] Add target-specific relocation scanning for x86 (PR #178846)   Arthur Eubanks via llvm-commits
• [lld] [ELF] Add target-specific relocation scanning for x86 (PR #178846)   Arthur Eubanks via llvm-commits
• [lld] [ELF] Add target-specific relocation scanning for x86 (PR #178846)   Arthur Eubanks via llvm-commits
• [llvm] [AArch64] Model late forwarding in Neoverse N1 (PR #177590)   Asher Dobrescu via llvm-commits
• [llvm] [AArch64] Model late forwarding in Neoverse N1 (PR #177590)   Asher Dobrescu via llvm-commits
• [llvm] [AArch64] Model late forwarding in Neoverse N1 (PR #177590)   Asher Dobrescu via llvm-commits
• [llvm] [BOLT] Check if symbol is in data area of function (PR #160143)   Asher Dobrescu via llvm-commits
• [llvm] [AArch64] C1-Ultra Scheduling model (PR #182251)   Asher Dobrescu via llvm-commits
• [llvm] [AArch64] C1-Ultra Scheduling model (PR #182251)   Asher Dobrescu via llvm-commits
• [llvm] [AArch64] C1-Ultra Scheduling model (PR #182251)   Asher Dobrescu via llvm-commits
• [llvm] [AArch64] C1-Ultra Scheduling model (PR #182251)   Asher Dobrescu via llvm-commits
• [llvm] [AArch64] C1-Ultra Scheduling model (PR #182251)   Asher Dobrescu via llvm-commits
• [llvm] [AArch64] C1-Ultra Scheduling model (PR #182251)   Asher Dobrescu via llvm-commits
• [llvm] [AArch64] C1-Ultra Scheduling model (PR #182251)   Asher Dobrescu via llvm-commits
• [llvm] [AArch64] C1-Ultra Scheduling model (PR #182251)   Asher Dobrescu via llvm-commits
• [llvm] [AArch64] C1-Ultra Scheduling model (PR #182251)   Asher Dobrescu via llvm-commits
• [llvm] [AArch64] C1-Ultra Scheduling model (PR #182251)   Asher Dobrescu via llvm-commits
• [llvm] [AArch64] C1-Ultra Scheduling model (PR #182251)   Asher Dobrescu via llvm-commits
• [llvm] [AArch64] C1-Ultra Scheduling model (PR #182251)   Asher Dobrescu via llvm-commits
• [llvm] [AArch64] C1-Ultra Scheduling model (PR #182251)   Asher Dobrescu via llvm-commits
• [llvm] [AArch64] C1-Ultra Scheduling model (PR #182251)   Asher Dobrescu via llvm-commits
• [llvm] [AArch64] C1-Ultra Scheduling model (PR #182251)   Asher Dobrescu via llvm-commits
• [llvm] [AArch64] Model late forwarding in Neoverse N1 (PR #177590)   Asher Dobrescu via llvm-commits
• [llvm] [AArch64] Model late forwarding in Neoverse N1 (PR #177590)   Asher Dobrescu via llvm-commits
• [llvm] [AArch64] Model late forwarding in Neoverse N1 (PR #177590)   Asher Dobrescu via llvm-commits
• [llvm] [BOLT] Check if symbol is in data area of function (PR #160143)   Asher Dobrescu via llvm-commits
• [llvm] [AMDGPU] Add ML-oriented coexec scheduler selection and queue handling (PR #169616)   Austin Kerbow via llvm-commits
• [llvm] [AMDGPU] Add ML-oriented coexec scheduler selection and queue handling (PR #169616)   Austin Kerbow via llvm-commits
• [llvm] [AMDGPU] Add ML-oriented coexec scheduler selection and queue handling (PR #169616)   Austin Kerbow via llvm-commits
• [llvm] [AMDGPU] Add ML-oriented coexec scheduler selection and queue handling (PR #169616)   Austin Kerbow via llvm-commits
• [llvm] add: hidden option to disable slow wasm pass (PR #67715)   Austin Theriault via llvm-commits
• [lld] [LLD][AArch64] Handle R_AARCH64_TLS_DTPREL64 in non-alloc sections (PR #183962)   Avi Kivity via llvm-commits
• [lld] [LLD][AArch64] Handle R_AARCH64_TLS_DTPREL64 in non-alloc sections (PR #183962)   Avi Kivity via llvm-commits
• [llvm] [LoopVectorize] Add regression test for issue #182646 (PR #184356)   Aviral Garg via llvm-commits
• [llvm] [DAG] isKnownNeverZero - add ISD::UDIV/SDIV DemandedElts handling and tests (PR #183227)   Ayokunle Amodu via llvm-commits
• [llvm] [DAG] isKnownNeverZero - add ISD::UDIV/SDIV DemandedElts handling and tests (PR #183227)   Ayokunle Amodu via llvm-commits
• [llvm] [DAG] isKnownNeverZero - add ISD::UDIV/SDIV DemandedElts handling and tests (PR #183227)   Ayokunle Amodu via llvm-commits
• [llvm] [DAG] isKnownNeverZero - add ISD::UDIV/SDIV DemandedElts handling and tests (PR #183227)   Ayokunle Amodu via llvm-commits
• [llvm] [DAG] isKnownNeverZero: Add DemandedElts handling for ROTL/ROTR/BITREVERSE/BSWAP/CTPOP/ABS (PR #184033)   Ayush Kumar Gaur via llvm-commits
• [llvm] [DAG] isKnownNeverZero: Add DemandedElts handling for ROTL/ROTR/BITREVERSE/BSWAP/CTPOP/ABS (PR #184033)   Ayush Kumar Gaur via llvm-commits
• [llvm] [DAG] isKnownNeverZero: Add DemandedElts handling for ROTL/ROTR/BITREVERSE/BSWAP/CTPOP/ABS (PR #184033)   Ayush Kumar Gaur via llvm-commits
• [llvm] [DAG] isKnownNeverZero: Add DemandedElts handling for ROTL/ROTR/BITREVERSE/BSWAP/CTPOP/ABS (PR #184033)   Ayush Kumar Gaur via llvm-commits
• [llvm] [DAG] isKnownNeverZero: Add DemandedElts handling for ROTL/ROTR/BITREVERSE/BSWAP/CTPOP/ABS (PR #184033)   Ayush Kumar Gaur via llvm-commits
• [llvm] [DAG] isKnownNeverZero: Add DemandedElts handling for ROTL/ROTR/BITREVERSE/BSWAP/CTPOP/ABS (PR #184033)   Ayush Kumar Gaur via llvm-commits
• [llvm] [DAG] isKnownNeverZero: Add DemandedElts handling for ROTL/ROTR/BITREVERSE/BSWAP/CTPOP/ABS (PR #184033)   Ayush Kumar Gaur via llvm-commits
• [llvm] [DAG] isKnownNeverZero: Add DemandedElts handling for ROTL/ROTR/BITREVERSE/BSWAP/CTPOP/ABS (PR #184033)   Ayush Kumar Gaur via llvm-commits
• [llvm] [NVPTX] Support lowering of `(l)lround` (PR #183901)   Balaji Krishna Yugandhar Atukuri via llvm-commits
• [llvm] [NVPTX][NFC] Fix TODO comment style in NVPTXMCAsmInfo.cpp (PR #185332)   Balaji Krishna Yugandhar Atukuri via llvm-commits
• [llvm] [NVPTX][NFC] Fix TODO comment style in NVPTXMCAsmInfo.cpp (PR #185332)   Balaji Krishna Yugandhar Atukuri via llvm-commits
• [llvm] [ci][github][analyzer] Enable Z3 for Clang Static Analyzer on Linux (PR #184695)   Balázs Benics via llvm-commits
• [llvm] [ci][github][analyzer] Enable Z3 for Clang Static Analyzer on Linux (PR #184695)   Balázs Benics via llvm-commits
• [llvm] [mlir][bazel] Fix build after #184116 (PR #185019)   Benjamin Kramer via llvm-commits
• [llvm] [AArch64] Vectorise llvm.pow using vector intrinsic for ArmPL library (PR #183319)   Benjamin Maxwell via llvm-commits
• [llvm] [LV] Support interleaving with conditional scalar assignments (PR #184099)   Benjamin Maxwell via llvm-commits
• [llvm] [LV] Support float and pointer conditional scalar assignments (PR #184101)   Benjamin Maxwell via llvm-commits
• [llvm] [LV] Support float and pointer conditional scalar assignments (PR #184101)   Benjamin Maxwell via llvm-commits
• [llvm] [LV] Support interleaving with conditional scalar assignments (PR #184099)   Benjamin Maxwell via llvm-commits
• [llvm] [LV] Fix issue in VPFirstOrderRecurrencePHIRecipe::usesFirstLaneOnly (PR #179977)   Benjamin Maxwell via llvm-commits
• [llvm] [LV] Support interleaving with conditional scalar assignments (PR #184099)   Benjamin Maxwell via llvm-commits
• [llvm] [LV] Support interleaving with conditional scalar assignments (PR #184099)   Benjamin Maxwell via llvm-commits
• [llvm] [AArch64] Add vector expansion support for ISD::FCBRT when using ArmPL (PR #183750)   Benjamin Maxwell via llvm-commits
• [llvm] [AArch64] Ensure FPR128 callee-save stack offsets are aligned (PR #184314)   Benjamin Maxwell via llvm-commits
• [llvm] [LV] Add support for partial alias masking with tail folding (PR #182457)   Benjamin Maxwell via llvm-commits
• [llvm] [LV] Add `-force-target-supports-masked-memory-ops` option (PR #184325)   Benjamin Maxwell via llvm-commits
• [llvm] [LV] Add support for partial alias masking with tail folding (PR #182457)   Benjamin Maxwell via llvm-commits
• [llvm] [LV] Support float and pointer conditional scalar assignments (PR #184101)   Benjamin Maxwell via llvm-commits
• [llvm] [LV] Add `-force-target-supports-masked-memory-ops` option (PR #184325)   Benjamin Maxwell via llvm-commits
• [llvm] [LV] Add `-force-target-supports-masked-memory-ops` option (PR #184325)   Benjamin Maxwell via llvm-commits
• [llvm] [LV] Add `-force-target-supports-masked-memory-ops` option (PR #184325)   Benjamin Maxwell via llvm-commits
• [llvm] [IVDescriptors] Reject FindLast candidates with loop invariant conditions (PR #184340)   Benjamin Maxwell via llvm-commits
• [llvm] [IVDescriptors] Reject FindLast candidates with loop invariant conditions (PR #184340)   Benjamin Maxwell via llvm-commits
• [llvm] [AArch64] Prefer `SADDLV` over `ADDV` for vector mask reductions (PR #183522)   Benjamin Maxwell via llvm-commits
• [llvm] [AArch64] Prefer `SADDLV` over `ADDV` for vector mask reductions (PR #183522)   Benjamin Maxwell via llvm-commits
• [llvm] [LV] Add `-force-target-supports-masked-memory-ops` option (PR #184325)   Benjamin Maxwell via llvm-commits
• [llvm] [LV] Use make_early_inc_range in handleFindLastReductions (PR #184340)   Benjamin Maxwell via llvm-commits
• [llvm] [LV] Use make_early_inc_range in handleFindLastReductions (PR #184340)   Benjamin Maxwell via llvm-commits
• [llvm] [LV] Add `-force-target-supports-masked-memory-ops` option (PR #184325)   Benjamin Maxwell via llvm-commits
• [llvm] [LV] Add `-force-target-supports-masked-memory-ops` option (PR #184325)   Benjamin Maxwell via llvm-commits
• [llvm] [LV] Use make_early_inc_range in handleFindLastReductions (PR #184340)   Benjamin Maxwell via llvm-commits
• [llvm] [AArch64] Prefer `SADDLV` over `ADDV` for vector mask reductions (PR #183522)   Benjamin Maxwell via llvm-commits
• [llvm] [AArch64] Prefer `SADDLV` over `ADDV` for vector mask reductions (PR #183522)   Benjamin Maxwell via llvm-commits
• [llvm] [AArch64] Avoid folding sign-extend of vector extracts into ALU ops (PR #183522)   Benjamin Maxwell via llvm-commits
• [llvm] [AArch64] Avoid folding sign-extend of vector extracts into ALU ops (PR #183522)   Benjamin Maxwell via llvm-commits
• [llvm] [AArch64] Refine reduction VT selection in CTPOP -> VECREDUCE combine (PR #183025)   Benjamin Maxwell via llvm-commits
• [llvm] [AArch64] Refine reduction VT selection in CTPOP -> VECREDUCE combine (PR #183025)   Benjamin Maxwell via llvm-commits
• [llvm] [LV] Add `-force-target-supports-masked-memory-ops` option (PR #184325)   Benjamin Maxwell via llvm-commits
• [llvm] [LV] Add `-force-target-supports-masked-memory-ops` option (PR #184325)   Benjamin Maxwell via llvm-commits
• [llvm] Reapply "[AArch64] Wrap integer SCALAR_TO_VECTOR nodes in bitcasts (#172837)" (#183380) (PR #184403)   Benjamin Maxwell via llvm-commits
• [llvm] [LV] Support interleaving with conditional scalar assignments (PR #184099)   Benjamin Maxwell via llvm-commits
• [llvm] [LV] Support float and pointer conditional scalar assignments (PR #184101)   Benjamin Maxwell via llvm-commits
• [llvm] [LV] Support float and pointer conditional scalar assignments (PR #184101)   Benjamin Maxwell via llvm-commits
• [llvm] [LV] Support float and pointer conditional scalar assignments (PR #184101)   Benjamin Maxwell via llvm-commits
• [llvm] [LV] Support float and pointer conditional scalar assignments (PR #184101)   Benjamin Maxwell via llvm-commits
• [llvm] [LV] Add support for partial alias masking with tail folding (PR #182457)   Benjamin Maxwell via llvm-commits
• [llvm] [LV] Support interleaving with conditional scalar assignments (PR #184099)   Benjamin Maxwell via llvm-commits
• [llvm] [LV] Support interleaving with conditional scalar assignments (PR #184099)   Benjamin Maxwell via llvm-commits
• [llvm] [LV] Support interleaving with conditional scalar assignments (PR #184099)   Benjamin Maxwell via llvm-commits
• [llvm] [AArch64] Refine reduction VT selection in CTPOP -> VECREDUCE combine (PR #183025)   Benjamin Maxwell via llvm-commits
• [llvm] [AArch64] Refine reduction VT selection in CTPOP -> VECREDUCE combine (PR #183025)   Benjamin Maxwell via llvm-commits
• [llvm] [LV] Support interleaving with FindLast reductions (PR #184099)   Benjamin Maxwell via llvm-commits
• [llvm] [LV] Support float and pointer FindLast reductions (PR #184101)   Benjamin Maxwell via llvm-commits
• [llvm] [LV] Add support for partial alias masking with tail folding (PR #182457)   Benjamin Maxwell via llvm-commits
• [llvm] [LV] Add support for partial alias masking with tail folding (PR #182457)   Benjamin Maxwell via llvm-commits
• [llvm] [AArch64] Add fixed-length bfloat cost model tests (NFC) (PR #184805)   Benjamin Maxwell via llvm-commits
• [llvm] [AArch64] Add fixed-length bfloat cost model tests (NFC) (PR #184805)   Benjamin Maxwell via llvm-commits
• [llvm] [LV] Simplify the chain traversal in `getScaledReductions()` (NFCI) (PR #184830)   Benjamin Maxwell via llvm-commits
• [llvm] [LV] Simplify the chain traversal in `getScaledReductions()` (NFCI) (PR #184830)   Benjamin Maxwell via llvm-commits
• [llvm] [LV] Simplify the chain traversal in `getScaledReductions()` (NFCI) (PR #184830)   Benjamin Maxwell via llvm-commits
• [llvm] [LV] Simplify the chain traversal in `getScaledReductions()` (NFCI) (PR #184830)   Benjamin Maxwell via llvm-commits
• [llvm] [LV] Simplify the chain traversal in `getScaledReductions()` (NFCI) (PR #184830)   Benjamin Maxwell via llvm-commits
• [llvm] [LV] Simplify the chain traversal in `getScaledReductions()` (NFCI) (PR #184830)   Benjamin Maxwell via llvm-commits
• [llvm] [LV] Simplify the chain traversal in `getScaledReductions()` (NFCI) (PR #184830)   Benjamin Maxwell via llvm-commits
• [llvm] [LV] Simplify the chain traversal in `getScaledReductions()` (NFCI) (PR #184830)   Benjamin Maxwell via llvm-commits
• [llvm] [LV] Simplify the chain traversal in `getScaledReductions()` (NFCI) (PR #184830)   Benjamin Maxwell via llvm-commits
• [llvm] [LV] Simplify the chain traversal in `getScaledReductions()` (NFCI) (PR #184830)   Benjamin Maxwell via llvm-commits
• [llvm] [LV] Simplify the chain traversal in `getScaledReductions()` (NFCI) (PR #184830)   Benjamin Maxwell via llvm-commits
• [llvm] [LV] Simplify the chain traversal in `getScaledReductions()` (NFCI) (PR #184830)   Benjamin Maxwell via llvm-commits
• [llvm] [LV] Support interleaving with FindLast reductions (PR #184099)   Benjamin Maxwell via llvm-commits
• [llvm] [LV] Support interleaving with FindLast reductions (PR #184099)   Benjamin Maxwell via llvm-commits
• [llvm] [LV] Support interleaving with FindLast reductions (PR #184099)   Benjamin Maxwell via llvm-commits
• [llvm] [AArch64] Ensure FPR128 callee-save stack offsets are aligned (PR #184314)   Benjamin Maxwell via llvm-commits
• [llvm] [AArch64] Ensure FPR128 callee-save stack offsets are aligned (PR #184314)   Benjamin Maxwell via llvm-commits
• [llvm] [AArch64] Ensure FPR128 callee-save stack offsets are aligned (PR #184314)   Benjamin Maxwell via llvm-commits
• [llvm] [AArch64] Ensure FPR128 callee-save stack offsets are aligned (PR #184314)   Benjamin Maxwell via llvm-commits
• [llvm] [NFC][SPARC] Add proper flags for instruction definitions (PR #182840)   Brad Smith via llvm-commits
• [llvm] [SPARC] Add TTI implementation for getting register numbers and widths (PR #180660)   Brad Smith via llvm-commits
• [clang] [llvm] [RISCV][llvm] Use [u]int32 vector for input arguments for zvdot4a8i (PR #184089)   Brandon Wu via llvm-commits
• [llvm] [llvm][RISCV] Use zilsd for callee-saved register spill/restore on RV32 (PR #184794)   Brandon Wu via llvm-commits
• [llvm] [RISCV] Don't make ISD::ABDS/ABDU legal for v2i32 with P extension. (PR #184753)   Brandon Wu via llvm-commits
• [llvm] [llvm][RISCV] Use zilsd for callee-saved register spill/restore on RV32 (PR #184794)   Brandon Wu via llvm-commits
• [llvm] [llvm][RISCV] Use zilsd for callee-saved register spill/restore on RV32 (PR #184794)   Brandon Wu via llvm-commits
• [llvm] [RISCV] Remove unneeded ImmLeaf from simm8_unsigned. NFC (PR #184960)   Brandon Wu via llvm-commits
• [llvm] [RISCV][P-ext] Recognize vector shifts with splat build_vector shift amount. (PR #184909)   Brandon Wu via llvm-commits
• [llvm] [RISCV][P-ext] Only support sshlsat for splat immediate shift amounts. (PR #184886)   Brandon Wu via llvm-commits
• [llvm] [RISCV][P-ext] Support vector ISD::ABS using PABD instructions. (PR #184822)   Brandon Wu via llvm-commits
• [llvm] [llvm][RISCV] Use zilsd for callee-saved register spill/restore on RV32 (PR #184794)   Brandon Wu via llvm-commits
• [llvm] [llvm][RISCV] Use zilsd for callee-saved register spill/restore on RV32 (PR #184794)   Brandon Wu via llvm-commits
• [llvm] [llvm][RISCV] Use zilsd for callee-saved register spill/restore on RV32 (PR #184794)   Brandon Wu via llvm-commits
• [llvm] [llvm][RISCV] Use zilsd for callee-saved register spill/restore on RV32 (PR #184794)   Brandon Wu via llvm-commits
• [llvm] [llvm][RISCV] Use zilsd for callee-saved register spill/restore on RV32 (PR #184794)   Brandon Wu via llvm-commits
• [clang] [llvm] [RISCV][llvm] Use [u]int32 vector for input arguments for zvdot4a8i (PR #184089)   Brandon Wu via llvm-commits
• [lld] [lld][Hexagon] Fix findMaskR8 missing duplex support (PR #183936)   Brian Cain via llvm-commits
• [llvm] [HEXAGON] fp_to_uint conversion for v32f32 to v32i1 (PR #183248)   Brian Cain via llvm-commits
• [llvm] [HEXAGON] fp_to_uint conversion for v32f32 to v32i1 (PR #183248)   Brian Cain via llvm-commits
• [llvm] [HEXAGON] fp_to_uint conversion for v32f32 to v32i1 (PR #183248)   Brian Cain via llvm-commits
• [llvm] [HEXAGON] fp_to_uint conversion for v32f32 to v32i1 (PR #183248)   Brian Cain via llvm-commits
• [llvm] [HEXAGON] fp_to_uint conversion for v32f32 to v32i1 (PR #183248)   Brian Cain via llvm-commits
• [llvm] [HEXAGON] fp_to_uint conversion for v32f32 to v32i1 (PR #183248)   Brian Cain via llvm-commits
• [llvm] [AMDGPU] add back the true16 pattern for cvt_pk_rtz (PR #184857)   Brox Chen via llvm-commits
• [lld] [llvm] [lld][DebugInfo/BTF] Add BTF section merging and deduplication (PR #183915)   Can H. Tartanoglu via llvm-commits
• [lld] [llvm] [lld][DebugInfo/BTF] Add BTF section merging and deduplication (PR #183915)   Can H. Tartanoglu via llvm-commits
• [clang] [llvm] [Clang][CodeGen] Add -gbtf: target-independent BTF emission for ELF targets (PR #183929)   Can H. Tartanoglu via llvm-commits
• [lld] [llvm] [lld][DebugInfo/BTF] Add BTF section merging and deduplication (PR #183915)   Can H. Tartanoglu via llvm-commits
• [lld] [llvm] [lld][DebugInfo/BTF] Add BTF section merging and deduplication (PR #183915)   Can H. Tartanoglu via llvm-commits
• [llvm] [AMDGPU] Enable reordering of VMEM loads during clustering (PR #107986)   Carl Ritson via llvm-commits
• [llvm] [AMDGPU] Enable reordering of VMEM loads during clustering (PR #107986)   Carl Ritson via llvm-commits
• [llvm] [AMDGPU] Reschedule loads in clauses to improve throughput (PR #102595)   Carl Ritson via llvm-commits
• [llvm] [AMDGPU] Reschedule loads in clauses to improve throughput (PR #102595)   Carl Ritson via llvm-commits
• [llvm] [AMDGPU] Reschedule loads in clauses to improve throughput (PR #102595)   Carl Ritson via llvm-commits
• [llvm] Add EVT::changeVectorElementCount and MVT:changeVectorElementCount (PR #182266)   Chaitanya Koparkar via llvm-commits
• [llvm] Add EVT::changeVectorElementCount and MVT:changeVectorElementCount (PR #182266)   Chaitanya Koparkar via llvm-commits
• [llvm] Add EVT::changeVectorElementCount and MVT:changeVectorElementCount (PR #182266)   Chaitanya Koparkar via llvm-commits
• [llvm] Add EVT::changeVectorElementCount and MVT:changeVectorElementCount (PR #182266)   Chaitanya Koparkar via llvm-commits
• [llvm] Add EVT::changeVectorElementCount and MVT:changeVectorElementCount (PR #182266)   Chaitanya Koparkar via llvm-commits
• [llvm] Add EVT::changeVectorElementCount and MVT:changeVectorElementCount (PR #182266)   Chaitanya Koparkar via llvm-commits
• [llvm] Add EVT::changeVectorElementCount and MVT:changeVectorElementCount (PR #182266)   Chaitanya Koparkar via llvm-commits
• [llvm] Add EVT::changeVectorElementCount and MVT:changeVectorElementCount (PR #182266)   Chaitanya Koparkar via llvm-commits
• [clang] [llvm] [AMDGPU] Add suffix _D4 to tensor load/store with 4 groups D#, NFC (PR #184176)   Changpeng Fang via llvm-commits
• [clang] [llvm] [AMDGPU] Add suffix _D4 to tensor load/store with 4 groups D#, NFC (PR #184176)   Changpeng Fang via llvm-commits
• [clang] [llvm] [AMDGPU] Add suffix _d4 to tensor load/store with 4 groups D#, NFC (PR #184176)   Changpeng Fang via llvm-commits
• [clang] [llvm] [AMDGPU] Add suffix _d4 to tensor load/store with 4 groups D#, NFC (PR #184176)   Changpeng Fang via llvm-commits
• [clang] [llvm] [AMDGPU] Add suffix _d4 to tensor load/store with 4 groups D#, NFC (PR #184176)   Changpeng Fang via llvm-commits
• [lldb] [llvm] [lldb-dap][windows] add integratedTerminal support (PR #174635)   Charles Zablit via llvm-commits
• [llvm] [AMDGPU] Generate COPY for each use-constraint instead of constraining the register class (PR #182104)   Chinmay Deshpande via llvm-commits
• [llvm] [AMDGPU] Fix incorrect VGPR usage for `s` constrained inline asm (PR #184910)   Chinmay Deshpande via llvm-commits
• [llvm] [AMDGPU] Generate COPY for each use-constraint instead of constraining the register class (PR #182104)   Chinmay Deshpande via llvm-commits
• [llvm] [AMDGPU] Move constraining of the reg class during SGPR to VGPR copy to existing loop (PR #182104)   Chinmay Deshpande via llvm-commits
• [libc] [llvm] [libc][math] Move hypot to shared/math and make it constexpr (PR #177588)   Chinmay Ingle via llvm-commits
• [compiler-rt] [scudo] Move getResidentPages function (PR #183138)   Christopher Ferris via llvm-commits
• [compiler-rt] [scudo] Move getResidentPages function (PR #183138)   Christopher Ferris via llvm-commits
• [compiler-rt] [scudo] Move getResidentPages function (PR #183138)   Christopher Ferris via llvm-commits
• [compiler-rt] [scudo] Move getResidentPages function (PR #183138)   Christopher Ferris via llvm-commits
• [compiler-rt] [scudo] Move getResidentPages function (PR #183138)   Christopher Ferris via llvm-commits
• [compiler-rt] [scudo] Move getResidentPages function (PR #183138)   Christopher Ferris via llvm-commits
• [compiler-rt] [scudo] Move getResidentPages function (PR #183138)   Christopher Ferris via llvm-commits
• [compiler-rt] [scudo] Move getResidentPages function (PR #183138)   Christopher Ferris via llvm-commits
• [compiler-rt] [scudo] Use a fixed format for the milliseconds in latest release. (PR #185097)   Christopher Ferris via llvm-commits
• [llvm] [AMDGPU] Make the options consistent across 3 RA pipelines(NFC) (PR #184190)   Christudasan Devadasan via llvm-commits
• [llvm] [AMDGPU] Make the options consistent across 3 RA pipelines(NFC) (PR #184190)   Christudasan Devadasan via llvm-commits
• [llvm] [AMDGPU] Add missing -wwm-regalloc=fast to 4 more tests (NFC) (PR #184966)   Christudasan Devadasan via llvm-commits
• [llvm] [AMDGPU] Add missing -wwm-regalloc=fast to 4 more tests (NFC) (PR #184966)   Christudasan Devadasan via llvm-commits
• [llvm] [AMDGPU] Add missing -wwm-regalloc=fast to 4 more tests (NFC) (PR #184966)   Christudasan Devadasan via llvm-commits
• [llvm] [AMDGPU] Add missing -wwm-regalloc=fast to 4 more tests (NFC) (PR #184966)   Christudasan Devadasan via llvm-commits
• [llvm] [AMDGPU] Multi dword spilling for unaligned tuples (PR #183701)   Christudasan Devadasan via llvm-commits
• [clang] [llvm] [Coroutines] Replace struct alloca frame with byte array and ptradd (PR #178359)   Chuanqi Xu via llvm-commits
• [llvm] [profcheck][coro] Adding Branch weights PGO in Coroutines Passes (PR #184466)   Chuanqi Xu via llvm-commits
• [llvm] [profcheck][coro] Adding Branch weights PGO in Coroutines Passes (PR #184466)   Chuanqi Xu via llvm-commits
• [llvm] [profcheck][coro] Adding Branch weights PGO in Coroutines Passes (PR #184466)   Chuanqi Xu via llvm-commits
• [llvm] [profcheck][coro] Adding Branch weights PGO in Coroutines Passes (PR #184466)   Chuanqi Xu via llvm-commits
• [llvm] [Coroutines] fix coroutines + std::unique_ptr with async exceptions validation errors (PR #149691)   Chuanqi Xu via llvm-commits
• [llvm] [CoroCleanup] Fix stale unwind predecessor when erase noop coro (PR #185337)   Chuanqi Xu via llvm-commits
• [clang] [llvm] [RFC][Coroutines] Implement HALO for coroutines that flow off final suspend (PR #185336)   Chuanqi Xu via llvm-commits
• [clang] [llvm] [RFC][Coroutines] Implement HALO for coroutines that flow off final suspend (PR #185336)   Chuanqi Xu via llvm-commits
• [clang] [llvm] [RFC][Coroutines] Implement HALO for coroutines that flow off final suspend (PR #185336)   Chuanqi Xu via llvm-commits
• [clang] [llvm] [RFC][Coroutines] Implement HALO for coroutines that flow off final suspend (PR #185336)   Chuanqi Xu via llvm-commits
• [llvm] [BPF] i128 direct return support (PR #183258)   Claire Fan via llvm-commits
• [llvm] [BPF] i128 direct return support (PR #183258)   Claire Fan via llvm-commits
• [llvm] [BPF] i128 direct return support (PR #183258)   Claire Fan via llvm-commits
• [llvm] [X86] Use shift+add/sub for vXi8 splat multiplies (PR #174110)   Cody Cutler via llvm-commits
• [llvm] [X86] Use shift+add/sub for vXi8 splat multiplies (PR #174110)   Cody Cutler via llvm-commits
• [llvm] [X86] Use shift+add/sub for vXi8 splat multiplies (PR #174110)   Cody Cutler via llvm-commits
• [llvm] [RISCV] Put Large Code Model Constant Pools in .text (PR #151393)   Craig Topper via llvm-commits
• [clang] [llvm] [RISCV][llvm] Use [u]int32 vector for input arguments for zvdot4a8i (PR #184089)   Craig Topper via llvm-commits
• [llvm] [SelectionDAG] Preserver poison for abs INT_MIN lowering (PR #183851)   Craig Topper via llvm-commits
• [llvm] [RISCV][NFC] Prepare for Short Forward Branch of branches with immediates (PR #182456)   Craig Topper via llvm-commits
• [llvm] [LV] Enable CSA for RISCV EVL tail-folding with scalable vector. (PR #184068)   Craig Topper via llvm-commits
• [llvm] [RISCV] Promote i8/i16/i32 scalable vector CLMUL to i64 CLMUL with Zvbc. (PR #184265)   Craig Topper via llvm-commits
• [llvm] [LegalizeVectorOps][RISCV][PowerPC][AArch64][X86] Enable the clmul/clmulr/clmulh expansion code. (PR #184257)   Craig Topper via llvm-commits
• [llvm] [RISCV] Promote i8/i16/i32 scalable vector CLMUL to i64 CLMUL with Zvbc. (PR #184265)   Craig Topper via llvm-commits
• [llvm] [RISCV] Promote i8/i16/i32 scalable vector CLMUL to i64 CLMUL with Zvbc. (PR #184265)   Craig Topper via llvm-commits
• [llvm] [RISCV] Handle Zvabd and XRivosVizip EEWs in RISCVVLOptimizer (PR #184117)   Craig Topper via llvm-commits
• [llvm] [RISCV][NFC] Prepare for Short Forward Branch of branches with immediates (PR #182456)   Craig Topper via llvm-commits
• [llvm] [RISCV][GISel] Replace buildInstr with BuildMI (PR #183714)   Craig Topper via llvm-commits
• [llvm] [RISCV] Promote i8/i16/i32 scalable vector CLMUL to i64 CLMUL with Zvbc. (PR #184265)   Craig Topper via llvm-commits
• [llvm] [TargetLowering][PowerPC] Don't unroll vector CLMUL when MUL is not supported. (PR #184238)   Craig Topper via llvm-commits
• [llvm] [RISCV] Promote i8/i16/i32 scalable vector CLMUL to i64 CLMUL with Zvbc. (PR #184265)   Craig Topper via llvm-commits
• [llvm] [RISCV] Promote i8/i16/i32 scalable vector CLMUL to i64 CLMUL with Zvbc. (PR #184265)   Craig Topper via llvm-commits
• [llvm] [RISCV] Fix type inference ambiguity in SwapSysReg pattern (PR #184305)   Craig Topper via llvm-commits
• [llvm] [RISCV] Fix type inference ambiguity in SwapSysReg pattern (PR #184305)   Craig Topper via llvm-commits
• [llvm] [RISCV] Promote i8/i16/i32 scalable vector CLMUL to i64 CLMUL with Zvbc. (PR #184265)   Craig Topper via llvm-commits
• [llvm] [RISCV] Sink instructions so AVL dominates in RISCVVLOptimizer (PR #184155)   Craig Topper via llvm-commits
• [llvm] [RISCV] Remove OperandType OPERAND_SIMM10_UNSIGNED. Rename OPERAND_SIMM8_UNSIGNED->OPERAND_SIMM8 (PR #184540)   Craig Topper via llvm-commits
• [llvm] [RISCV] Lower i8/i16/i32 scalable vector ISD::CLMUL/CLMULH with Zvbc32e. (PR #184465)   Craig Topper via llvm-commits
• [llvm] [RISCV] Allow unsigned immediates for pli.h, pli.dh, pli.w (PR #184554)   Craig Topper via llvm-commits
• [llvm] [RISCV] Lower i8/i16/i32 scalable vector ISD::CLMUL/CLMULH with Zvbc32e. (PR #184465)   Craig Topper via llvm-commits
• [llvm] [RISCV] Add findCommutedOpIndices support for Zvabd (PR #184602)   Craig Topper via llvm-commits
• [llvm] [TableGen] Remove incorrect flag checking on patterns (PR #176443)   Craig Topper via llvm-commits
• [llvm] [SelectionDAG] Use ExpandIntRes_CLMUL to expand vector CLMUL via narrower legal types (PR #184468)   Craig Topper via llvm-commits
• [llvm] [SelectionDAG] Use ExpandIntRes_CLMUL to expand vector CLMUL via narrower legal types (PR #184468)   Craig Topper via llvm-commits
• [llvm] [SelectionDAG] Use ExpandIntRes_CLMUL to expand vector CLMUL via narrower legal types (PR #184468)   Craig Topper via llvm-commits
• [llvm] [SelectionDAG] Use ExpandIntRes_CLMUL to expand vector CLMUL via narrower legal types (PR #184468)   Craig Topper via llvm-commits
• [llvm] [RISCV] Implement `isLoadFromStackSlotPostFE` and ... (PR #184673)   Craig Topper via llvm-commits
• [llvm] [RISCV][CostModel] Fix invalid cost for vector select on targets without FP vector support (PR #183158)   Craig Topper via llvm-commits
• [llvm] [RISCV][CostModel] Fix invalid cost for vector select on targets without FP vector support (PR #183158)   Craig Topper via llvm-commits
• [llvm] [X86] Add (v)pcmpestr(m/i)q to set the W bit. (PR #184746)   Craig Topper via llvm-commits
• [llvm] [RISCV][CostModel] Fix invalid cost for vector select on targets without FP vector support (PR #183158)   Craig Topper via llvm-commits
• [llvm] [RISCV][CostModel] Fix invalid cost for vector select on targets without FP vector support (PR #183158)   Craig Topper via llvm-commits
• [llvm] [RISCV] Don't make ISD::ABDS/ABDU legal for v2i32 with P extension. (PR #184753)   Craig Topper via llvm-commits
• [llvm] [RISCV] Implement `isLoadFromStackSlotPostFE` and `isStoreToStackSlotPostFE` (PR #184673)   Craig Topper via llvm-commits
• [llvm] [RISCV] Add register overlap checks to the assembler for vector indexed segment load (PR #184569)   Craig Topper via llvm-commits
• [llvm] [RISCV] Add register overlap checks to the assembler for vector indexed segment load (PR #184569)   Craig Topper via llvm-commits
• [llvm] [llvm][RISCV] Use zilsd for callee-saved register spill/restore on RV32 (PR #184794)   Craig Topper via llvm-commits
• [llvm] [llvm][RISCV] Use zilsd for callee-saved register spill/restore on RV32 (PR #184794)   Craig Topper via llvm-commits
• [llvm] [RISCV] Add contraints for SpacemiT X60 AI VDot Insts (PR #174364)   Craig Topper via llvm-commits
• [llvm] [X86] Add (v)pcmpestr(m/i)q to set the W bit. (PR #184746)   Craig Topper via llvm-commits
• [llvm] [RISCV] Implement `isLoadFromStackSlotPostFE` and `isStoreToStackSlotPostFE` (PR #184673)   Craig Topper via llvm-commits
• [llvm] [RISCV] Don't make ISD::ABDS/ABDU legal for v2i32 with P extension. (PR #184753)   Craig Topper via llvm-commits
• [llvm] [RISCV][P-ext] Support vector ISD::ABS using PDIF instructions. (PR #184822)   Craig Topper via llvm-commits
• [llvm] [RISCV][P-ext] Support vector ISD::ABS using PABD instructions. (PR #184822)   Craig Topper via llvm-commits
• [llvm] [RISCV][GISel] Support select G_INSERT_SUBVECTOR (PR #171092)   Craig Topper via llvm-commits
• [llvm] [RISCV][P-ext] Fix cannot select error for shlsat with i8 vector argument. (PR #184839)   Craig Topper via llvm-commits
• [llvm] [DemandedBits] Support non-constant shift amounts for funnel shifts (PR #180569)   Craig Topper via llvm-commits
• [llvm] [RISCV][P-ext] Fix cannot select error for shlsat with i8 vector argument. (PR #184839)   Craig Topper via llvm-commits
• [llvm] [RISCV] Add RISCVISD opcodes for PSHL/PSRL/PSRA and lower to them. (PR #184836)   Craig Topper via llvm-commits
• [llvm] [RISCV][P-ext] Only support sshlsat for splat immediate shift amounts. (PR #184886)   Craig Topper via llvm-commits
• [llvm] [RISCV][P-ext] Support vector ISD::ABS using PABD instructions. (PR #184822)   Craig Topper via llvm-commits
• [llvm] [RISCV][P-ext] Recognize vector shifts with splat build_vector shift amount. (PR #184909)   Craig Topper via llvm-commits
• [llvm] [RISCV][P-ext] Select plui.h/w and improve usage of pli.b/h/w. (PR #184937)   Craig Topper via llvm-commits
• [llvm] [RISCV][P-ext] Select plui.h/w and improve usage of pli.b/h/w. (PR #184937)   Craig Topper via llvm-commits
• [llvm] [RISCV][P-ext] Select plui.h/w and improve usage of pli.b/h/w. (PR #184937)   Craig Topper via llvm-commits
• [llvm] [RISCV][P-ext] Select plui.h/w and improve usage of pli.b/h/w. (PR #184937)   Craig Topper via llvm-commits
• [llvm] [RISCV][P-ext] Recognize vector shifts with splat build_vector shift amount. (PR #184909)   Craig Topper via llvm-commits
• [llvm] [RISCV][P-ext] Recognize vector shifts with splat build_vector shift amount. (PR #184909)   Craig Topper via llvm-commits
• [llvm] [RISCV][P-ext] Recognize vector shifts with splat build_vector shift amount. (PR #184909)   Craig Topper via llvm-commits
• [llvm] [RISCV] Remove unneeded ImmLeaf from simm8_unsigned. NFC (PR #184960)   Craig Topper via llvm-commits
• [llvm] [X86] remove unnecessary movs when %rdx is an input to mulx (PR #184462)   Craig Topper via llvm-commits
• [llvm] [RISCV] Remove unneeded ImmLeaf from simm8_unsigned. NFC (PR #184960)   Craig Topper via llvm-commits
• [llvm] [RISCV][P-ext] Recognize vector shifts with splat build_vector shift amount. (PR #184909)   Craig Topper via llvm-commits
• [llvm] [llvm][RISCV] Use zilsd for callee-saved register spill/restore on RV32 (PR #184794)   Craig Topper via llvm-commits
• [llvm] [SelectionDAG] Use ExpandIntRes_CLMUL to expand vector CLMUL via narrower legal types (PR #184468)   Craig Topper via llvm-commits
• [llvm] [RISCV][P-ext] Support vector ISD::ABS using PABD instructions. (PR #184822)   Craig Topper via llvm-commits
• [llvm] [RISCV][P-ext] Only support sshlsat for splat immediate shift amounts. (PR #184886)   Craig Topper via llvm-commits
• [llvm] [SelectionDAG] Optimize 32-bit udiv with 33-bit magic constants on 64-bit targets (PR #181288)   Craig Topper via llvm-commits
• [llvm] [doc][RISCV] Add documentation for customizing VCIX scheduling info (PR #183129)   Craig Topper via llvm-commits
• [llvm] [doc][RISCV] Add documentation for customizing VCIX scheduling info (PR #183129)   Craig Topper via llvm-commits
• [llvm] [RISCV][P-ext] Support vector ISD::ABS using PABD instructions. (PR #184822)   Craig Topper via llvm-commits
• [llvm] [RISCV][P-ext] Custom legalize i64 SHL to WSLL(I)/WSLA(I) (PR #185079)   Craig Topper via llvm-commits
• [llvm] [RISCV][P-ext] Only support sshlsat for splat immediate shift amounts. (PR #184886)   Craig Topper via llvm-commits
• [llvm] [SelectionDAG] Optimize 32-bit udiv with 33-bit magic constants on 64-bit targets (PR #181288)   Craig Topper via llvm-commits
• [llvm] [NFC] Move fusion- to start of Fusion Feature Name (PR #185146)   Craig Topper via llvm-commits
• [llvm] [X86] TableGen-erate SDNode descriptions (PR #168421)   Craig Topper via llvm-commits
• [llvm] [X86] TableGen-erate SDNode descriptions (PR #168421)   Craig Topper via llvm-commits
• [llvm] [X86] TableGen-erate SDNode descriptions (PR #168421)   Craig Topper via llvm-commits
• [llvm] [X86] TableGen-erate SDNode descriptions (PR #168421)   Craig Topper via llvm-commits
• [llvm] [X86] TableGen-erate SDNode descriptions (PR #168421)   Craig Topper via llvm-commits
• [llvm] [X86] TableGen-erate SDNode descriptions (PR #168421)   Craig Topper via llvm-commits
• [llvm] [X86] TableGen-erate SDNode descriptions (PR #168421)   Craig Topper via llvm-commits
• [llvm] [X86] TableGen-erate SDNode descriptions (PR #168421)   Craig Topper via llvm-commits
• [llvm] [X86] TableGen-erate SDNode descriptions (PR #168421)   Craig Topper via llvm-commits
• [llvm] [AggressiveInstCombine] Recognize table based log2 and replace with ctlz+sub. (PR #185160)   Craig Topper via llvm-commits
• [llvm] [AggressiveInstCombine] Recognize table based log2 and replace with ctlz+sub. (PR #185160)   Craig Topper via llvm-commits
• [llvm] [SelectionDAG] Second SimplifyDemandedBits pass for AND RHS using LHS known zeros (scalar only) (PR #185235)   Craig Topper via llvm-commits
• [llvm] [SelectionDAG] Second SimplifyDemandedBits pass for AND RHS using LHS known zeros (scalar only) (PR #185235)   Craig Topper via llvm-commits
• [llvm] [SelectionDAG] Second SimplifyDemandedBits pass for AND RHS using LHS known zeros (scalar only) (PR #185235)   Craig Topper via llvm-commits
• [flang] [llvm] [Flang] Adding lowering for the allocation and deallocation of coarrays (PR #182110)   Dan Bonachea via llvm-commits
• [flang] [llvm] [Flang] Adding lowering for the allocation and deallocation of coarrays (PR #182110)   Dan Bonachea via llvm-commits
• [flang] [llvm] [Flang] Adding lowering for the allocation and deallocation of coarrays (PR #182110)   Dan Bonachea via llvm-commits
• [flang] [llvm] [Flang] Adding lowering for the allocation and deallocation of coarrays (PR #182110)   Dan Bonachea via llvm-commits
• [flang] [llvm] [Flang] Adding lowering for the allocation and deallocation of coarrays (PR #182110)   Dan Bonachea via llvm-commits
• [flang] [llvm] [Flang] Adding lowering for the allocation and deallocation of coarrays (PR #182110)   Dan Bonachea via llvm-commits
• [flang] [llvm] [Flang] Adding lowering for the allocation and deallocation of coarrays (PR #182110)   Dan Bonachea via llvm-commits
• [flang] [llvm] [Flang] Adding lowering for the allocation and deallocation of coarrays (PR #182110)   Dan Bonachea via llvm-commits
• [clang] [llvm] [clang][LTO] Emit symbols for global inline assembly as module flags (PR #174995)   Daniel Thornburgh via llvm-commits
• [lld] [llvm] [DebugInfo][DwarfDebug] Move emission of globals from beginModule() to endModule() (5/7) (PR #184219)   David Blaikie via llvm-commits
• [clang] [llvm] Don't crash when given an empty input filename. (PR #184718)   David Blaikie via llvm-commits
• [llvm] [CodeGen][PreISelIntrinsicLowering] Add VP-based lowering for memcpy/memmove/memset (PR #165585)   David Del Río via llvm-commits
• [llvm] [CodeGen][PreISelIntrinsicLowering] Add VP-based lowering for memcpy/memmove/memset (PR #165585)   David Del Río via llvm-commits
• [llvm] 51d9b40 - [AArch64] Remove iXLen from sve-lrint.ll. NFC   David Green via llvm-commits
• [llvm] 86b07a7 - [AArch64] Remove -aarch64-load-store-renaming=true from test. NFC   David Green via llvm-commits
• [llvm] [AArch64] Combine (and/or X, (dup (not Y))) -> (bic/orn X, (dup Y)) (PR #175739)   David Green via llvm-commits
• [llvm] [AArch64] Add basic NPM support for LoadStoreOptimizer. (PR #184090)   David Green via llvm-commits
• [llvm] [AArch64] Optimize vector multiplications by certain constants for v2i64 (PR #183827)   David Green via llvm-commits
• [llvm] [VectorCombine] Optimize vector combine in fold binop of reduction (PR #179416)   David Green via llvm-commits
• [llvm] cd0eb16 - [AArch64] Add maybe_unused to DstTy in assert. NFC   David Green via llvm-commits
• [llvm] [AArch64] Add basic NPM support for LoadStoreOptimizer. (PR #184090)   David Green via llvm-commits
• [llvm] [AArch64] Add basic NPM support for LoadStoreOptimizer. (PR #184090)   David Green via llvm-commits
• [llvm] e0fa495 - [ARM] Format ARMLoadStoreOptimizer Pass classes. NFC   David Green via llvm-commits
• [llvm] [ARM] Add basic NPM support for LoadStoreOptimizer (PR #184139)   David Green via llvm-commits
• [llvm] [ARM] Add basic NPM support for LoadStoreOptimizer (PR #184139)   David Green via llvm-commits
• [llvm] [AArch64] Fix type mismatch in bitconvert + vec_extract patterns (PR #183549)   David Green via llvm-commits
• [llvm] [AArch64] Fix type mismatch in bitconvert + vec_extract patterns (PR #183549)   David Green via llvm-commits
• [llvm] [AArch64] Fix type mismatch in bitconvert + vec_extract patterns (PR #183549)   David Green via llvm-commits
• [llvm] [AArch64] Sink NOT to be fold into BIC/ORN/EON (PR #176194)   David Green via llvm-commits
• [llvm] [AArch64] C1-Ultra Scheduling model (PR #182251)   David Green via llvm-commits
• [llvm] [AArch64] C1-Ultra Scheduling model (PR #182251)   David Green via llvm-commits
• [llvm] [AArch64][GlobalISel] Limit srem by const of small sizes. (PR #184066)   David Green via llvm-commits
• [llvm] [NFC][AArch64] Refactor Arm llvm-mca tests (PR #183294)   David Green via llvm-commits
• [llvm] [AArch64] Limit support to f32 and f64 in performSelectCombine (PR #184315)   David Green via llvm-commits
• [llvm] [AArch64] Limit support to f32 and f64 in performSelectCombine (PR #184315)   David Green via llvm-commits
• [llvm] [AArch64][ISel] Use vector register for scalar CLMUL (PR #183282)   David Green via llvm-commits
• [llvm] [AArch64][ISel] Use vector register for scalar CLMUL (PR #183282)   David Green via llvm-commits
• [llvm] [AArch64] Limit support to f32 and f64 in performSelectCombine (PR #184315)   David Green via llvm-commits
• [llvm] [LoopReduceMotion] Improve loop by extract reduction instruction (PR #179215)   David Green via llvm-commits
• [llvm] [LoopReduceMotion] Improve loop by extract reduction instruction (PR #179215)   David Green via llvm-commits
• [llvm] [LoopReduceMotion] Improve loop by extract reduction instruction (PR #179215)   David Green via llvm-commits
• [llvm] [AArch64] Fix type mismatch in bitconvert + vec_extract patterns (PR #183549)   David Green via llvm-commits
• [llvm] [CodeGen] Treat hasOrderedMemoryRef as implying arbitrary loads or stores (PR #182000)   David Green via llvm-commits
• [llvm] [AArch64] Prefer `SADDLV` over `ADDV` for vector mask reductions (PR #183522)   David Green via llvm-commits
• [llvm] [AArch64] Add basic NPM support for LoadStoreOptimizer. (PR #184090)   David Green via llvm-commits
• [llvm] [ARM] Add basic NPM support for LoadStoreOptimizer (PR #184139)   David Green via llvm-commits
• [llvm] [AArch64] Avoid folding sign-extend of vector extracts into ALU ops (PR #183522)   David Green via llvm-commits
• [llvm] [ARM] Use FPRegs for fastcc calling convention detection. (PR #184593)   David Green via llvm-commits
• [llvm] [AArch64] Fix SVE cost model for various math intrinsics (PR #184358)   David Green via llvm-commits
• [llvm] [AArch64] Fix SVE cost model for various math intrinsics (PR #184358)   David Green via llvm-commits
• [llvm] [AArch64] Fix SVE cost model for various math intrinsics (PR #184358)   David Green via llvm-commits
• [llvm] [AArch64] Fix SVE cost model for various math intrinsics (PR #184358)   David Green via llvm-commits
• [llvm] Reapply "[AArch64] Wrap integer SCALAR_TO_VECTOR nodes in bitcasts (#172837)" (#183380) (PR #184403)   David Green via llvm-commits
• [llvm] [AArch64] Update clmul tests after #184403 (PR #184611)   David Green via llvm-commits
• [llvm] [AArch64] Enabled and regenerate clmul-fixed.ll. NFC (PR #184628)   David Green via llvm-commits
• [llvm] [AArch64] Enabled and regenerate clmul-fixed.ll. NFC (PR #184628)   David Green via llvm-commits
• [llvm] [AArch64] Fix regression from “Fold scalar-to-vector shuffles into DUP/FMOV" (PR #178227)   David Green via llvm-commits
• [llvm] [AArch64] Fix SVE cost model for various math intrinsics (PR #184358)   David Green via llvm-commits
• [llvm] [AArch64] Enabled and regenerate clmul-fixed.ll. NFC (PR #184628)   David Green via llvm-commits
• [llvm] [SelectionDAG] Use ExpandIntRes_CLMUL to expand vector CLMUL via narrower legal types (PR #184468)   David Green via llvm-commits
• [llvm] [SelectionDAG] Use ExpandIntRes_CLMUL to expand vector CLMUL via narrower legal types (PR #184468)   David Green via llvm-commits
• [llvm] [AArch64] Sink NOT to be fold into BIC/ORN/EON (PR #176194)   David Green via llvm-commits
• [llvm] [AArch64] Sink NOT to be fold into BIC/ORN/EON (PR #176194)   David Green via llvm-commits
• [llvm] [AArch64] Sink NOT to be fold into BIC/ORN/EON (PR #176194)   David Green via llvm-commits
• [llvm] [AArch64] Sink NOT to be fold into BIC/ORN/EON (PR #176194)   David Green via llvm-commits
• [llvm] [AArch64] Add partial reduce patterns for new fdot instructions (PR #184659)   David Green via llvm-commits
• [llvm] [LoopReduceMotion] Improve loop by extract reduction instruction (PR #179215)   David Green via llvm-commits
• [llvm] [AArch64] Add sanitazation when custom lowering fp partial reduce (PR #184811)   David Green via llvm-commits
• [llvm] [AArch64] Add partial reduce patterns for new fdot instructions (PR #184659)   David Green via llvm-commits
• [llvm] [AArch64] Add partial reduce patterns for new fdot instructions (PR #184659)   David Green via llvm-commits
• [llvm] [X86] [AArch64] fuse constant addition after sbb (PR #184541)   David Green via llvm-commits
• [llvm] [AArch64] Fix more typos (NFC) (PR #183086)   David Green via llvm-commits
• [llvm] [AArch64] Fix more typos (NFC) (PR #183086)   David Green via llvm-commits
• [llvm] [CodeGen][TTI] Reduce funnel shift cost for constant shift amounts (PR #184942)   David Green via llvm-commits
• [llvm] [AArch64] Optimize vector multiplications by certain constants for v2i64 (PR #183827)   David Green via llvm-commits
• [llvm] [AArch64] Optimize vector multiplications by certain constants for v2i64 (PR #183827)   David Green via llvm-commits
• [llvm] [AArch64] Optimize vector multiplications by certain constants for v2i64 (PR #183827)   David Green via llvm-commits
• [llvm] [AArch64] Optimize vector multiplications by certain constants for v2i64 (PR #183827)   David Green via llvm-commits
• [llvm] [AArch64] Optimize vector multiplications by certain constants for v2i64 (PR #183827)   David Green via llvm-commits
• [llvm] [AArch64] Optimize vector multiplications by certain constants for v2i64 (PR #183827)   David Green via llvm-commits
• [llvm] [AArch64] Optimize vector multiplications by certain constants for v2i64 (PR #183827)   David Green via llvm-commits
• [llvm] [LoopReduceMotion] Improve loop by extract reduction instruction (PR #179215)   David Green via llvm-commits
• [llvm] [VectorCombine] Optimize vector combine in fold binop of reduction (PR #179416)   David Green via llvm-commits
• [llvm] [NewPM] Port for AArch64A53Fix835769 (PR #184965)   David Green via llvm-commits
• [llvm] [NewPM] Port for AArch64A53Fix835769 (PR #184965)   David Green via llvm-commits
• [llvm] [NewPM] Port for AArch64A53Fix835769 (PR #184965)   David Green via llvm-commits
• [clang] [llvm] [ARM] Add support for Windows SEH (PR #184953)   David Green via llvm-commits
• [llvm] [SelectionDAG] Use ExpandIntRes_CLMUL to expand vector CLMUL via narrower legal types (PR #184468)   David Green via llvm-commits
• [llvm] [NewPM] Port for AArch64A53Fix835769 (PR #184965)   David Green via llvm-commits
• [llvm] [NewPM] Port for AArch64A53Fix835769 (PR #184965)   David Green via llvm-commits
• [llvm] [Analysis] isTriviallyVectorizable - add Intrinsic::clmul along with vectorisation tests (PR #180014)   David Green via llvm-commits
• [llvm] 89d6936 - [AArch64][GlobalISel] Add more gisel test coverage. NFC   David Green via llvm-commits
• [llvm] [AArch64] Optimize vector slide shuffles with zeros to use shift instructions (PR #185170)   David Green via llvm-commits
• [llvm] [AArch64] Optimize vector slide shuffles with zeros to use shift instructions (PR #185170)   David Green via llvm-commits
• [llvm] [AArch64] Optimize vector slide shuffles with zeros to use shift instructions (PR #185170)   David Green via llvm-commits
• [llvm] [AArch64] fuse constant addition after sbb (PR #185117)   David Green via llvm-commits
• [llvm] [AArch64] fuse constant addition after sbb (PR #185117)   David Green via llvm-commits
• [llvm] [AArch64] Optimize vector multiplications by certain constants for v2i64 (PR #183827)   David Green via llvm-commits
• [llvm] [NewPM] Add port for aarch64-simd-scalar (PR #185256)   David Green via llvm-commits
• [llvm] [NewPM] Add port for aarch64-simd-scalar (PR #185256)   David Green via llvm-commits
• [llvm] [ARM] Use FPRegs for fastcc calling convention detection. (PR #184593)   David Green via llvm-commits
• [llvm] [ARM] Use FPRegs for fastcc calling convention detection. (PR #184593)   David Green via llvm-commits
• [llvm] [AArch64] Add partial reduce patterns for new fdot instructions (PR #184659)   David Green via llvm-commits
• [llvm] [ARM] Add basic NPM support for LoadStoreOptimizer (PR #184139)   David Green via llvm-commits
• [llvm] [ARM] Add basic NPM support for LoadStoreOptimizer (PR #184139)   David Green via llvm-commits
• [llvm] [ARM] Add basic NPM support for LoadStoreOptimizer (PR #184139)   David Green via llvm-commits
• [llvm] [ARM] Add basic NPM support for LoadStoreOptimizer (PR #184139)   David Green via llvm-commits
• [llvm] [ASan][Windows] Fixing Windows shadow memory address for arm64 (PR #184902)   David Justo via llvm-commits
• [llvm] [TableGen] Fix duplicate enum definitions in register class intersections (PR #183139)   David Peixotto via llvm-commits
• [llvm] [AArch64] Vectorise llvm.pow using vector intrinsic for ArmPL library (PR #183319)   David Sherwood via llvm-commits
• [llvm] [LV] Remove DataAndControlFlowWithoutRuntimeCheck. NFC (PR #183762)   David Sherwood via llvm-commits
• [llvm] [LV] Remove DataAndControlFlowWithoutRuntimeCheck. NFC (PR #183762)   David Sherwood via llvm-commits
• [llvm] [LV] Remove DataAndControlFlowWithoutRuntimeCheck. NFC (PR #183762)   David Sherwood via llvm-commits
• [llvm] [AArch64] Vectorise llvm.pow using vector intrinsic for ArmPL library (PR #183319)   David Sherwood via llvm-commits
• [llvm] [AArch64] Vectorise llvm.pow using vector intrinsic for ArmPL library (PR #183319)   David Sherwood via llvm-commits
• [llvm] [AArch64] Add vector expansion support for ISD::FCBRT when using ArmPL (PR #183750)   David Sherwood via llvm-commits
• [llvm] [AArch64] Add vector expansion support for ISD::FCBRT when using ArmPL (PR #183750)   David Sherwood via llvm-commits
• [llvm] [VPlan] Optimize resume values of IVs together with other exit values. (PR #174239)   David Sherwood via llvm-commits
• [llvm] [VPlan] Optimize resume values of IVs together with other exit values. (PR #174239)   David Sherwood via llvm-commits
• [llvm] [VPlan] Optimize resume values of IVs together with other exit values. (PR #174239)   David Sherwood via llvm-commits
• [llvm] [LV] Transform tests for early-exit with stores (PR #183288)   David Sherwood via llvm-commits
• [llvm] [VPlan] Optimize resume values of IVs together with other exit values. (PR #174239)   David Sherwood via llvm-commits
• [llvm] [LV] Remove DataAndControlFlowWithoutRuntimeCheck. NFC (PR #183762)   David Sherwood via llvm-commits
• [llvm] [AArch64] Add vector expansion support for ISD::FCBRT when using ArmPL (PR #183750)   David Sherwood via llvm-commits
• [llvm] [AArch64] Add vector expansion support for ISD::FCBRT when using ArmPL (PR #183750)   David Sherwood via llvm-commits
• [llvm] [AArch64] Add vector expansion support for ISD::FCBRT when using ArmPL (PR #183750)   David Sherwood via llvm-commits
• [llvm] [AArch64] Add vector expansion support for ISD::FCBRT when using ArmPL (PR #183750)   David Sherwood via llvm-commits
• [llvm] [AArch64] Add vector expansion support for ISD::FCBRT when using ArmPL (PR #183750)   David Sherwood via llvm-commits
• [llvm] [LV] Add `-force-target-supports-masked-memory-ops` option (PR #184325)   David Sherwood via llvm-commits
• [llvm] [LV] Add `-force-target-supports-masked-memory-ops` option (PR #184325)   David Sherwood via llvm-commits
• [llvm] [LV] Add `-force-target-supports-masked-memory-ops` option (PR #184325)   David Sherwood via llvm-commits
• [llvm] [VPlan] Optimize resume values of IVs together with other exit values. (PR #174239)   David Sherwood via llvm-commits
• [llvm] [VPlan] Optimize resume values of IVs together with other exit values. (PR #174239)   David Sherwood via llvm-commits
• [llvm] [VPlan] Optimize resume values of IVs together with other exit values. (PR #174239)   David Sherwood via llvm-commits
• [llvm] [VPlan] Optimize resume values of IVs together with other exit values. (PR #174239)   David Sherwood via llvm-commits
• [llvm] [VPlan] Optimize resume values of IVs together with other exit values. (PR #174239)   David Sherwood via llvm-commits
• [llvm] [VPlan] Optimize resume values of IVs together with other exit values. (PR #174239)   David Sherwood via llvm-commits
• [llvm] [VPlan] Optimize resume values of IVs together with other exit values. (PR #174239)   David Sherwood via llvm-commits
• [llvm] [VPlan] Optimize resume values of IVs together with other exit values. (PR #174239)   David Sherwood via llvm-commits
• [llvm] [AArch64] Fix SVE cost model for various math intrinsics (PR #184358)   David Sherwood via llvm-commits
• [llvm] [AArch64] Fix SVE cost model for various math intrinsics (PR #184358)   David Sherwood via llvm-commits
• [llvm] [VPlan] Add const to VPPredicator methods. nfc (PR #184359)   David Sherwood via llvm-commits
• [llvm] [VPlan] Materialize VectorTripCount in narrowInterleaveGroups. (PR #182146)   David Sherwood via llvm-commits
• [llvm] [VPlan] Materialize VectorTripCount in narrowInterleaveGroups. (PR #182146)   David Sherwood via llvm-commits
• [llvm] [VPlan] Materialize VectorTripCount in narrowInterleaveGroups. (PR #182146)   David Sherwood via llvm-commits
• [llvm] [AArch64] Fix SVE cost model for various math intrinsics (PR #184358)   David Sherwood via llvm-commits
• [llvm] [AArch64] Fix SVE cost model for various math intrinsics (PR #184358)   David Sherwood via llvm-commits
• [llvm] [AArch64] Fix SVE cost model for various math intrinsics (PR #184358)   David Sherwood via llvm-commits
• [llvm] [AArch64] Fix SVE cost model for various math intrinsics (PR #184358)   David Sherwood via llvm-commits
• [llvm] [AArch64] Fix SVE cost model for various math intrinsics (PR #184358)   David Sherwood via llvm-commits
• [llvm] [AArch64] Fix SVE cost model for various math intrinsics (PR #184358)   David Sherwood via llvm-commits
• [llvm] [AArch64] Fix SVE cost model for various math intrinsics (PR #184358)   David Sherwood via llvm-commits
• [llvm] [VPlan] Optimize resume values of IVs together with other exit values. (PR #174239)   David Sherwood via llvm-commits
• [llvm] [AArch64] Fix SVE cost model for various math intrinsics (PR #184358)   David Sherwood via llvm-commits
• [llvm] [LV] Adjust exit recipe detection to run on early vplan (PR #183318)   David Sherwood via llvm-commits
• [llvm] [LV] Adjust exit recipe detection to run on early vplan (PR #183318)   David Sherwood via llvm-commits
• [llvm] [LV] Adjust exit recipe detection to run on early vplan (PR #183318)   David Sherwood via llvm-commits
• [llvm] [LV] Adjust exit recipe detection to run on early vplan (PR #183318)   David Sherwood via llvm-commits
• [llvm] [LV] Adjust exit recipe detection to run on early vplan (PR #183318)   David Sherwood via llvm-commits
• [llvm] [LV] Adjust exit recipe detection to run on early vplan (PR #183318)   David Sherwood via llvm-commits
• [llvm] [LV] Adjust exit recipe detection to run on early vplan (PR #183318)   David Sherwood via llvm-commits
• [llvm] [NFC][LV] Introduce enums for uncountable exit detail and style (PR #184808)   David Sherwood via llvm-commits
• [llvm] [NFC][LV] Introduce enums for uncountable exit detail and style (PR #184808)   David Sherwood via llvm-commits
• [llvm] [NFC][LV] Introduce enums for uncountable exit detail and style (PR #184808)   David Sherwood via llvm-commits
• [llvm] [NFC][LV] Introduce enums for uncountable exit detail and style (PR #184808)   David Sherwood via llvm-commits
• [llvm] [NFC][LV] Introduce enums for uncountable exit detail and style (PR #184808)   David Sherwood via llvm-commits
• [llvm] github-automation.py: Fix mis-indented statement (PR #149653)   David Spickett via llvm-commits
• [lldb] [llvm] [lldb][Process/FreeBSDKernelCore] Improve DoUpdateThreadList() (PR #183981)   David Spickett via llvm-commits
• [lldb] [llvm] [lldb][Process/FreeBSDKernelCore] Improve DoUpdateThreadList() (PR #183981)   David Spickett via llvm-commits
• [lldb] [llvm] [lldb][Process/FreeBSDKernelCore] Improve DoUpdateThreadList() (PR #183981)   David Spickett via llvm-commits
• [lldb] [llvm] [lldb][Process/FreeBSDKernelCore] Improve DoUpdateThreadList() (PR #183981)   David Spickett via llvm-commits
• [lldb] [llvm] [lldb][Process/FreeBSDKernelCore] Improve DoUpdateThreadList() (PR #183981)   David Spickett via llvm-commits
• [lldb] [llvm] [lldb][Process/FreeBSDKernelCore] Improve DoUpdateThreadList() (PR #183981)   David Spickett via llvm-commits
• [lldb] [llvm] [lldb][Process/FreeBSDKernelCore] Improve DoUpdateThreadList() (PR #183981)   David Spickett via llvm-commits
• [lldb] [llvm] [lldb][Process/FreeBSDKernelCore] Load core according to KASLR (PR #183975)   David Spickett via llvm-commits
• [lldb] [llvm] [lldb][Process/FreeBSDKernelCore] Load core according to KASLR (PR #183975)   David Spickett via llvm-commits
• [lldb] [llvm] [lldb][Process/FreeBSDKernelCore] Load core according to KASLR (PR #183975)   David Spickett via llvm-commits
• [lldb] [llvm] [lldb][docs] Document AArch64 Linux Permission Overlay support (PR #184119)   David Spickett via llvm-commits
• [lldb] [llvm] [lldb][docs] Document AArch64 Linux Permission Overlay support (PR #184119)   David Spickett via llvm-commits
• [lldb] [llvm] [lldb][Process/FreeBSDKernelCore] Improve DoUpdateThreadList() (PR #183981)   David Spickett via llvm-commits
• [lldb] [llvm] [lldb][Process/FreeBSDKernelCore] Improve DoUpdateThreadList() (PR #183981)   David Spickett via llvm-commits
• [lldb] [llvm] [lldb][Process/FreeBSDKernelCore] Improve DoUpdateThreadList() (PR #183981)   David Spickett via llvm-commits
• [lldb] [llvm] [lldb][Process/FreeBSDKernelCore] Improve DoUpdateThreadList() (PR #183981)   David Spickett via llvm-commits
• [llvm] github-automation.py: Avoid duplicate pings (PR #184321)   David Spickett via llvm-commits
• [llvm] github-automation.py: Avoid duplicate pings (PR #184321)   David Spickett via llvm-commits
• [llvm] github-automation.py: Avoid duplicate pings (PR #184321)   David Spickett via llvm-commits
• [llvm] github-automation.py: Use raw strings for regex (PR #184326)   David Spickett via llvm-commits
• [llvm] github-automation.py: Use raw strings for regex (PR #184326)   David Spickett via llvm-commits
• [llvm] github-automation.py: Avoid duplicate pings (PR #184321)   David Spickett via llvm-commits
• [llvm] [llvm] Add format check for MCSubtargetFeatures (PR #180943)   David Spickett via llvm-commits
• [lld] [lldb] [llvm] [AArch64] Support TLS variables in debug info (PR #146572)   David Spickett via llvm-commits
• [llvm] [llvm] Add format check for MCSubtargetFeatures (PR #180943)   David Spickett via llvm-commits
• [lldb] [llvm] [lldb][Process/FreeBSDKernelCore] Improve DoUpdateThreadList() (PR #183981)   David Spickett via llvm-commits
• [llvm] [llvm] Add format check for MCSubtargetFeatures (PR #180943)   David Spickett via llvm-commits
• [llvm] [llvm] Add format check for MCSubtargetFeatures (PR #180943)   David Spickett via llvm-commits
• [llvm] [llvm] Add format check for MCSubtargetFeatures (PR #180943)   David Spickett via llvm-commits
• [llvm] [llvm] Add format check for MCSubtargetFeatures (PR #180943)   David Spickett via llvm-commits
• [lldb] [llvm] [lldb][Process/FreeBSDKernelCore] Add riscv64 support (PR #180670)   David Spickett via llvm-commits
• [clang] [flang] [llvm] [mlir] [polly] [CMake][LLVM] Add PCH infrastructure and LLVMSupport PCH (PR #176420)   David Truby via llvm-commits
• [clang] [flang] [llvm] [mlir] [polly] [CMake][LLVM] Add PCH infrastructure and LLVMSupport PCH (PR #176420)   David Truby via llvm-commits
• [clang] [flang] [llvm] [mlir] [polly] [CMake][LLVM] Add PCH infrastructure and LLVMSupport PCH (PR #176420)   David Truby via llvm-commits
• [clang] [compiler-rt] [llvm] Migrate llvm-profdata to Opt flag parsing (PR #177868)   David Zbarsky via llvm-commits
• [clang] [compiler-rt] [llvm] Migrate llvm-profdata to Opt flag parsing (PR #177868)   David Zbarsky via llvm-commits
• [clang] [compiler-rt] [llvm] Migrate llvm-profdata to Opt flag parsing (PR #177868)   David Zbarsky via llvm-commits
• [llvm] [WebAssembly] Incorporate SCCs into WebAssemblyFixIrreducibleControlFlow (PR #181755)   Demetrius Kanios via llvm-commits
• [llvm] [WebAssembly] Reapply "[WebAssembly] Incorporate SCCs into WebAssemblyFixIrreducibleControlFlow" (#181755) (PR #184441)   Demetrius Kanios via llvm-commits
• [llvm] [WebAssembly] Reapply "[WebAssembly] Incorporate SCCs into WebAssemblyFixIrreducibleControlFlow" (#181755) (PR #184441)   Demetrius Kanios via llvm-commits
• [llvm] [WebAssembly] Reapply "[WebAssembly] Incorporate SCCs into WebAssemblyFixIrreducibleControlFlow" (#181755) (PR #184441)   Demetrius Kanios via llvm-commits
• [llvm] [WebAssembly] Reapply "[WebAssembly] Incorporate SCCs into WebAssemblyFixIrreducibleControlFlow" (#181755) (PR #184441)   Demetrius Kanios via llvm-commits
• [llvm] [WebAssembly] Reapply "[WebAssembly] Incorporate SCCs into WebAssemblyFixIrreducibleControlFlow" (#181755) (PR #184441)   Demetrius Kanios via llvm-commits
• [llvm] [WebAssembly] Reapply "[WebAssembly] Incorporate SCCs into WebAssemblyFixIrreducibleControlFlow" (#181755) (PR #184441)   Demetrius Kanios via llvm-commits
• [llvm] [WebAssembly] Remove the `wasm-disable-fix-irreducible-control-flow-pass` switch (PR #185072)   Demetrius Kanios via llvm-commits
• [llvm] add: hidden option to disable slow wasm pass (PR #67715)   Demetrius Kanios via llvm-commits
• [llvm] [WebAssembly] Remove the `wasm-disable-fix-irreducible-control-flow-pass` switch (PR #185072)   Demetrius Kanios via llvm-commits
• [llvm] [WebAssembly] Remove the `wasm-disable-fix-irreducible-control-flow-pass` switch (PR #185072)   Demetrius Kanios via llvm-commits
• [llvm] [WebAssembly] Remove the `wasm-disable-fix-irreducible-control-flow-pass` switch (PR #185072)   Demetrius Kanios via llvm-commits
• [llvm] [WebAssembly] Remove the `wasm-disable-fix-irreducible-control-flow-pass` switch (PR #185072)   Demetrius Kanios via llvm-commits
• [llvm] [WebAssembly] Define `__funcref_call_table` in generated asm and objects (PR #180900)   Derek Schuff via llvm-commits
• [llvm] [WebAssembly] MC support for acquire-release atomics (PR #183656)   Derek Schuff via llvm-commits
• [llvm] [WebAssembly] MC support for acquire-release atomics (PR #183656)   Derek Schuff via llvm-commits
• [llvm] [WebAssembly] MC support for acquire-release atomics (PR #183656)   Derek Schuff via llvm-commits
• [llvm] [WebAssembly] MC support for acquire-release atomics (PR #183656)   Derek Schuff via llvm-commits
• [llvm] [WebAssembly] MC support for acquire-release atomics (PR #183656)   Derek Schuff via llvm-commits
• [llvm] [WebAssembly] MC support for acquire-release atomics (PR #183656)   Derek Schuff via llvm-commits
• [llvm] [WebAssembly] MC support for acquire-release atomics (PR #183656)   Derek Schuff via llvm-commits
• [llvm] [WebAssembly] MC support for acquire-release atomics (PR #183656)   Derek Schuff via llvm-commits
• [llvm] [WebAssembly] MC support for acquire-release atomics (PR #183656)   Derek Schuff via llvm-commits
• [llvm] [WebAssembly] MC support for acquire-release atomics (PR #183656)   Derek Schuff via llvm-commits
• [llvm] [WebAssembly] MC support for acquire-release atomics (PR #183656)   Derek Schuff via llvm-commits
• [llvm] [WebAssembly] MC support for acquire-release atomics (PR #183656)   Derek Schuff via llvm-commits
• [llvm] [WebAssembly] MC support for acquire-release atomics (PR #183656)   Derek Schuff via llvm-commits
• [llvm] [WebAssembly] MC support for acquire-release atomics (PR #183656)   Derek Schuff via llvm-commits
• [clang] [llvm] [WebAssembly] Support acquire-release atomics in CodeGen (PR #184900)   Derek Schuff via llvm-commits
• [clang] [llvm] [WebAssembly] Support acquire-release atomics in CodeGen (PR #184900)   Derek Schuff via llvm-commits
• [llvm] add: hidden option to disable slow wasm pass (PR #67715)   Derek Schuff via llvm-commits
• [clang] [llvm] [WebAssembly] Support acquire-release atomics in CodeGen (PR #184900)   Derek Schuff via llvm-commits
• [clang] [llvm] [HLSL][Matrix] Make Matrix InitListExprs and AST row-major order, and respect /Zpr and /Zpc in codegen (PR #182904)   Deric C. via llvm-commits
• [clang] [llvm] [HLSL] Implement HLSL `mul` function (PR #184882)   Deric C. via llvm-commits
• [clang] [llvm] [HLSL] Implement HLSL `mul` function (PR #184882)   Deric C. via llvm-commits
• [clang] [llvm] [HLSL] Implement HLSL `mul` function (PR #184882)   Deric C. via llvm-commits
• [clang] [llvm] [HLSL] Implement HLSL `mul` function (PR #184882)   Deric C. via llvm-commits
• [clang] [llvm] [HLSL] Implement HLSL `mul` function (PR #184882)   Deric C. via llvm-commits
• [clang] [llvm] [HLSL] Implement HLSL `mul` function (PR #184882)   Deric C. via llvm-commits
• [clang] [llvm] [HLSL] Implement HLSL `mul` function (PR #184882)   Deric C. via llvm-commits
• [clang] [llvm] [HLSL] Implement HLSL `mul` function (PR #184882)   Deric C. via llvm-commits
• [clang] [llvm] [HLSL] Implement HLSL `mul` function (PR #184882)   Deric C. via llvm-commits
• [clang] [llvm] [HLSL] Implement HLSL `mul` function (PR #184882)   Deric C. via llvm-commits
• [clang] [llvm] [HLSL][DirectX] Implement HLSL `mul` function and DXIL lowering of `llvm.matrix.multiply` (PR #184882)   Deric C. via llvm-commits
• [clang] [llvm] [HLSL][DirectX] Implement HLSL `mul` function and DXIL lowering of `llvm.matrix.multiply` (PR #184882)   Deric C. via llvm-commits
• [clang] [llvm] [HLSL][DirectX] Implement HLSL `mul` function and DXIL lowering of `llvm.matrix.multiply` (PR #184882)   Deric C. via llvm-commits
• [clang] [llvm] [HLSL][DirectX] Implement HLSL `mul` function and DXIL lowering of `llvm.matrix.multiply` (PR #184882)   Deric C. via llvm-commits
• [clang] [llvm] [HLSL][DirectX] Implement HLSL `mul` function and DXIL lowering of `llvm.matrix.multiply` (PR #184882)   Deric C. via llvm-commits
• [clang] [llvm] [HLSL][DirectX] Implement HLSL `mul` function and DXIL lowering of `llvm.matrix.multiply` (PR #184882)   Deric C. via llvm-commits
• [clang] [llvm] [HLSL][DirectX] Implement HLSL `mul` function and DXIL lowering of `llvm.matrix.multiply` (PR #184882)   Deric C. via llvm-commits
• [clang] [llvm] [HLSL][DirectX] Implement HLSL `mul` function and DXIL lowering of `llvm.matrix.multiply` (PR #184882)   Deric C. via llvm-commits
• [clang] [llvm] [HLSL][DirectX] Implement HLSL `mul` function and DXIL lowering of `llvm.matrix.multiply` (PR #184882)   Deric C. via llvm-commits
• [clang] [llvm] [HLSL][DirectX] Implement HLSL `mul` function and DXIL lowering of `llvm.matrix.multiply` (PR #184882)   Deric C. via llvm-commits
• [clang] [llvm] [HLSL][DirectX] Implement HLSL `mul` function and DXIL lowering of `llvm.matrix.multiply` (PR #184882)   Deric C. via llvm-commits
• [clang] [llvm] [HLSL][DirectX] Implement HLSL `mul` function and DXIL lowering of `llvm.matrix.multiply` (PR #184882)   Deric C. via llvm-commits
• [clang] [llvm] [HLSL][DirectX] Implement HLSL `mul` function and DXIL lowering of `llvm.matrix.multiply` (PR #184882)   Deric C. via llvm-commits
• [clang] [llvm] [HLSL][DirectX] Implement HLSL `mul` function and DXIL lowering of `llvm.matrix.multiply` (PR #184882)   Deric C. via llvm-commits
• [clang] [llvm] [HLSL][DirectX] Implement HLSL `mul` function and DXIL lowering of `llvm.matrix.multiply` (PR #184882)   Deric C. via llvm-commits
• [clang] [llvm] [HLSL][DirectX] Implement HLSL `mul` function and DXIL lowering of `llvm.matrix.multiply` (PR #184882)   Deric C. via llvm-commits
• [clang] [llvm] [HLSL][DirectX] Implement HLSL `mul` function and DXIL lowering of `llvm.matrix.multiply` (PR #184882)   Deric C. via llvm-commits
• [llvm] [AMDGPU] Use subtarget feature for flat offset bit width instead of arch checks (PR #183742)   Diana Picus via llvm-commits
• [llvm] [AMDGPU] Use subtarget feature for flat offset bit width instead of arch checks (PR #183742)   Diana Picus via llvm-commits
• [llvm] [AMDGPU] Use subtarget feature for flat offset bit width instead of arch checks (PR #183742)   Diana Picus via llvm-commits
• [llvm] [AMDGPU] Make chain functions receive a stack pointer (PR #184616)   Diana Picus via llvm-commits
• [llvm] [AMDGPU] Make chain functions receive a stack pointer (PR #184616)   Diana Picus via llvm-commits
• [llvm] [AMDGPU] Make chain functions receive a stack pointer (PR #184616)   Diana Picus via llvm-commits
• [llvm] [AMDGPU] Make chain functions receive a stack pointer (PR #184616)   Diana Picus via llvm-commits
• [llvm] [AMDGPU] Make chain functions receive a stack pointer (PR #184616)   Diana Picus via llvm-commits
• [llvm] [AMDGPU] Make chain functions receive a stack pointer (PR #184616)   Diana Picus via llvm-commits
• [llvm] [AMDGPU] ISel & PEI for whole wave functions (PR #145858)   Diana Picus via llvm-commits
• [lld] [LLD][ELF][RISCV] Support big-endian RISC-V linking (PR #180912)   Djordje Todorovic via llvm-commits
• [llvm] [ADT] Refine MutableArrayRef forwarding constructor constraints (PR #183806)   Dmitrii Makarenko via llvm-commits
• [llvm] [ADT] Refine MutableArrayRef forwarding constructor constraints (PR #183806)   Dmitrii Makarenko via llvm-commits
• [llvm] [ADT] Refine MutableArrayRef forwarding constructor constraints (PR #183806)   Dmitrii Makarenko via llvm-commits
• [llvm] [ADT] Refine MutableArrayRef forwarding constructor constraints (PR #183806)   Dmitrii Makarenko via llvm-commits
• [llvm] [ADT] Refine MutableArrayRef forwarding constructor constraints (PR #183806)   Dmitrii Makarenko via llvm-commits
• [llvm] [ADT] Refine MutableArrayRef forwarding constructor constraints (PR #183806)   Dmitrii Makarenko via llvm-commits
• [llvm] [ADT] Refine MutableArrayRef forwarding constructor constraints (PR #183806)   Dmitrii Makarenko via llvm-commits
• [llvm] [libsycl] Add sycl::queue stub (PR #184110)   Dmitry Rogozhkin via llvm-commits
• [llvm] [SPIR-V] Don't consider a function be a builtin just by checking name (PR #182776)   Dmitry Sidorov via llvm-commits
• [llvm] [SPIR-V] Don't consider a function be a builtin just by checking name (PR #182776)   Dmitry Sidorov via llvm-commits
• [llvm] [SPIR-V] Don't consider a function be a builtin just by checking name (PR #182776)   Dmitry Sidorov via llvm-commits
• [llvm] [SPIR-V] Don't consider a function be a builtin just by checking name (PR #182776)   Dmitry Sidorov via llvm-commits
• [llvm] [SelectionDAG] Add expansion for llvm.convert.from.arbitrary.fp (PR #179318)   Dmitry Sidorov via llvm-commits
• [llvm] [SPIR-V] Don't consider a function be a builtin just by checking name (PR #182776)   Dmitry Sidorov via llvm-commits
• [llvm] [SPIR-V] Add lowering of ptrtoaddr (PR #184577)   Dmitry Sidorov via llvm-commits
• [llvm] [SPIR-V] Add lowering of ptrtoaddr (PR #184577)   Dmitry Sidorov via llvm-commits
• [llvm] [SPIR-V] Add lowering of ptrtoaddr (PR #184577)   Dmitry Sidorov via llvm-commits
• [llvm] [SPIR-V] Add lowering of ptrtoaddr (PR #184577)   Dmitry Sidorov via llvm-commits
• [llvm] [SPIR-V] Add lowering of ptrtoaddr (PR #184577)   Dmitry Sidorov via llvm-commits
• [llvm] [SPIR-V] Add lowering of ptrtoaddr (PR #184577)   Dmitry Sidorov via llvm-commits
• [llvm] [SPIR-V] Add lowering of ptrtoaddr (PR #184577)   Dmitry Sidorov via llvm-commits
• [llvm] [SPIR-V] Add lowering of ptrtoaddr (PR #184577)   Dmitry Sidorov via llvm-commits
• [llvm] [SPIR-V] Add lowering of ptrtoaddr (PR #184577)   Dmitry Sidorov via llvm-commits
• [llvm] [SPIR-V] Add lowering of ptrtoaddr (PR #184577)   Dmitry Sidorov via llvm-commits
• [llvm] [SPIR-V] Add lowering of ptrtoaddr (PR #184577)   Dmitry Sidorov via llvm-commits
• [llvm] [SPIR-V] Add lowering of ptrtoaddr (PR #184577)   Dmitry Sidorov via llvm-commits
• [llvm] [SPIR-V] Complete SPV_INTEL_16bit_atomics extension support (PR #184312)   Dmitry Sidorov via llvm-commits
• [llvm] [SPIR-V] Complete SPV_INTEL_16bit_atomics extension support (PR #184312)   Dmitry Sidorov via llvm-commits
• [llvm] [SPIR-V] Add lowering of ptrtoaddr (PR #184577)   Dmitry Sidorov via llvm-commits
• [llvm] [SPIR-V] Add lowering of ptrtoaddr (PR #184577)   Dmitry Sidorov via llvm-commits
• [llvm] [SPIR-V] Add lowering of ptrtoaddr (PR #184577)   Dmitry Sidorov via llvm-commits
• [llvm] [SPIR-V] Add lowering of ptrtoaddr (PR #184577)   Dmitry Sidorov via llvm-commits
• [llvm] [SPIR-V] Add lowering of ptrtoaddr (PR #184577)   Dmitry Sidorov via llvm-commits
• [llvm] [SPIR-V] Complete SPV_INTEL_16bit_atomics extension support (PR #184312)   Dmitry Sidorov via llvm-commits
• [llvm] [SPIR-V] Add lowering of ptrtoaddr (PR #184577)   Dmitry Sidorov via llvm-commits
• [llvm] [SPIR-V] Add lowering of ptrtoaddr (PR #184577)   Dmitry Sidorov via llvm-commits
• [llvm] [SPIR-V] Add lowering of ptrtoaddr (PR #184577)   Dmitry Sidorov via llvm-commits
• [llvm] [SelectionDAG] Fix -Wunused-variable after #179318 (PR #184623)   Dmitry Sidorov via llvm-commits
• [llvm] [SPIRV][Debug Info] DebugCompilationUnit refactor for DebugFunction support (PR #183117)   Dmitry Sidorov via llvm-commits
• [llvm] [SPIRV] Add support for arbitrary-precision integers larger than 64 bits in SPIR-V backend (PR #161270)   Dmitry Sidorov via llvm-commits
• [llvm] [SPIR-V] Scalarize vector of pointers for ptrtoint/inttoptr (PR #184817)   Dmitry Sidorov via llvm-commits
• [llvm] [SPIR-V] Scalarize vector of pointers for ptrtoint/inttoptr (PR #184817)   Dmitry Sidorov via llvm-commits
• [llvm] [SPIR-V] Scalarize vector of pointers for ptrtoint/inttoptr (PR #184817)   Dmitry Sidorov via llvm-commits
• [llvm] [SPIR-V] Scalarize vector of pointers for ptrtoint/inttoptr (PR #184817)   Dmitry Sidorov via llvm-commits
• [llvm] [SPIR-V] Scalarize vector of pointers for ptrtoint/inttoptr (PR #184817)   Dmitry Sidorov via llvm-commits
• [llvm] [SPIR-V] Fix lowering of declarations with hidden visibility (PR #185029)   Dmitry Sidorov via llvm-commits
• [llvm] [SPIR-V] Fix lowering of declarations with hidden visibility (PR #185029)   Dmitry Sidorov via llvm-commits
• [llvm] [SPIR-V] Fix lowering of declarations with hidden visibility (PR #185029)   Dmitry Sidorov via llvm-commits
• [llvm] [SPIR-V] Fix lowering of declarations with hidden visibility (PR #185029)   Dmitry Sidorov via llvm-commits
• [llvm] [NFC][SPIRV] Rename files from `SPV_INTEL_arbitrary_precision_integers/floating` to `SPV_ALTERA_arbitrary_precision_integers/floating` (PR #184996)   Dmitry Sidorov via llvm-commits
• [clang] [compiler-rt] [tsan] Add simulation to TSAN (PR #183200)   Dmitry Vyukov via llvm-commits
• [flang] [llvm] [flang-rt] Remove experiemental OpenMP offloading support (PR #183653)   Dominik Adamski via llvm-commits
• [clang] [llvm] [SystemZ] Global Stackprotector and associated location section (PR #169317)   Dominik Steenken via llvm-commits
• [clang] [llvm] [SystemZ] Global Stackprotector and associated location section (PR #169317)   Dominik Steenken via llvm-commits
• [clang] [llvm] [SystemZ] Global Stackprotector and associated location section (PR #169317)   Dominik Steenken via llvm-commits
• [clang] [llvm] [SystemZ] Global Stackprotector and associated location section (PR #169317)   Dominik Steenken via llvm-commits
• [clang] [llvm] [SystemZ] Global Stackprotector and associated location section (PR #169317)   Dominik Steenken via llvm-commits
• [clang] [llvm] [SystemZ] Global Stackprotector and associated location section (PR #169317)   Dominik Steenken via llvm-commits
• [clang] [llvm] [SystemZ] Global Stackprotector and associated location section (PR #169317)   Dominik Steenken via llvm-commits
• [clang] [llvm] [SystemZ] Global Stackprotector and associated location section (PR #169317)   Dominik Steenken via llvm-commits
• [clang] [llvm] [SystemZ] Global Stackprotector and associated location section (PR #169317)   Dominik Steenken via llvm-commits
• [clang] [llvm] [SystemZ] Global Stackprotector and associated location section (PR #169317)   Dominik Steenken via llvm-commits
• [clang] [llvm] [SystemZ] Global Stackprotector and associated location section (PR #169317)   Dominik Steenken via llvm-commits
• [clang] [llvm] [SystemZ] Global Stackprotector and associated location section (PR #169317)   Dominik Steenken via llvm-commits
• [clang] [llvm] [SystemZ] Global Stackprotector and associated location section (PR #169317)   Dominik Steenken via llvm-commits
• [clang] [llvm] [SystemZ] Global Stackprotector and associated location section (PR #169317)   Dominik Steenken via llvm-commits
• [clang] [llvm] [SystemZ] Global Stackprotector and associated location section (PR #169317)   Dominik Steenken via llvm-commits
• [clang] [llvm] [SystemZ] Global Stackprotector and associated location section (PR #169317)   Dominik Steenken via llvm-commits
• [llvm] [RegisterScavenging] Respect early-clobber when scavenging registers (PR #184814)   Dominik Steenken via llvm-commits
• [llvm] [RegisterScavenging] Respect early-clobber when scavenging registers (PR #184814)   Dominik Steenken via llvm-commits
• [llvm] [RegisterScavenging] Respect early-clobber when scavenging registers (PR #184814)   Dominik Steenken via llvm-commits
• [llvm] [RegisterScavenging] Respect early-clobber when scavenging registers (PR #184814)   Dominik Steenken via llvm-commits
• [llvm] [InstCombine] Modify zero-indexed GEPs in place rather than cloning (PR #185053)   Drew Kersnar via llvm-commits
• [llvm] [InstCombine] Modify zero-indexed GEPs in place rather than cloning (PR #185053)   Drew Kersnar via llvm-commits
• [llvm] [NVPTX] Merge consecutive elements while buffering constant vectors with sub-byte datatype. (PR #183628)   Durgadoss R via llvm-commits
• [llvm] [DA] Remove consistent flag from Dependence class (PR #181608)   Ehsan Amiri via llvm-commits
• [llvm] [LoopFusion] Fix crash "SCEVAddRecExpr operand is not available at loop entry (PR #176378)   Ehsan Amiri via llvm-commits
• [llvm] [DA] Fix the Weak Zero SIV tests when the coeff may be zero (PR #183736)   Ehsan Amiri via llvm-commits
• [llvm] [LoopFusion] Correction in the comments (NFC) (PR #184689)   Ehsan Amiri via llvm-commits
• [llvm] [LoopFusion] Correction in the comments (NFC) (PR #184689)   Ehsan Amiri via llvm-commits
• [llvm] [LoopFusion] Correction in the comments (NFC) (PR #184689)   Ehsan Amiri via llvm-commits
• [llvm] [LoopFusion] Correction in the comments (NFC) (PR #184689)   Ehsan Amiri via llvm-commits
• [llvm] [LoopFusion] Correction in the comments (NFC) (PR #184689)   Ehsan Amiri via llvm-commits
• [llvm] [LoopFusion] Correction in the comments (NFC) (PR #184689)   Ehsan Amiri via llvm-commits
• [llvm] [LoopFusion] Correction in the comments (NFC) (PR #184689)   Ehsan Amiri via llvm-commits
• [llvm] [DA] Test AddRecs are nsw before strong SIV test (PR #183421)   Ehsan Amiri via llvm-commits
• [llvm] [DA] Test AddRecs are nsw before strong SIV test (PR #183421)   Ehsan Amiri via llvm-commits
• [llvm] [DA] Test AddRecs are nsw before strong SIV test (PR #183421)   Ehsan Amiri via llvm-commits
• [llvm] [DA] Test AddRecs are nsw before strong SIV test (PR #183421)   Ehsan Amiri via llvm-commits
• [llvm] [DA] Test AddRecs are nsw before strong SIV test (PR #183421)   Ehsan Amiri via llvm-commits
• [llvm] [LoopFusion] Correction in the comments (NFC) (PR #184689)   Ehsan Amiri via llvm-commits
• [llvm] [DA] Test AddRecs are nsw before strong SIV test (PR #183421)   Ehsan Amiri via llvm-commits
• [llvm] [DA] Require 'nsw' for AddRecs in the WeakCrossing SIV test (PR #185030)   Ehsan Amiri via llvm-commits
• [llvm] [DA] Require 'nsw' for AddRecs in the WeakCrossing SIV test (PR #185030)   Ehsan Amiri via llvm-commits
• [llvm] [DA] Require 'nsw' for AddRecs in the WeakCrossing SIV test (PR #185041)   Ehsan Amiri via llvm-commits
• [llvm] [DA] Test AddRecs are nsw before strong SIV test (PR #183421)   Ehsan Amiri via llvm-commits
• [llvm] [LoopFusion] Fix crash "SCEVAddRecExpr operand is not available at loop entry (PR #176378)   Ehsan Amiri via llvm-commits
• [llvm] [PowerPC] fix Inefficient std::bit_floor(x) (PR #183361)   Eli Friedman via llvm-commits
• [llvm] [LangRef] asm clobber constrains: '~memory' allows reads and synchronization (PR #150191)   Eli Friedman via llvm-commits
• [llvm] [LangRef] asm clobber constrains: '~memory' allows reads and synchronization (PR #150191)   Eli Friedman via llvm-commits
• [clang] [llvm] [ARM] Add support for Windows SEH (PR #184953)   Eli Friedman via llvm-commits
• [clang] [llvm] [ARM] Add support for Windows SEH (PR #184953)   Eli Friedman via llvm-commits
• [clang] [llvm] [ARM] Add support for Windows SEH (PR #184953)   Eli Friedman via llvm-commits
• [clang] [llvm] [ARM] Add support for Windows SEH (PR #184953)   Eli Friedman via llvm-commits
• [clang] [llvm] [ARM] Add support for Windows SEH (PR #184953)   Eli Friedman via llvm-commits
• [llvm] [RISCV] Do not tail call optimize if arguments are passed indirectly (PR #184972)   Eli Friedman via llvm-commits
• [clang] [lld] [llvm] [MTE] Improve memtag support for non-Android AArch64 targets (PR #183275)   Elia Geretto via llvm-commits
• [llvm] [ci][github][analyzer] Enable Z3 for Clang Static Analyzer on Linux (PR #184695)   Ella Ma via llvm-commits
• [lld] [lld][MachO] Add N_COLD_FUNC support (PR #183909)   Ellis Hoag via llvm-commits
• [llvm] [LV] Convert scatter w/uniform addr and mask being header mask to scalar store. (PR #172799)   Elvis Wang via llvm-commits
• [llvm] [LV] Enable CSA for RISCV EVL tail-folding with scalable vector. (PR #184068)   Elvis Wang via llvm-commits
• [llvm] [RISCV][TTI] Implement cost of llvm.experimental.vector.extract.last.active (PR #184067)   Elvis Wang via llvm-commits
• [llvm] [RISCV][TTI] Implement cost of llvm.experimental.vector.extract.last.active (PR #184067)   Elvis Wang via llvm-commits
• [llvm] [RISCV][TTI] Implement cost of llvm.experimental.vector.extract.last.active (PR #184067)   Elvis Wang via llvm-commits
• [llvm] [RISCV][TTI] Implement cost of llvm.experimental.vector.extract.last.active (PR #184067)   Elvis Wang via llvm-commits
• [llvm] [RISCV][TTI] Implement cost of llvm.experimental.vector.extract.last.active (PR #184067)   Elvis Wang via llvm-commits
• [llvm] [RISCV][TTI] Implement cost of llvm.experimental.vector.extract.last.active (PR #184067)   Elvis Wang via llvm-commits
• [llvm] [RISCV][TTI] Implement cost of llvm.experimental.vector.extract.last.active (PR #184067)   Elvis Wang via llvm-commits
• [llvm] [LV] Enable scalable FindLast on RISCV. (PR #184931)   Elvis Wang via llvm-commits
• [llvm] [RISCV][TTI] Implement cost of llvm.experimental.vector.extract.last.active (PR #184067)   Elvis Wang via llvm-commits
• [llvm] [RISCV][TTI] Implement cost of llvm.experimental.vector.extract.last.active (PR #184067)   Elvis Wang via llvm-commits
• [llvm] [RISCV][TTI] Implement cost of llvm.experimental.vector.extract.last.active (PR #184067)   Elvis Wang via llvm-commits
• [llvm] [RISCV][TTI] Implement cost of llvm.experimental.vector.extract.last.active (PR #184067)   Elvis Wang via llvm-commits
• [llvm] [bazel][mlir] Fix Bazel build for a232b5b (PR #184394)   Emmanuel Antonio via llvm-commits
• [llvm] [bazel][mlir] Fix Bazel build for a232b5b (PR #184394)   Emmanuel Antonio via llvm-commits
• [llvm] [mlir][acc] Add Dialect Utils to OpenACCDialect deps (PR #184895)   Emmanuel Antonio via llvm-commits
• [llvm] [mlir][acc] Add Dialect Utils to OpenACCDialect deps (PR #184895)   Emmanuel Antonio via llvm-commits
• [llvm] [mlir][acc] Add Dialect Utils to OpenACCDialect deps (PR #184895)   Emmanuel Antonio via llvm-commits
• [llvm] [flang-rt] Fixes EXECUTE_COMMAND_LINE() status management and double buffering (PR #184285)   Eugene Epshteyn via llvm-commits
• [llvm] [flang-rt] Fixes EXECUTE_COMMAND_LINE() status management and double buffering (PR #184285)   Eugene Epshteyn via llvm-commits
• [llvm] [flang-rt] Fixes EXECUTE_COMMAND_LINE() status management and double buffering (PR #184285)   Eugene Epshteyn via llvm-commits
• [llvm] [flang-rt] Fixes EXECUTE_COMMAND_LINE() status management and double buffering (PR #184285)   Eugene Epshteyn via llvm-commits
• [llvm] [flang-rt] Fixes EXECUTE_COMMAND_LINE() status management and double buffering (PR #184285)   Eugene Epshteyn via llvm-commits
• [llvm] [flang-rt] Fixes EXECUTE_COMMAND_LINE() status management and double buffering (PR #184285)   Eugene Epshteyn via llvm-commits
• [llvm] [flang-rt] Fixes EXECUTE_COMMAND_LINE() status management and double buffering (PR #184285)   Eugene Epshteyn via llvm-commits
• [llvm] [flang-rt] Fixes EXECUTE_COMMAND_LINE() status management and double buffering (PR #184285)   Eugene Epshteyn via llvm-commits
• [llvm] [flang-rt] Fixes EXECUTE_COMMAND_LINE() status management and double buffering (PR #184285)   Eugene Epshteyn via llvm-commits
• [llvm] [flang-rt] Fixes EXECUTE_COMMAND_LINE() status management and double buffering (PR #184285)   Eugene Epshteyn via llvm-commits
• [llvm] [flang-rt] Fixes EXECUTE_COMMAND_LINE() status management and double buffering (PR #184285)   Eugene Epshteyn via llvm-commits
• [llvm] [flang-rt] Fixes EXECUTE_COMMAND_LINE() status management and double buffering (PR #184285)   Eugene Epshteyn via llvm-commits
• [llvm] [flang-rt] Fixes EXECUTE_COMMAND_LINE() status management and double buffering (PR #184285)   Eugene Epshteyn via llvm-commits
• [llvm] [flang-rt] Fix EXECUTE_COMMAND_LINE() on Windows (PR #184875)   Eugene Epshteyn via llvm-commits
• [llvm] [flang-rt] Fix EXECUTE_COMMAND_LINE() on Windows (PR #184875)   Eugene Epshteyn via llvm-commits
• [clang] [flang] [llvm] [flang] Add runtime trampoline pool for W^X compliance (PR #183108)   Eugene Epshteyn via llvm-commits
• [llvm] [X86][GlobalISel] Ignore non-vregs in regbank mapping (PR #182880)   Evgenii Kudriashov via llvm-commits
• [llvm] [X86][GlobalISel] Ignore non-vregs in regbank mapping (PR #182880)   Evgenii Kudriashov via llvm-commits
• [llvm] [X86][GISel] Add initial tests for x86 postleg combiner (PR #183844)   Evgenii Kudriashov via llvm-commits
• [llvm] [MC,CodeGen] Update .prefalign for symbol-based preferred alignment (PR #184032)   Fangrui Song via llvm-commits
• [lld] [ELF] Move target-specific synthetic sections into Arch/ files (PR #184057)   Fangrui Song via llvm-commits
• [lld] [ELF] Move target-specific synthetic sections into Arch/ files (PR #184057)   Fangrui Song via llvm-commits
• [lld] [lld] update maintainers (PR #183803)   Fangrui Song via llvm-commits
• [llvm] [MC] Fix quadratic runtime within alignment boundary fragment relaxation (PR #176535)   Fangrui Song via llvm-commits
• [llvm] [MC] Fix quadratic runtime within alignment boundary fragment relaxation (PR #176535)   Fangrui Song via llvm-commits
• [llvm] [MC] Fix quadratic runtime within alignment boundary fragment relaxation (PR #176535)   Fangrui Song via llvm-commits
• [llvm] [MC] Fix quadratic runtime within alignment boundary fragment relaxation (PR #176535)   Fangrui Song via llvm-commits
• [llvm] [MC] Fix quadratic runtime within alignment boundary fragment relaxation (PR #176535)   Fangrui Song via llvm-commits
• [llvm] [MC] Fix quadratic runtime within alignment boundary fragment relaxation (PR #176535)   Fangrui Song via llvm-commits
• [llvm] [MC] Fix quadratic runtime within alignment boundary fragment relaxation (PR #176535)   Fangrui Song via llvm-commits
• [llvm] [MC] Fix quadratic runtime within alignment boundary fragment relaxation (PR #176535)   Fangrui Song via llvm-commits
• [llvm] [MC] Fix quadratic runtime within alignment boundary fragment relaxation (PR #176535)   Fangrui Song via llvm-commits
• [llvm] [MC] Fix quadratic runtime within alignment boundary fragment relaxation (PR #176535)   Fangrui Song via llvm-commits
• [llvm] [MC,CodeGen] Update .prefalign for symbol-based preferred alignment (PR #184032)   Fangrui Song via llvm-commits
• [llvm] [MC,CodeGen] Update .prefalign for symbol-based preferred alignment (PR #184032)   Fangrui Song via llvm-commits
• [lld] [ELF] Move PPC32Got2Section into Arch/PPC.cpp (PR #184383)   Fangrui Song via llvm-commits
• [lld] [ELF] Move PPC32Got2Section into Arch/PPC.cpp (PR #184383)   Fangrui Song via llvm-commits
• [llvm] [MC] Fuse relaxation and layout into a single forward pass (PR #184544)   Fangrui Song via llvm-commits
• [llvm] [MC] Fix quadratic runtime within alignment boundary fragment relaxation (PR #176535)   Fangrui Song via llvm-commits
• [llvm] [MC][test] Add relax-branch-align.s demonstrating unnecessary branch relaxation (PR #184551)   Fangrui Song via llvm-commits
• [llvm] [MC][test] Add relax-branch-align.s demonstrating unnecessary branch relaxation (PR #184551)   Fangrui Song via llvm-commits
• [llvm] [MC][test] Add relax-branch-align.s demonstrating unnecessary branch relaxation (PR #184551)   Fangrui Song via llvm-commits
• [llvm] [MC][test] Add relax-branch-align.s demonstrating unnecessary branch relaxation (PR #184551)   Fangrui Song via llvm-commits
• [llvm] [MC] Fuse relaxation and layout into a single forward pass (PR #184544)   Fangrui Song via llvm-commits
• [llvm] [MC] Fuse relaxation and layout into a single forward pass (PR #184544)   Fangrui Song via llvm-commits
• [lld] [ELF] Add target-specific relocation scanning for LoongArch (PR #182236)   Fangrui Song via llvm-commits
• [lld] [ELF] Add target-specific relocation scanning for LoongArch (PR #182236)   Fangrui Song via llvm-commits
• [clang] [llvm] [X86] support reserve r8~r15 on X86_64 (PR #180242)   Fangrui Song via llvm-commits
• [llvm] [MC] Fuse relaxation and layout into a single forward pass (PR #184544)   Fangrui Song via llvm-commits
• [llvm] [MC,CodeGen] Update .prefalign for symbol-based preferred alignment (PR #184032)   Fangrui Song via llvm-commits
• [llvm] [MC,CodeGen] Update .prefalign for symbol-based preferred alignment (PR #184032)   Fangrui Song via llvm-commits
• [lld] [ELF] Move ArmCmseSGSection into Arch/ARM.cpp (PR #184570)   Fangrui Song via llvm-commits
• [lld] [ELF] Move ArmCmseSGSection into Arch/ARM.cpp (PR #184570)   Fangrui Song via llvm-commits
• [lld] [ELF] Move ArmCmseSGSection into Arch/ARM.cpp (PR #184570)   Fangrui Song via llvm-commits
• [lld] [ELF] Add target-specific relocation scanning for RISC-V (PR #181332)   Fangrui Song via llvm-commits
• [llvm] [llvm][support] Refactor symlink handling and add readlink (PR #184256)   Fangrui Song via llvm-commits
• [clang] [lld] [llvm] [llvm][lld][clang] Delay initializing TargetOptions in LTO builds until a Triple is available (PR #179509)   Fangrui Song via llvm-commits
• [clang] [lld] [llvm] [llvm][lld][clang] Delay initializing TargetOptions in LTO builds until a Triple is available (PR #179509)   Fangrui Song via llvm-commits
• [clang] [lld] [llvm] [llvm][lld][clang] Delay initializing TargetOptions in LTO builds until a Triple is available (PR #179509)   Fangrui Song via llvm-commits
• [llvm] [llvm-objdump] Default --symbolize-operands for BPF (PR #184043)   Fangrui Song via llvm-commits
• [llvm] [llvm-objdump] Default --symbolize-operands for BPF (PR #184043)   Fangrui Song via llvm-commits
• [llvm] [llvm-objdump] Default --symbolize-operands for BPF (PR #184043)   Fangrui Song via llvm-commits
• [llvm] [MC] Merge fixupNeedsRelaxation and fixupNeedsRelaxationAdvanced. NFC (PR #184832)   Fangrui Song via llvm-commits
• [llvm] [MC] Merge fixupNeedsRelaxation and fixupNeedsRelaxationAdvanced. NFC (PR #184832)   Fangrui Song via llvm-commits
• [lld] [ELF] Add target-specific relocation scanning for RISC-V (PR #181332)   Fangrui Song via llvm-commits
• [lld] [ELF] Add target-specific relocation scanning for RISC-V (PR #181332)   Fangrui Song via llvm-commits
• [lld] [ELF] Add target-specific relocation scanning for RISC-V (PR #181332)   Fangrui Song via llvm-commits
• [lld] [lld][ELF] Fix crash when relaxation pass encounters synthetic sections (PR #184758)   Fangrui Song via llvm-commits
• [lld] [lld][ELF] Fix crash when relaxation pass encounters synthetic sections (PR #184758)   Fangrui Song via llvm-commits
• [lld] [lld][ELF] Fix crash when relaxation pass encounters synthetic sections (PR #184758)   Fangrui Song via llvm-commits
• [lld] [lld][ELF] Fix crash when relaxation pass encounters synthetic sections (PR #184758)   Fangrui Song via llvm-commits
• [lld] [lld][ELF] Fix crash when relaxation pass encounters synthetic sections (PR #184758)   Fangrui Song via llvm-commits
• [lld] [lld][ELF] Fix crash when relaxation pass encounters synthetic sections (PR #184758)   Fangrui Song via llvm-commits
• [lld] [lld][ELF] Fix crash when relaxation pass encounters synthetic sections (PR #184758)   Fangrui Song via llvm-commits
• [lld] [ELF] Remove unused handleTlsRelocation (PR #184951)   Fangrui Song via llvm-commits
• [lld] [lld][ELF] Fix crash when relaxation pass encounters synthetic sections (PR #184758)   Fangrui Song via llvm-commits
• [lld] [lld][ELF] Fix crash when relaxation pass encounters synthetic sections (PR #184758)   Fangrui Song via llvm-commits
• [lld] [lld][ELF] Fix crash when relaxation pass encounters synthetic sections (PR #184758)   Fangrui Song via llvm-commits
• [llvm] [AMDGPU] Documentation files for GFX950 instructions (PR #184710)   Fangrui Song via llvm-commits
• [lld] [ELF] Add target-specific relocation scanning for x86 (PR #178846)   Fangrui Song via llvm-commits
• [lldb] [llvm] [MC] Move MCTargetOptions pointer from MCContext to MCAsmInfo (PR #180464)   Fangrui Song via llvm-commits
• [llvm] [llvm/mc] Add support for sdata8 for FDE CIE (PR #174508)   Fangrui Song via llvm-commits
• [llvm] [llvm/mc] Add support for sdata8 for FDE CIE (PR #174508)   Fangrui Song via llvm-commits
• [llvm] [MC] Rename getPrivateGlobalPrefix to getInternalSymbolPrefix. NFC (PR #185164)   Fangrui Song via llvm-commits
• [llvm] [MC] Rename getPrivateGlobalPrefix to getInternalSymbolPrefix. NFC (PR #185164)   Fangrui Song via llvm-commits
• [llvm] [MC] Rename PrivateGlobalPrefix to InternalSymbolPrefix. NFC (PR #185164)   Fangrui Song via llvm-commits
• [llvm] [MC] Rename PrivateGlobalPrefix to InternalSymbolPrefix. NFC (PR #185164)   Fangrui Song via llvm-commits
• [llvm] [llvm] Prefer the unknown vendor for SerenityOS triples (PR #185026)   Fangrui Song via llvm-commits
• [llvm] [llvm] Prefer the unknown vendor for SerenityOS triples (PR #185026)   Fangrui Song via llvm-commits
• [lld] [lld] clang-format sources (PR #183805)   Fangrui Song via llvm-commits
• [llvm] [X86] Fix wrong RIP-relative relocations for AVX10.2 saturation conversions (PR #185254)   Fangrui Song via llvm-commits
• [llvm] [X86] Fix wrong RIP-relative relocations for AVX10.2 saturation conversions (PR #185254)   Fangrui Song via llvm-commits
• [llvm] [X86] Fix wrong RIP-relative relocations for AVX10.2 saturation conversions (PR #185254)   Fangrui Song via llvm-commits
• [llvm] [X86] Fix wrong RIP-relative relocations for AVX10.2 saturation conversions (PR #185254)   Fangrui Song via llvm-commits
• [lld] [lld] clang-format sources (PR #183805)   Farid Zakaria via llvm-commits
• [llvm] [llvm/mc] Add support for sdata8 for FDE CIE (PR #174508)   Farid Zakaria via llvm-commits
• [llvm] [llvm/mc] Add support for sdata8 for FDE CIE (PR #174508)   Farid Zakaria via llvm-commits
• [llvm] [NFC][SPIRV] Rename `selectSelectDefaultArgs` to `selectExtendBool` (PR #184120)   Farzon Lotfi via llvm-commits
• [llvm] [NFC][SPIRV] Rename `selectSelectDefaultArgs` to `selectExtendBool` (PR #184120)   Farzon Lotfi via llvm-commits
• [llvm] [NFC][SPIRV] Rename `selectSelectDefaultArgs` to `selectBoolToInt` (PR #184120)   Farzon Lotfi via llvm-commits
• [llvm] [NFC][SPIRV] Rename `selectSelectDefaultArgs` to `selectBoolToInt` (PR #184120)   Farzon Lotfi via llvm-commits
• [clang] [llvm] [HLSL][DXIL][SPRIV] Added WaveActiveProduct intrinsic (PR #184645)   Farzon Lotfi via llvm-commits
• [clang] [llvm] [HLSL][DXIL][SPRIV] Added WaveActiveProduct intrinsic (PR #184645)   Farzon Lotfi via llvm-commits
• [clang] [llvm] [HLSL] Implement HLSL `mul` function (PR #184882)   Farzon Lotfi via llvm-commits
• [clang] [llvm] [HLSL] Implement HLSL `mul` function (PR #184882)   Farzon Lotfi via llvm-commits
• [clang] [llvm] [HLSL][DirectX] Implement HLSL `mul` function and DXIL lowering of `llvm.matrix.multiply` (PR #184882)   Farzon Lotfi via llvm-commits
• [clang] [llvm] [HLSL][DirectX] Implement HLSL `mul` function and DXIL lowering of `llvm.matrix.multiply` (PR #184882)   Farzon Lotfi via llvm-commits
• [clang] [llvm] [HLSL][DirectX] Implement HLSL `mul` function and DXIL lowering of `llvm.matrix.multiply` (PR #184882)   Farzon Lotfi via llvm-commits
• [clang] [llvm] [HLSL][DirectX] Implement HLSL `mul` function and DXIL lowering of `llvm.matrix.multiply` (PR #184882)   Farzon Lotfi via llvm-commits
• [clang] [llvm] [HLSL][DirectX] Implement HLSL `mul` function and DXIL lowering of `llvm.matrix.multiply` (PR #184882)   Farzon Lotfi via llvm-commits
• [clang] [llvm] [HLSL][DirectX] Implement HLSL `mul` function and DXIL lowering of `llvm.matrix.multiply` (PR #184882)   Farzon Lotfi via llvm-commits
• [clang] [llvm] [HLSL][DXIL][SPRIV] Added WaveActiveProduct intrinsic (PR #184645)   Farzon Lotfi via llvm-commits
• [llvm] [Hexagon] Add new register input/output types for qf instructions (PR #184398)   Fateme Hosseini via llvm-commits
• [llvm] [Hexagon] Add new register input/output types for qf instructions (PR #184398)   Fateme Hosseini via llvm-commits
• [llvm] [Hexagon] Add new register input/output types for qf instructions (PR #184398)   Fateme Hosseini via llvm-commits
• [llvm] [DirectX][ResourceAccess] Resolve resource handles at access (PR #182106)   Finn Plummer via llvm-commits
• [llvm] [Analysis][DXILResource] Correct bound computation (PR #184198)   Finn Plummer via llvm-commits
• [llvm] [Analysis][DXILResource] Correct bound computation (PR #184198)   Finn Plummer via llvm-commits
• [llvm] [DirectX] Mark `dx.resource.getpointer` as convergent (PR #182099)   Finn Plummer via llvm-commits
• [llvm] [NFC][LV]: Differentiate between Pred and Unpred masked operations. (PR #169509)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Optimize resume values of IVs together with other exit values. (PR #174239)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Optimize resume values of IVs together with other exit values. (PR #174239)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Don't use the legacy cost model for loop conditions (PR #156864)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Don't use the legacy cost model for loop conditions (PR #156864)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Don't use the legacy cost model for loop conditions (PR #156864)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Materialize VectorTripCount in narrowInterleaveGroups. (PR #182146)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Materialize VectorTripCount in narrowInterleaveGroups. (PR #182146)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Materialize VectorTripCount in narrowInterleaveGroups. (PR #182146)   Florian Hahn via llvm-commits
• [llvm] [LV] Support float and pointer conditional scalar assignments (PR #184101)   Florian Hahn via llvm-commits
• [llvm] [LV] Support float and pointer conditional scalar assignments (PR #184101)   Florian Hahn via llvm-commits
• [llvm] [LV] Support float and pointer conditional scalar assignments (PR #184101)   Florian Hahn via llvm-commits
• [llvm] Revert "[VPlan] Remove unused VPExpandSCEVRecipe before expansion" (PR #184108)   Florian Hahn via llvm-commits
• [llvm] [LV] Remove DataAndControlFlowWithoutRuntimeCheck. NFC (PR #183762)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Replicate VPScalarIVStepsRecipe by VF outside replicate regions. (PR #170053)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Optimize resume values of IVs together with other exit values. (PR #174239)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Optimize resume values of IVs together with other exit values. (PR #174239)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Optimize resume values of IVs together with other exit values. (PR #174239)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Optimize resume values of IVs together with other exit values. (PR #174239)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Optimize resume values of IVs together with other exit values. (PR #174239)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Replicate VPScalarIVStepsRecipe by VF outside replicate regions. (PR #170053)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Replicate VPScalarIVStepsRecipe by VF outside replicate regions. (PR #170053)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Replicate VPScalarIVStepsRecipe by VF outside replicate regions. (PR #170053)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Replicate VPScalarIVStepsRecipe by VF outside replicate regions. (PR #170053)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Replicate VPScalarIVStepsRecipe by VF outside replicate regions. (PR #170053)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Replicate VPScalarIVStepsRecipe by VF outside replicate regions. (PR #170053)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Replicate VPScalarIVStepsRecipe by VF outside replicate regions. (PR #170053)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Replicate VPScalarIVStepsRecipe by VF outside replicate regions. (PR #170053)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Optimize resume values of IVs together with other exit values. (PR #174239)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Optimize resume values of IVs together with other exit values. (PR #174239)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Optimize resume values of IVs together with other exit values. (PR #174239)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Factor collectGroupedReplicateMemOps (NFCI) (PR #179506)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Materialize VectorTripCount in narrowInterleaveGroups. (PR #182146)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Materialize VectorTripCount in narrowInterleaveGroups. (PR #182146)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Materialize VectorTripCount in narrowInterleaveGroups. (PR #182146)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Materialize VectorTripCount in narrowInterleaveGroups. (PR #182146)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Materialize VectorTripCount in narrowInterleaveGroups. (PR #182146)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Materialize VectorTripCount in narrowInterleaveGroups. (PR #182146)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Materialize VectorTripCount in narrowInterleaveGroups. (PR #182146)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Materialize VectorTripCount in narrowInterleaveGroups. (PR #182146)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Materialize VectorTripCount in narrowInterleaveGroups. (PR #182146)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Introduce VPlan::get(Zero|AllOnes) (NFC) (PR #184085)   Florian Hahn via llvm-commits
• [llvm] [LAA] Always use DepCands when grouping runtime checks. (PR #91196)   Florian Hahn via llvm-commits
• [llvm] [LAA] Always use DepCands when grouping runtime checks. (PR #91196)   Florian Hahn via llvm-commits
• [llvm] [LoopAccessAnalysis] Fix type mismatch (PR #183116)   Florian Hahn via llvm-commits
• [llvm] [VPlan][NFC] Remove unnecessary explicit copy constructors (PR #183863)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Optimize FindLast of (binop %IV, live-in) by sinking. (PR #183911)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Optimize FindLast of (binop %IV, live-in) by sinking. (PR #183911)   Florian Hahn via llvm-commits
• [llvm] [AArch64] Limit support to f32 and f64 in performSelectCombine (PR #184315)   Florian Hahn via llvm-commits
• [llvm] [LV] Add `-force-target-supports-masked-memory-ops` option (PR #184325)   Florian Hahn via llvm-commits
• [llvm] [LV] Add `-force-target-supports-masked-memory-ops` option (PR #184325)   Florian Hahn via llvm-commits
• [llvm] [LV] Add support for partial alias masking with tail folding (PR #182457)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Preserve IsSingleScalar for sunken predicated stores. (PR #184329)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Preserve IsSingleScalar for sunken predicated stores. (PR #184329)   Florian Hahn via llvm-commits
• [llvm] [LV] Transform tests for early-exit with stores (PR #183288)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Preserve IsSingleScalar for sunken predicated stores. (PR #184329)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Preserve IsSingleScalar for sunken predicated stores. (PR #184329)   Florian Hahn via llvm-commits
• [llvm] [polly] [SCEV] Introduce SCEVUse, use it instead of const SCEV * (NFCI). (PR #91961)   Florian Hahn via llvm-commits
• [llvm] [IVDescriptors] Reject FindLast candidates with loop invariant conditions (PR #184340)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Preserve IsSingleScalar for sunken predicated stores. (PR #184329)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Replicate VPScalarIVStepsRecipe by VF outside replicate regions. (PR #170053)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Replicate VPScalarIVStepsRecipe by VF outside replicate regions. (PR #170053)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Replicate VPScalarIVStepsRecipe by VF outside replicate regions. (PR #170053)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Replicate VPScalarIVStepsRecipe by VF outside replicate regions. (PR #170053)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Replicate VPScalarIVStepsRecipe by VF outside replicate regions. (PR #170053)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Preserve IsSingleScalar for sunken predicated stores. (PR #184329)   Florian Hahn via llvm-commits
• [llvm] [LV] Add `-force-target-supports-masked-memory-ops` option (PR #184325)   Florian Hahn via llvm-commits
• [llvm] [LV] Support float and pointer conditional scalar assignments (PR #184101)   Florian Hahn via llvm-commits
• [llvm] [LV] Transform tests for early-exit with stores (PR #183288)   Florian Hahn via llvm-commits
• [llvm] [LV] Use make_early_inc_range in handleFindLastReductions (PR #184340)   Florian Hahn via llvm-commits
• [llvm] [LV] Use make_early_inc_range in handleFindLastReductions (PR #184340)   Florian Hahn via llvm-commits
• [llvm] [LV] Add `-force-target-supports-masked-memory-ops` option (PR #184325)   Florian Hahn via llvm-commits
• [llvm] [VPlan][NFC] Remove unnecessary explicit copy constructors (PR #183863)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Replicate VPScalarIVStepsRecipe by VF outside replicate regions. (PR #170053)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Use bitfield to store Cmp predicates and GEP wrap flags. (NFC) (PR #181571)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Explicitly check for wide IV in optimizeFindIVReductions. (PR #184437)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Explicitly check for wide IV in optimizeFindIVReductions. (PR #184437)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Explicitly check for wide IV in optimizeFindIVReductions. (PR #184437)   Florian Hahn via llvm-commits
• [llvm] [LV] Add `-force-target-supports-masked-memory-ops` option (PR #184325)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Optimize FindLast of (binop %IV, live-in) by sinking. (PR #183911)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Optimize FindLast of (binop %IV, live-in) by sinking. (PR #183911)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Preserve IsSingleScalar for hoisted predicated load. (PR #184453)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Optimize FindLast of (binop %IV, live-in) by sinking. (PR #183911)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Optimize FindLast of (binop %IV, live-in) by sinking. (PR #183911)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Optimize FindLast of (binop %IV, live-in) by sinking. (PR #183911)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Optimize FindLast of (binop %IV, live-in) by sinking. (PR #183911)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Optimize FindLast of (binop %IV, live-in) by sinking. (PR #183911)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Optimize FindLast of (binop %IV, live-in) by sinking. (PR #183911)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Optimize FindLast of (binop %IV, live-in) by sinking. (PR #183911)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Optimize FindLast of (binop %IV, live-in) by sinking. (PR #183911)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Optimize FindLast of (binop %IV, live-in) by sinking. (PR #183911)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Optimize FindLast of (binop %IV, live-in) by sinking. (PR #183911)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Optimize FindLast of (binop %IV, live-in) by sinking. (PR #183911)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Optimize FindLast of (binop %IV, live-in) by sinking. (PR #183911)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Optimize FindLast of (binop %IV, live-in) by sinking. (PR #183911)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Optimize FindLast of (binop %IV, live-in) by sinking. (PR #183911)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Fix partially uninitialized accesses after 17aaa0e590a7. (PR #184583)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Fix partially uninitialized accesses after 17aaa0e590a7. (PR #184583)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Use bitfield to store Cmp predicates and GEP wrap flags. (NFC) (PR #181571)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Add disable-output to tests using vplan-print-after. (PR #184586)   Florian Hahn via llvm-commits
• [llvm] [LoopAccessAnalysis] Fix type mismatch (PR #183116)   Florian Hahn via llvm-commits
• [llvm] [LV] Add `-force-target-supports-masked-memory-ops` option (PR #184325)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Preserve IsSingleScalar for hoisted predicated load. (PR #184453)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Preserve IsSingleScalar for hoisted predicated load. (PR #184453)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Optimize resume values of IVs together with other exit values. (PR #174239)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Optimize resume values of IVs together with other exit values. (PR #174239)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Optimize resume values of IVs together with other exit values. (PR #174239)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Optimize resume values of IVs together with other exit values. (PR #174239)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Optimize resume values of IVs together with other exit values. (PR #174239)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Optimize resume values of IVs together with other exit values. (PR #174239)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Optimize resume values of IVs together with other exit values. (PR #174239)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Preserve IsSingleScalar for hoisted predicated load. (PR #184453)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Preserve IsSingleScalar for hoisted predicated load. (PR #184453)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Replicate VPScalarIVStepsRecipe by VF outside replicate regions. (PR #170053)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Replicate VPScalarIVStepsRecipe by VF outside replicate regions. (PR #170053)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Replicate VPScalarIVStepsRecipe by VF outside replicate regions. (PR #170053)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Replicate VPScalarIVStepsRecipe by VF outside replicate regions. (PR #170053)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Replicate VPScalarIVStepsRecipe by VF outside replicate regions. (PR #170053)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Replicate VPScalarIVStepsRecipe by VF outside replicate regions. (PR #170053)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Replicate VPScalarIVStepsRecipe by VF outside replicate regions. (PR #170053)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Move tail folding out of VPlanPredicator. NFC (PR #176143)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Move tail folding out of VPlanPredicator. NFC (PR #176143)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Move tail folding out of VPlanPredicator. NFC (PR #176143)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Move tail folding out of VPlanPredicator. NFC (PR #176143)   Florian Hahn via llvm-commits
• [llvm] [LV] Support float and pointer conditional scalar assignments (PR #184101)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Use VPlan::getZero to improve code (NFC) (PR #184591)   Florian Hahn via llvm-commits
• [llvm] [polly] [SCEV] Introduce SCEVUse, use it instead of const SCEV * (NFCI). (PR #91961)   Florian Hahn via llvm-commits
• [llvm] [polly] [SCEV] Introduce SCEVUse, use it instead of const SCEV * (NFCI). (PR #91961)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Use pragma pack(1) for VPIRFlags on AIX. (PR #184687)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Use pragma pack(1) for VPIRFlags on AIX. (PR #184687)   Florian Hahn via llvm-commits
• [llvm] [LV] Support interleaving with FindLast reductions (PR #184099)   Florian Hahn via llvm-commits
• [llvm] [LV] Support interleaving with FindLast reductions (PR #184099)   Florian Hahn via llvm-commits
• [llvm] [LV] Support interleaving with FindLast reductions (PR #184099)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Simplify the computation of the block entry mask. (PR #173265)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Simplify the computation of the block entry mask. (PR #173265)   Florian Hahn via llvm-commits
• [llvm] [LAA][LV]Allow recognition of strided pointers with constant stride (PR #171151)   Florian Hahn via llvm-commits
• [llvm] [LAA][LV]Allow recognition of strided pointers with constant stride (PR #171151)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Replicate VPScalarIVStepsRecipe by VF outside replicate regions. (PR #170053)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Replicate VPScalarIVStepsRecipe by VF outside replicate regions. (PR #170053)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Use bitfield to store Cmp predicates and GEP wrap flags. (NFC) (PR #181571)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Use pragma pack(1) for VPIRFlags on AIX. (PR #184687)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Use pragma pack(1) for VPIRFlags on AIX. (PR #184687)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Use pragma pack(1) for VPIRFlags on AIX. (PR #184687)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Use pragma pack(1) for VPIRFlags on AIX. (PR #184687)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Use pragma pack(1) for VPIRFlags on AIX. (PR #184687)   Florian Hahn via llvm-commits
• [llvm] f7560e1 - [LV] Add tests with loops with multiple argmin/argmax.   Florian Hahn via llvm-commits
• [llvm] [VPlan] Use pragma pack(1) for VPIRFlags on AIX. (PR #184687)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Use pragma pack(1) for VPIRFlags on AIX. (PR #184687)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Use pragma pack(1) for VPIRFlags on AIX. (PR #184687)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Use pragma pack(1) for VPIRFlags on AIX. (PR #184687)   Florian Hahn via llvm-commits
• [clang] [flang] [llvm] [InstCombine] Canonicalize GEP source element types (PR #180745)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Explicitly unoll replicate-regions without live-outs by VF. (PR #170212)   Florian Hahn via llvm-commits
• [llvm] [LV] Simplify the chain traversal in `getScaledReductions()` (NFCI) (PR #184830)   Florian Hahn via llvm-commits
• [llvm] [LV] Simplify the chain traversal in `getScaledReductions()` (NFCI) (PR #184830)   Florian Hahn via llvm-commits
• [llvm] [LV] Simplify the chain traversal in `getScaledReductions()` (NFCI) (PR #184830)   Florian Hahn via llvm-commits
• [llvm] [LV] Simplify the chain traversal in `getScaledReductions()` (NFCI) (PR #184830)   Florian Hahn via llvm-commits
• [llvm] [LV] Simplify the chain traversal in `getScaledReductions()` (NFCI) (PR #184830)   Florian Hahn via llvm-commits
• [llvm] Provide intrinsics for speculative loads (PR #179642)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Optimize resume values of IVs together with other exit values. (PR #174239)   Florian Hahn via llvm-commits
• [llvm] [polly] [SCEV] Introduce SCEVUse, use it instead of const SCEV * (NFCI). (PR #91961)   Florian Hahn via llvm-commits
• [llvm] [polly] [SCEV] Introduce SCEVUse, use it instead of const SCEV * (NFCI). (PR #91961)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Optimize resume values of IVs together with other exit values. (PR #174239)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Add poisoning value handle for VPValue. (NFCI) (PR #185054)   Florian Hahn via llvm-commits
• [llvm] 1af9f7c - [LV] Add test for IG narrowing and epilogue with ordered reductions.   Florian Hahn via llvm-commits
• [llvm] [VPlan] Materialize VectorTripCount in narrowInterleaveGroups. (PR #182146)   Florian Hahn via llvm-commits
• [llvm] 6aa115b - Reapply "[VPlan] Remove manual region removal when simplifying for VF and UF. (#181252)"   Florian Hahn via llvm-commits
• [llvm] [VPlan] Materialize VectorTripCount in narrowInterleaveGroups. (PR #182146)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Make canonical IV part of the region (PR #156262)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Make canonical IV part of the region (PR #156262)   Florian Hahn via llvm-commits
• [llvm] [LV] Move predication, early exit & region handling to VPlan0 (NFCI) (PR #185305)   Florian Hahn via llvm-commits
• [llvm] 2207296 - [VPlan] Fold constant trunc after EVL simplification.   Florian Hahn via llvm-commits
• [llvm] [VPlan] Materialize VectorTripCount in narrowInterleaveGroups. (PR #182146)   Florian Hahn via llvm-commits
• [llvm] [NFC][LV]: Differentiate between Pred and Unpred masked operations. (PR #169509)   Florian Hahn via llvm-commits
• [llvm] [NFC][LV]: Differentiate between Pred and Unpred masked operations. (PR #169509)   Florian Hahn via llvm-commits
• [llvm] [NFC][LV]: Differentiate between Pred and Unpred masked operations. (PR #169509)   Florian Hahn via llvm-commits
• [llvm] [NFC][LV]: Differentiate between Pred and Unpred masked operations. (PR #169509)   Florian Hahn via llvm-commits
• [llvm] [NFC][LV]: Differentiate between Pred and Unpred masked operations. (PR #169509)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Materialize VectorTripCount in narrowInterleaveGroups. (PR #182146)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Materialize VectorTripCount in narrowInterleaveGroups. (PR #182146)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Materialize VectorTripCount in narrowInterleaveGroups. (PR #182146)   Florian Hahn via llvm-commits
• [llvm] 483fc73 - [Loads] Add overload for isDerefAndAlignedInLoop that takes SCEVs.(NFC)   Florian Hahn via llvm-commits
• [llvm] [LV] Move dereferenceability check from Legal to VPlan (NFC) (PR #185323)   Florian Hahn via llvm-commits
• [llvm] [HWASan] [MTE] support double lifetime.end in same BB (PR #183809)   Florian Mayer via llvm-commits
• [llvm] [HWASan] [MTE] support double lifetime.end in same BB (PR #183809)   Florian Mayer via llvm-commits
• [llvm] [NFC] [HWASan] more meaningful BB names in use-after-scope test (PR #183867)   Florian Mayer via llvm-commits
• [llvm] [NFC] [HWASan] more meaningful BB names in use-after-scope test (PR #183867)   Florian Mayer via llvm-commits
• [llvm] wasm: recognize `any_true` and `all_true` (PR #155885)   Folkert de Vries via llvm-commits
• [llvm] [RISCV] Fix musttail with indirect arguments by forwarding incoming pointers (PR #185094)   Folkert de Vries via llvm-commits
• [llvm] [RISCV] Fix musttail with indirect arguments by forwarding incoming pointers (PR #185094)   Folkert de Vries via llvm-commits
• [llvm] [RISCV] Fix musttail with indirect arguments by forwarding incoming pointers (PR #185094)   Folkert de Vries via llvm-commits
• [llvm] [AMDGPU] AMDGPUIGroupLP: Avoid repeating reachability checks in greedy algorithm (PR #182463)   Frederik Harwath via llvm-commits
• [llvm] [AMDGPU] AMDGPUIGroupLP: Avoid repeating reachability checks in greedy algorithm (PR #182463)   Frederik Harwath via llvm-commits
• [llvm] [AMDGPU] AMDGPUIGroupLP: Avoid repeating reachability checks in greedy algorithm (PR #182463)   Frederik Harwath via llvm-commits
• [llvm] [AMDGPU] AMDGPUIGroupLP: Avoid repeating reachability checks in greedy algorithm (PR #182463)   Frederik Harwath via llvm-commits
• [llvm] [AMDGPU] IGroupLP: Refactor SchedGroup::initSchedGroup (NFC) (PR #184122)   Frederik Harwath via llvm-commits
• [llvm] [AMDGPU] IGroupLP: Refactor SchedGroup::initSchedGroup (NFC) (PR #184122)   Frederik Harwath via llvm-commits
• [llvm] [AMDGPU] IGroupLP: Refactor SchedGroup::initSchedGroup (NFC) (PR #184122)   Frederik Harwath via llvm-commits
• [llvm] [AMDGPU] IGroupLP: Refactor SchedGroup::initSchedGroup (NFC) (PR #184122)   Frederik Harwath via llvm-commits
• [llvm] [AMDGPU] IGroupLP: Refactor SchedGroup::initSchedGroup (NFC) (PR #184122)   Frederik Harwath via llvm-commits
• [llvm] [AMDGPU] IGroupLP: Refactor SchedGroup::initSchedGroup (NFC) (PR #184122)   Frederik Harwath via llvm-commits
• [llvm] [AMDGPU] IGroupLP: Refactor SchedGroup::initSchedGroup (NFC) (PR #184122)   Frederik Harwath via llvm-commits
• [llvm] [AMDGPU] IGroupLP: Refactor SchedGroup::initSchedGroup (NFC) (PR #184122)   Frederik Harwath via llvm-commits
• [llvm] [AMDGPU] AMDGPUIGroupLP: Avoid repeating reachability checks in greedy algorithm (PR #182463)   Frederik Harwath via llvm-commits
• [llvm] [AMDGPU] AMDGPUIGroupLP: Avoid repeating reachability checks in greedy algorithm (PR #182463)   Frederik Harwath via llvm-commits
• [llvm] [AMDGPU] AMDGPUIGroupLP: Avoid repeating reachability checks in greedy algorithm (PR #182463)   Frederik Harwath via llvm-commits
• [llvm] [AMDGPU] IGroupLP: Refactor SchedGroup::initSchedGroup (NFC) (PR #184122)   Frederik Harwath via llvm-commits
• [llvm] [AMDGPU] AMDGPUIGroupLP: Avoid repeating reachability checks in greedy algorithm (PR #182463)   Frederik Harwath via llvm-commits
• [llvm] [AMDGPU] AMDGPUIGroupLP: Avoid repeating reachability checks in greedy algorithm (PR #182463)   Frederik Harwath via llvm-commits
• [llvm] [AMDGPU] IGroupLP: Refactor SchedGroup::initSchedGroup (NFC) (PR #184122)   Frederik Harwath via llvm-commits
• [llvm] [AMDGPU] IGLP: Fix static variables (PR #137549)   Frederik Harwath via llvm-commits
• [llvm] [AMDGPU] IGLP: Fix static variables (PR #137549)   Frederik Harwath via llvm-commits
• [llvm] [AMDGPU] IGLP: Fix static variables (PR #137549)   Frederik Harwath via llvm-commits
• [llvm] [AMDGPU] IGLP: Fix static variables (PR #137549)   Frederik Harwath via llvm-commits
• [llvm] [AMDGPU] IGLP: Fix static variables (PR #137549)   Frederik Harwath via llvm-commits
• [llvm] Fold patterns which uses v4i32 type for equality comparison on v2i64 type (PR #184328)   Fuad Ismail via llvm-commits
• [llvm] Fold patterns which uses v4i32 type for equality comparison on v2i64 type (PR #184328)   Fuad Ismail via llvm-commits
• [llvm] Fold patterns which uses v4i32 type for equality comparison on v2i64 type (PR #184328)   Fuad Ismail via llvm-commits
• [llvm] Fold patterns which uses v4i32 type for equality comparison on v2i64 type (PR #184328)   Fuad Ismail via llvm-commits
• [llvm] Fold patterns which uses v4i32 type for equality comparison on v2i64 type (PR #184328)   Fuad Ismail via llvm-commits
• [llvm] Fold patterns which uses v4i32 type for equality comparison on v2i64 type (PR #184328)   Fuad Ismail via llvm-commits
• [llvm] Fold patterns which uses v4i32 type for comparisons on v2i64 type (PR #184328)   Fuad Ismail via llvm-commits
• [llvm] Fold patterns which uses v4i32 type for comparisons on v2i64 type (PR #184328)   Fuad Ismail via llvm-commits
• [llvm] Fold patterns which uses v4i32 type for comparisons on v2i64 type (PR #184328)   Fuad Ismail via llvm-commits
• [llvm] Fold patterns which uses v4i32 type for comparisons on v2i64 type (PR #184328)   Fuad Ismail via llvm-commits
• [llvm] Fold patterns which uses v4i32 type for comparisons on v2i64 type (PR #184328)   Fuad Ismail via llvm-commits
• [llvm] Fold patterns which uses v4i32 type for comparisons on v2i64 type (PR #184328)   Fuad Ismail via llvm-commits
• [llvm] Fold patterns which uses v4i32 type for comparisons on v2i64 type (PR #184328)   Fuad Ismail via llvm-commits
• [llvm] Fold patterns which uses v4i32 type for comparisons on v2i64 type (PR #184328)   Fuad Ismail via llvm-commits
• [llvm] Fold patterns which uses v4i32 type for comparisons on v2i64 type (PR #184328)   Fuad Ismail via llvm-commits
• [llvm] Fold patterns which uses v4i32 type for comparisons on v2i64 type (PR #184328)   Fuad Ismail via llvm-commits
• [llvm] Fold patterns which uses <2N x iM> type for comparisons on <N x 2iM> type (PR #184328)   Fuad Ismail via llvm-commits
• [llvm] Fold patterns which uses <2N x iM> type for comparisons on <N x 2iM> type (PR #184328)   Fuad Ismail via llvm-commits
• [llvm] Fold patterns which uses <2N x iM> type for comparisons on <N x i2M> type (PR #184328)   Fuad Ismail via llvm-commits
• [llvm] [AArch64] Fix performZExtUZPCombine() DAG combine (PR #183765)   Gaëtan Bossu via llvm-commits
• [llvm] [AArch64] Fix performZExtUZPCombine() DAG combine (PR #183765)   Gaëtan Bossu via llvm-commits
• [llvm] [AArch64] Fix performZExtUZPCombine() DAG combine (PR #183765)   Gaëtan Bossu via llvm-commits
• [llvm] [AArch64] Fix performZExtUZPCombine() DAG combine (PR #183765)   Gaëtan Bossu via llvm-commits
• [llvm] [LV] Support interleaving with conditional scalar assignments (PR #184099)   Gaëtan Bossu via llvm-commits
• [llvm] [LV] Support interleaving with conditional scalar assignments (PR #184099)   Gaëtan Bossu via llvm-commits
• [llvm] [LV] Support interleaving with conditional scalar assignments (PR #184099)   Gaëtan Bossu via llvm-commits
• [llvm] [LV] Support interleaving with conditional scalar assignments (PR #184099)   Gaëtan Bossu via llvm-commits
• [llvm] [LV] Simplify the chain traversal in `getScaledReductions()` (NFCI) (PR #184830)   Gaëtan Bossu via llvm-commits
• [llvm] [LV] Simplify the chain traversal in `getScaledReductions()` (NFCI) (PR #184830)   Gaëtan Bossu via llvm-commits
• [llvm] [LV] Simplify the chain traversal in `getScaledReductions()` (NFCI) (PR #184830)   Gaëtan Bossu via llvm-commits
• [llvm] [LV] Simplify the chain traversal in `getScaledReductions()` (NFCI) (PR #184830)   Gaëtan Bossu via llvm-commits
• [llvm] [LV] Simplify the chain traversal in `getScaledReductions()` (NFCI) (PR #184830)   Gaëtan Bossu via llvm-commits
• [llvm] [LV] Simplify the chain traversal in `getScaledReductions()` (NFCI) (PR #184830)   Gaëtan Bossu via llvm-commits
• [llvm] [LV] Simplify the chain traversal in `getScaledReductions()` (NFCI) (PR #184830)   Gaëtan Bossu via llvm-commits
• [lldb] [llvm] [llvm] Add format check for MCSubtargetFeatures (PR #180943)   Georgiy Samoylov via llvm-commits
• [lldb] [llvm] [llvm] Add format check for MCSubtargetFeatures (PR #180943)   Georgiy Samoylov via llvm-commits
• [lldb] [llvm] [llvm] Add format check for MCSubtargetFeatures (PR #180943)   Georgiy Samoylov via llvm-commits
• [llvm] [llvm] Add format check for MCSubtargetFeatures (PR #180943)   Georgiy Samoylov via llvm-commits
• [llvm] [llvm] Add format check for MCSubtargetFeatures (PR #180943)   Georgiy Samoylov via llvm-commits
• [llvm] [llvm] Add format check for MCSubtargetFeatures (PR #180943)   Georgiy Samoylov via llvm-commits
• [llvm] [llvm] Add format check for MCSubtargetFeatures (PR #180943)   Georgiy Samoylov via llvm-commits
• [llvm] [llvm] Add format check for MCSubtargetFeatures (PR #180943)   Georgiy Samoylov via llvm-commits
• [llvm] [llvm] Add format check for MCSubtargetFeatures (PR #180943)   Georgiy Samoylov via llvm-commits
• [llvm] [llvm] Add format check for MCSubtargetFeatures (PR #180943)   Georgiy Samoylov via llvm-commits
• [llvm] [llvm] Add format check for MCSubtargetFeatures (PR #180943)   Georgiy Samoylov via llvm-commits
• [llvm] [ValueTracking] Int vector reductions propagate noundef (PR #184173)   Gergo Stomfai via llvm-commits
• [llvm] [ValueTracking] Int vector reductions propagate noundef (PR #184173)   Gergo Stomfai via llvm-commits
• [llvm] [ValueTracking] Int vector reductions propagate noundef (PR #184173)   Gergo Stomfai via llvm-commits
• [llvm] [IR] Mark reduction intrinsics as nocreateundeforpoison (PR #184173)   Gergo Stomfai via llvm-commits
• [llvm] [IR] Add BooleanMap matcher (PR #184463)   Gergo Stomfai via llvm-commits
• [llvm] [IR] Add BooleanMap matcher (PR #184463)   Gergo Stomfai via llvm-commits
• [llvm] [IR] Add BooleanMap matcher (PR #184463)   Gergo Stomfai via llvm-commits
• [llvm] [LV] Support float and pointer conditional scalar assignments (PR #184101)   Graham Hunter via llvm-commits
• [llvm] [LV] Transform tests for early-exit with stores (PR #183288)   Graham Hunter via llvm-commits
• [llvm] [LV] Transform tests for early-exit with stores (PR #183288)   Graham Hunter via llvm-commits
• [llvm] [LV] Transform tests for early-exit with stores (PR #183288)   Graham Hunter via llvm-commits
• [llvm] [LV] Transform tests for early-exit with stores (PR #183288)   Graham Hunter via llvm-commits
• [llvm] [LV] Transform tests for early-exit with stores (PR #183288)   Graham Hunter via llvm-commits
• [llvm] [IVDescriptors] Reject FindLast candidates with loop invariant conditions (PR #184340)   Graham Hunter via llvm-commits
• [llvm] [LV] Transform tests for early-exit with stores (PR #183288)   Graham Hunter via llvm-commits
• [llvm] [IVDescriptors] Reject FindLast candidates with loop invariant conditions (PR #184340)   Graham Hunter via llvm-commits
• [llvm] [LV] Use make_early_inc_range in handleFindLastReductions (PR #184340)   Graham Hunter via llvm-commits
• [llvm] [LV] Use make_early_inc_range in handleFindLastReductions (PR #184340)   Graham Hunter via llvm-commits
• [llvm] [LV] Use make_early_inc_range in handleFindLastReductions (PR #184340)   Graham Hunter via llvm-commits
• [llvm] [LLVM][CodeGen][SVE] Improve isel for split vector bfloat conversions. (PR #184357)   Graham Hunter via llvm-commits
• [llvm] [LV] Use make_early_inc_range in handleFindLastReductions (PR #184340)   Graham Hunter via llvm-commits
• [llvm] [LV] Use make_early_inc_range in handleFindLastReductions (PR #184340)   Graham Hunter via llvm-commits
• [llvm] [LV] Transform tests for early-exit with stores (PR #183288)   Graham Hunter via llvm-commits
• [llvm] [LV] Transform tests for early-exit with stores (PR #183288)   Graham Hunter via llvm-commits
• [llvm] [LV] Add `-force-target-supports-masked-memory-ops` option (PR #184325)   Graham Hunter via llvm-commits
• [llvm] [LV] Use make_early_inc_range in handleFindLastReductions (PR #184340)   Graham Hunter via llvm-commits
• [llvm] [LV] Transform tests for early-exit with stores (PR #183288)   Graham Hunter via llvm-commits
• [llvm] [LV] Transform tests for early-exit with stores (PR #183288)   Graham Hunter via llvm-commits
• [llvm] [NFC][LV] Introduce enums for uncountable exit detail and style (PR #184808)   Graham Hunter via llvm-commits
• [llvm] [LV] Adjust exit recipe detection to run on early vplan (PR #183318)   Graham Hunter via llvm-commits
• [llvm] [NFC][LV] Introduce enums for uncountable exit detail and style (PR #184808)   Graham Hunter via llvm-commits
• [llvm] [NFC][LV] Introduce enums for uncountable exit detail and style (PR #184808)   Graham Hunter via llvm-commits
• [llvm] [NFC][LV] Introduce enums for uncountable exit detail and style (PR #184808)   Graham Hunter via llvm-commits
• [llvm] [LLVM] Add flatten function attribute to LLVM IR and implement recursive inlining in AlwaysInliner (PR #174899)   Grigory Pastukhov via llvm-commits
• [llvm] [LLVM] Add flatten function attribute to LLVM IR and implement recursive inlining in AlwaysInliner (PR #174899)   Grigory Pastukhov via llvm-commits
• [llvm] [SampleProfileMatcher] Add direct basename early matching for orphan functions (PR #184409)   Grigory Pastukhov via llvm-commits
• [llvm] [LLVM] Add flatten function attribute to LLVM IR and implement recursive inlining in AlwaysInliner (PR #174899)   Grigory Pastukhov via llvm-commits
• [llvm] [InstSimplify] Discard unnecessary `select` when the conditions are `ICmps` with EQ (PR #179183)   Gábor Spaits via llvm-commits
• [llvm] [InstSimplify] Discard unnecessary `select` when the conditions are `ICmps` with EQ (PR #179183)   Gábor Spaits via llvm-commits
• [llvm] [InstSimplify] Implement `Cond ? V : V` -> `V` when no Refinment allowed (PR #183291)   Gábor Spaits via llvm-commits
• [llvm] [InstSimplify] Discard unnecessary `select` when the conditions are `ICmps` with EQ (PR #179183)   Gábor Spaits via llvm-commits
• [llvm] [InstSimplify] Discard unnecessary `select` when the conditions are `ICmps` with EQ (PR #179183)   Gábor Spaits via llvm-commits
• [llvm] [InstSimplify] Discard unnecessary `select` when the conditions are `ICmps` with EQ (PR #179183)   Gábor Spaits via llvm-commits
• [llvm] [InstSimplify] Discard unnecessary `select` when the conditions are `ICmps` with EQ (PR #179183)   Gábor Spaits via llvm-commits
• [llvm] [BOLT] Speed up dataflow analysis with RPO (PR #183704)   Haibo Jiang via llvm-commits
• [llvm] [BOLT] Speed up dataflow analysis with RPO (PR #183704)   Haibo Jiang via llvm-commits
• [llvm] [BOLT] Speed up dataflow analysis with RPO (PR #183704)   Haibo Jiang via llvm-commits
• [llvm] [BOLT][AArch64] Add indirect call promotion support (PR #184733)   Haibo Jiang via llvm-commits
• [llvm] [BOLT][AArch64] Add indirect call promotion support (PR #184733)   Haibo Jiang via llvm-commits
• [llvm] [cmake] Introduce LLVM_DISABLE_PROJECTS to easily exclude projects (PR #141535)   Hamid El Maazouz via llvm-commits
• [llvm] [cmake] Introduce LLVM_DISABLE_PROJECTS to easily exclude projects (PR #141535)   Hamid El Maazouz via llvm-commits
• [llvm] [Windows][test] Fix "LLVM" test failures when LLVM_WINDOWS_PREFER_FORWARD_SLASH is ON (PR #184556)   Hans Wennborg via llvm-commits
• [llvm] [Windows][test] Fix "LLVM" test failures when LLVM_WINDOWS_PREFER_FORWARD_SLASH is ON (PR #184556)   Hans Wennborg via llvm-commits
• [llvm] [Windows][test] Fix "LLVM" test failures when LLVM_WINDOWS_PREFER_FORWARD_SLASH is ON (PR #184556)   Hans Wennborg via llvm-commits
• [llvm] [Windows][test] Fix "LLVM" test failures when LLVM_WINDOWS_PREFER_FORWARD_SLASH is ON (PR #184556)   Hans Wennborg via llvm-commits
• [clang] [llvm] [ARM] Add support for Windows SEH (PR #184953)   Hans Wennborg via llvm-commits
• [clang] [llvm] [ARM] Add support for Windows SEH (PR #184953)   Hans Wennborg via llvm-commits
• [clang] [llvm] [ARM] Add support for Windows SEH (PR #184953)   Hans Wennborg via llvm-commits
• [clang] [llvm] [ARM] Add support for Windows SEH (PR #184953)   Hans Wennborg via llvm-commits
• [clang] [llvm] [ARM] Add support for Windows SEH (PR #184953)   Hans Wennborg via llvm-commits
• [llvm] [AMDGPU] Insert readfirstlane for uniform VGPR arguments (PR #178198)   Harald van Dijk via llvm-commits
• [llvm] [AMDGPU] Insert readfirstlane for uniform VGPR arguments (PR #178198)   Harald van Dijk via llvm-commits
• [llvm] Fix `assignValueToReg` function's argument (PR #184354)   Harald van Dijk via llvm-commits
• [llvm] [NFC] Clean up MCSymbolRefExpr::VariantKind (PR #179363)   Harald van Dijk via llvm-commits
• [llvm] [NFC] Clean up MCSymbolRefExpr::VariantKind (PR #179363)   Harald van Dijk via llvm-commits
• [llvm] This is a draft for enabling opt-in tail-folding on vectorized epilogue. (PR #181401)   Hassnaa Hamdi via llvm-commits
• [llvm] This is a draft for enabling opt-in tail-folding on vectorized epilogue. (PR #181401)   Hassnaa Hamdi via llvm-commits
• [llvm] This is a draft for enabling opt-in tail-folding on vectorized epilogue. (PR #181401)   Hassnaa Hamdi via llvm-commits
• [llvm] This is a draft for enabling opt-in tail-folding on vectorized epilogue. (PR #181401)   Hassnaa Hamdi via llvm-commits
• [llvm] [NFC][LV]: Differentiate between Pred and Unpred masked operations. (PR #169509)   Hassnaa Hamdi via llvm-commits
• [llvm] [WebAssembly] MC support for acquire-release atomics (PR #183656)   Heejin Ahn via llvm-commits
• [llvm] [WebAssembly] MC support for acquire-release atomics (PR #183656)   Heejin Ahn via llvm-commits
• [llvm] [WebAssembly] MC support for acquire-release atomics (PR #183656)   Heejin Ahn via llvm-commits
• [llvm] [WebAssembly] MC support for acquire-release atomics (PR #183656)   Heejin Ahn via llvm-commits
• [llvm] [WebAssembly] Reapply "[WebAssembly] Incorporate SCCs into WebAssemblyFixIrreducibleControlFlow" (#181755) (PR #184441)   Heejin Ahn via llvm-commits
• [llvm] [WebAssembly] Reapply "[WebAssembly] Incorporate SCCs into WebAssemblyFixIrreducibleControlFlow" (#181755) (PR #184441)   Heejin Ahn via llvm-commits
• [llvm] [WebAssembly] Reapply "[WebAssembly] Incorporate SCCs into WebAssemblyFixIrreducibleControlFlow" (#181755) (PR #184441)   Heejin Ahn via llvm-commits
• [llvm] [WebAssembly] Reapply "[WebAssembly] Incorporate SCCs into WebAssemblyFixIrreducibleControlFlow" (#181755) (PR #184441)   Heejin Ahn via llvm-commits
• [llvm] [WebAssembly] Reapply "[WebAssembly] Incorporate SCCs into WebAssemblyFixIrreducibleControlFlow" (#181755) (PR #184441)   Heejin Ahn via llvm-commits
• [llvm] [WebAssembly] Reapply "[WebAssembly] Incorporate SCCs into WebAssemblyFixIrreducibleControlFlow" (#181755) (PR #184441)   Heejin Ahn via llvm-commits
• [llvm] [WebAssembly] Reapply "[WebAssembly] Incorporate SCCs into WebAssemblyFixIrreducibleControlFlow" (#181755) (PR #184441)   Heejin Ahn via llvm-commits
• [llvm] [WebAssembly] Reapply "[WebAssembly] Incorporate SCCs into WebAssemblyFixIrreducibleControlFlow" (#181755) (PR #184441)   Heejin Ahn via llvm-commits
• [llvm] add: hidden option to disable slow wasm pass (PR #67715)   Heejin Ahn via llvm-commits
• [llvm] [WebAssembly] Fold any/alltrue SIMD boolean reductions with eqz (PR #184704)   Heejin Ahn via llvm-commits
• [llvm] [WebAssembly] Fold any/alltrue SIMD boolean reductions with eqz (PR #184704)   Heejin Ahn via llvm-commits
• [clang] [llvm] [WebAssembly] Support acquire-release atomics in CodeGen (PR #184900)   Heejin Ahn via llvm-commits
• [clang] [llvm] [WebAssembly] Support acquire-release atomics in CodeGen (PR #184900)   Heejin Ahn via llvm-commits
• [clang] [llvm] [WebAssembly] Support acquire-release atomics in CodeGen (PR #184900)   Heejin Ahn via llvm-commits
• [clang] [llvm] [WebAssembly] Support acquire-release atomics in CodeGen (PR #184900)   Heejin Ahn via llvm-commits
• [clang] [llvm] [WebAssembly] Support acquire-release atomics in CodeGen (PR #184900)   Heejin Ahn via llvm-commits
• [clang] [llvm] [WebAssembly] Support acquire-release atomics in CodeGen (PR #184900)   Heejin Ahn via llvm-commits
• [clang] [llvm] [HLSL] Implement Texture2D default template (PR #184207)   Helena Kotas via llvm-commits
• [clang] [llvm] [HLSL] Implement Texture2D::Gather and Texture2D::GatherCmp (PR #183323)   Helena Kotas via llvm-commits
• [clang] [llvm] [HLSL] Implement Texture2D::Gather and Texture2D::GatherCmp (PR #183323)   Helena Kotas via llvm-commits
• [llvm] [TableGen] Add let append/prepend syntax for field concatenation (PR #182382)   Henrich Lauko via llvm-commits
• [llvm] [TableGen] Add let append/prepend syntax for field concatenation (PR #182382)   Henrich Lauko via llvm-commits
• [llvm] [TableGen] Add let append/prepend syntax for field concatenation (PR #182382)   Henrich Lauko via llvm-commits
• [llvm] [TableGen] Add let append/prepend syntax for field concatenation (PR #182382)   Henrich Lauko via llvm-commits
• [llvm] [TableGen] Add let append/prepend syntax for field concatenation (PR #182382)   Henrich Lauko via llvm-commits
• [llvm] [utils] use annotations from __future__ in lit (PR #184225)   Henrik G. Olsson via llvm-commits
• [llvm] [utils] update type hint for python 3.8-3.9 compatibility (PR #183427)   Henrik G. Olsson via llvm-commits
• [llvm] [utils] use annotations from __future__ in lit (PR #184225)   Henrik G. Olsson via llvm-commits
• [llvm] [utils] use annotations from __future__ in lit (PR #184225)   Henrik G. Olsson via llvm-commits
• [llvm] [lit] Add JSON diffing support to lit (PR #177513)   Henrik G. Olsson via llvm-commits
• [llvm] [lit] Add JSON diffing support to lit (PR #177513)   Henrik G. Olsson via llvm-commits
• [llvm] [lit] Add JSON diffing support to lit (PR #177513)   Henrik G. Olsson via llvm-commits
• [llvm] [lit] Add JSON diffing support to lit (PR #177513)   Henrik G. Olsson via llvm-commits
• [llvm] [lit] Add JSON diffing support to lit (PR #177513)   Henrik G. Olsson via llvm-commits
• [llvm] [lit] Add JSON diffing support to lit (PR #177513)   Henrik G. Olsson via llvm-commits
• [llvm] [lit] Add JSON diffing support to lit (PR #177513)   Henrik G. Olsson via llvm-commits
• [llvm] [lit] Add JSON diffing support to lit (PR #177513)   Henrik G. Olsson via llvm-commits
• [llvm] [lit] Add JSON diffing support to lit (PR #177513)   Henrik G. Olsson via llvm-commits
• [llvm] [lit] Add JSON diffing support to lit (PR #177513)   Henrik G. Olsson via llvm-commits
• [llvm] [lit] Add JSON diffing support to lit (PR #177513)   Henrik G. Olsson via llvm-commits
• [llvm] [lit] Add JSON diffing support to lit (PR #177513)   Henrik G. Olsson via llvm-commits
• [llvm] [lit] Add JSON diffing support to lit (PR #177513)   Henrik G. Olsson via llvm-commits
• [llvm] [VPlan][PseudoProbe] Fix `pseudoprobe` duplication when `VF=1` (PR #185238)   Henry Jiang via llvm-commits
• [llvm] [VPlan][PseudoProbe] Fix `pseudoprobe` duplication when `VF=1` (PR #185238)   Henry Jiang via llvm-commits
• [llvm] [VPlan] Fix `pseudoprobe` being treated a vector intrinsic (PR #185347)   Henry Jiang via llvm-commits
• [llvm] [VPlan] Fix `pseudoprobe` being treated a vector intrinsic (PR #185347)   Henry Jiang via llvm-commits
• [clang] [llvm] [PowerPC][AIX] Support #pragma comment copyright for AIX (PR #178184)   Hubert Tong via llvm-commits
• [llvm] [llvm-symbolizer] Make symbolizer parse section relative syntax (PR #168524)   Hubert Tong via llvm-commits
• [llvm] [llvm-symbolizer] Make symbolizer parse section relative syntax (PR #168524)   Hubert Tong via llvm-commits
• [llvm] [llvm-symbolizer] Make symbolizer parse section relative syntax (PR #168524)   Hubert Tong via llvm-commits
• [clang] [llvm] Enable fexec-charset option (PR #138895)   Hubert Tong via llvm-commits
• [compiler-rt] [sanitizer_common] Implement address sanitizer on AIX: process memory mapping (PR #138537)   Hubert Tong via llvm-commits
• [compiler-rt] [sanitizer_common] Implement address sanitizer on AIX: process memory mapping (PR #138537)   Hubert Tong via llvm-commits
• [clang] [llvm] Enable fexec-charset option (PR #138895)   Hubert Tong via llvm-commits
• [compiler-rt] [sanitizer_common] Implement address sanitizer on AIX: process memory mapping (PR #138537)   Hubert Tong via llvm-commits
• [compiler-rt] [sanitizer_common] Implement address sanitizer on AIX: process memory mapping (PR #138537)   Hubert Tong via llvm-commits
• [compiler-rt] [sanitizer_common] Implement address sanitizer on AIX: process memory mapping (PR #138537)   Hubert Tong via llvm-commits
• [compiler-rt] [sanitizer_common] Implement address sanitizer on AIX: process memory mapping (PR #138537)   Hubert Tong via llvm-commits
• [llvm] [NFC][AArch64] Improve semantics of findSuitableCompare in ConditionOptimizer (PR #183532)   Hussam Alhassan via llvm-commits
• [llvm] [NFC][AArch64] Improve semantics of findSuitableCompare in ConditionOptimizer (PR #183532)   Hussam Alhassan via llvm-commits
• [llvm] [NFC][AArch64] isPureCmp is a duplicate of canAdjustCmp, so remove the duplicate (PR #183568)   Hussam Alhassan via llvm-commits
• [llvm] [NFC][AArch64] Improve semantics of findSuitableCompare in ConditionOptimizer (PR #183532)   Hussam Alhassan via llvm-commits
• [llvm] [NFC][AArch64] Improve semantics of findSuitableCompare in ConditionOptimizer (PR #183532)   Hussam Alhassan via llvm-commits
• [llvm] [NFC][AArch64] Improve semantics of findSuitableCompare in ConditionOptimizer (PR #183532)   Hussam Alhassan via llvm-commits
• [llvm] [NFC][AArch64] Improve semantics of findSuitableCompare in ConditionOptimizer (PR #183532)   Hussam Alhassan via llvm-commits
• [llvm] [LAA] Fix recordAnalysis receiving null Instruction pointer (PR #183512)   Igor Kirillov via llvm-commits
• [lldb] [llvm] [lldb][ARM] Support thread local variables on ARM Linux (PR #181315)   Igor Kudrin via llvm-commits
• [llvm] [mlir][bazel] Fix build after changes from #183856. (PR #184134)   Ingo Müller via llvm-commits
• [llvm] [mlir][bazel] Fix build after #184116 (PR #185019)   Ingo Müller via llvm-commits
• [llvm] [mlir][bazel] Fix build after #184116 (PR #185019)   Ingo Müller via llvm-commits
• [llvm] [mlir][bazel] Fix build after #184116 (PR #185019)   Ingo Müller via llvm-commits
• [llvm] [mlir][bazel] Fix build after #184116 (PR #185019)   Ingo Müller via llvm-commits
• [llvm] [TableGen] Complete the support for artificial registers (PR #183371)   Ivan Kosarev via llvm-commits
• [llvm] [TableGen] Complete the support for artificial registers (PR #183371)   Ivan Kosarev via llvm-commits
• [llvm] [TableGen] Complete the support for artificial registers (PR #183371)   Ivan Kosarev via llvm-commits
• [llvm] [TableGen] Complete the support for artificial registers (PR #183371)   Ivan Kosarev via llvm-commits
• [llvm] [AMDGPU] Have VCC as a first-class member of the SGPR pool. (PR #173870)   Ivan Kosarev via llvm-commits
• [llvm] [AMDGPU] Have VCC as a first-class member of the SGPR pool. (PR #173870)   Ivan Kosarev via llvm-commits
• [llvm] [AMDGPU] Have VCC as a first-class member of the SGPR pool. (PR #173870)   Ivan Kosarev via llvm-commits
• [llvm] [TableGen] Complete the support for artificial registers (PR #183371)   Ivan Kosarev via llvm-commits
• [llvm] [Reassociate][DebugInfo] Salvage debug info before rewriting expression (PR #182730)   J. Ryan Stinnett via llvm-commits
• [llvm] [Reassociate][DebugInfo] Salvage debug info before rewriting expression (PR #182730)   J. Ryan Stinnett via llvm-commits
• [llvm] [Reassociate][DebugInfo] Salvage debug info before rewriting expression (PR #182730)   J. Ryan Stinnett via llvm-commits
• [llvm] [Reassociate][DebugInfo] Salvage debug info before rewriting expression (PR #182730)   J. Ryan Stinnett via llvm-commits
• [llvm] [mlir] [mlir][bytecode] Add builtin dialect version (PR #184678)   Jacques Pienaar via llvm-commits
• [llvm] [mlir] [mlir][bytecode] Add builtin dialect version (PR #184678)   Jacques Pienaar via llvm-commits
• [llvm] [mlir] [mlir][bytecode] Add builtin dialect version (PR #184678)   Jacques Pienaar via llvm-commits
• [llvm] [mlir] [mlir][bytecode] Add builtin dialect version (PR #184678)   Jacques Pienaar via llvm-commits
• [llvm] [mlir] [mlir][bytecode] Add builtin dialect version (PR #184678)   Jacques Pienaar via llvm-commits
• [llvm] [mlir] [mlir][bytecode] Add builtin dialect version (PR #184678)   Jacques Pienaar via llvm-commits
• [llvm] [DTU] fix dominator tree update eliding reachable nodes (PR #177683)   Jakub Kuderski via llvm-commits
• [llvm] [ADT] Refine MutableArrayRef forwarding constructor constraints (PR #183806)   Jakub Kuderski via llvm-commits
• [llvm] [ADT] Refine MutableArrayRef forwarding constructor constraints (PR #183806)   Jakub Kuderski via llvm-commits
• [llvm] [ADT] Refine MutableArrayRef forwarding constructor constraints (PR #183806)   Jakub Kuderski via llvm-commits
• [llvm] [ADT] Refine MutableArrayRef forwarding constructor constraints (PR #183806)   Jakub Kuderski via llvm-commits
• [llvm] [ADT] Refine MutableArrayRef forwarding constructor constraints (PR #183806)   Jakub Kuderski via llvm-commits
• [llvm] [ADT] Refine MutableArrayRef forwarding constructor constraints (PR #183806)   Jakub Kuderski via llvm-commits
• [llvm] [ADT] Refine MutableArrayRef forwarding constructor constraints (PR #183806)   Jakub Kuderski via llvm-commits
• [llvm] [ADT] Remove deprecated variadic `StringSwitch::Cases` and `CasesLower` (PR #185191)   Jakub Kuderski via llvm-commits
• [llvm] [ADT] Remove deprecated variadic `StringSwitch::Cases` and `CasesLower` (PR #185191)   Jakub Kuderski via llvm-commits
• [llvm] [ADT] Remove deprecated variadic `StringSwitch::Cases` and `CasesLower` (PR #185191)   Jakub Kuderski via llvm-commits
• [llvm] [ADT] Remove deprecated variadic `StringSwitch::Cases` and `CasesLower` (PR #185191)   Jakub Kuderski via llvm-commits
• [llvm] [ADT] Remove deprecated variadic `StringSwitch::Cases` and `CasesLower` (PR #185191)   Jakub Kuderski via llvm-commits
• [llvm] [ADT] Remove deprecated variadic `StringSwitch::Cases` and `CasesLower` (PR #185191)   Jakub Kuderski via llvm-commits
• [llvm] [Object][ELF] Fix section header zero check (PR #181796)   James Henderson via llvm-commits
• [llvm] [LIT] Fix env without subcommand causing early return in pipeline (PR #184028)   James Henderson via llvm-commits
• [llvm] [llvm] Turn misc copy-assign to move-assign (PR #184143)   James Henderson via llvm-commits
• [lld] [llvm] [lld][DebugInfo/BTF] Add BTF section merging and deduplication (PR #183915)   James Henderson via llvm-commits
• [llvm] [LIT] Fix env without subcommand causing early return in pipeline (PR #184028)   James Henderson via llvm-commits
• [llvm] [Windows][test] Fix "LLVM" test failures when LLVM_WINDOWS_PREFER_FORWARD_SLASH is ON (PR #184556)   James Henderson via llvm-commits
• [llvm] [Windows][test] Fix "LLVM" test failures when LLVM_WINDOWS_PREFER_FORWARD_SLASH is ON (PR #184556)   James Henderson via llvm-commits
• [llvm] [llvm-objdump] Default --symbolize-operands for BPF (PR #184043)   James Henderson via llvm-commits
• [llvm] [llvm-objdump] Default --symbolize-operands for BPF (PR #184043)   James Henderson via llvm-commits
• [llvm] [llvm-objdump] Default --symbolize-operands for BPF (PR #184043)   James Henderson via llvm-commits
• [llvm] [llvm-objdump] Default --symbolize-operands for BPF (PR #184043)   James Henderson via llvm-commits
• [llvm] [Windows][test] Fix "LLVM" test failures when LLVM_WINDOWS_PREFER_FORWARD_SLASH is ON (PR #184556)   James Henderson via llvm-commits
• [llvm] [llvm][tools] Add support to llvm-offload-binary to unbundle spirv64-intel images (PR #184774)   James Henderson via llvm-commits
• [llvm] [llvm][tools] Add support to llvm-offload-binary to unbundle spirv64-intel images (PR #184774)   James Henderson via llvm-commits
• [llvm] [llvm][tools] Add support to llvm-offload-binary to unbundle spirv64-intel images (PR #184774)   James Henderson via llvm-commits
• [llvm] [llvm][tools] Add support to llvm-offload-binary to unbundle spirv64-intel images (PR #184774)   James Henderson via llvm-commits
• [llvm] [llvm][tools] Add support to llvm-offload-binary to unbundle spirv64-intel images (PR #184774)   James Henderson via llvm-commits
• [llvm] [SROA][Target] Add requiresStructuredGEP to TTI (PR #183296)   Jameson Nash via llvm-commits
• [llvm] [VPlan] Remove unused VPExpandSCEVRecipe before expansion (PR #181329)   Jan Patrick Lehr via llvm-commits
• [llvm] [VPlan] Remove unused VPExpandSCEVRecipe before expansion (PR #181329)   Jan Patrick Lehr via llvm-commits
• [llvm] Revert "[VPlan] Remove unused VPExpandSCEVRecipe before expansion" (PR #184108)   Jan Patrick Lehr via llvm-commits
• [llvm] Revert "[VPlan] Remove unused VPExpandSCEVRecipe before expansion" (PR #184108)   Jan Patrick Lehr via llvm-commits
• [llvm] Revert "[VPlan] Remove unused VPExpandSCEVRecipe before expansion" (PR #184108)   Jan Patrick Lehr via llvm-commits
• [llvm] Revert "[VPlan] Remove unused VPExpandSCEVRecipe before expansion" (PR #184108)   Jan Patrick Lehr via llvm-commits
• [llvm] [SandboxVec][DAG] Handle unscheduled successors when user is external (PR #183861)   Jan Patrick Lehr via llvm-commits
• [llvm] [CI] Enable OpenMP and Offload runtime in premerge (PR #174955)   Jan Patrick Lehr via llvm-commits
• [llvm] [CI] Enable OpenMP and Offload runtime in premerge (PR #174955)   Jan Patrick Lehr via llvm-commits
• [llvm] [SandboxVec][DAG] Fix unscheduled succs when nodes are scheduled (PR #184946)   Jan Patrick Lehr via llvm-commits
• [llvm] [SandboxVec][DAG] Fix unscheduled succs when nodes are scheduled (PR #184946)   Jan Patrick Lehr via llvm-commits
• [llvm] [SandboxVec][DAG] Fix unscheduled succs when nodes are scheduled (PR #184946)   Jan Patrick Lehr via llvm-commits
• [llvm] [SandboxVec][DAG] Fix unscheduled succs when nodes are scheduled (PR #184946)   Jan Patrick Lehr via llvm-commits
• [llvm] [SandboxVec][DAG] Fix unscheduled succs when nodes are scheduled (PR #184946)   Jan Patrick Lehr via llvm-commits
• [clang] [llvm] [llvm] Avoid resolving `.incbin` during symbol collection (PR #172920)   Jan Svoboda via llvm-commits
• [clang] [llvm] [llvm] Avoid resolving `.incbin` during symbol collection (PR #172920)   Jan Svoboda via llvm-commits
• [clang] [llvm] [clang] Allow enabling sandbox for direct `-cc1` invocations (PR #174653)   Jan Svoboda via llvm-commits
• [llvm] Reapply "[llvm][clang] Enable IO sandbox for assert builds" (PR #184545)   Jan Svoboda via llvm-commits
• [llvm] Reapply "[llvm][clang] Enable IO sandbox for assert builds" (PR #184545)   Jan Svoboda via llvm-commits
• [llvm] Reapply "[AMDGPU] Elide bitcast fold i64 imm to build_vector" (#160325) (PR #184114)   Janek van Oirschot via llvm-commits
• [llvm] [AMDGPU] Legalize 64bit elements for BUILD_VECTOR on gfx942 (PR #145052)   Janek van Oirschot via llvm-commits
• [llvm] Reapply "[AMDGPU] Elide bitcast fold i64 imm to build_vector" (#160325) (PR #184114)   Janek van Oirschot via llvm-commits
• [llvm] [AMDGPU] Legalize 64bit elements for BUILD_VECTOR on gfx942 (PR #145052)   Janek van Oirschot via llvm-commits
• [llvm] [AMDGPU] Legalize 64bit elements for BUILD_VECTOR on gfx942 (PR #145052)   Janek van Oirschot via llvm-commits
• [llvm] [AMDGPU] Register allocation anti-hints to reduce MFMA hazard NOPs (PR #156943)   Janek van Oirschot via llvm-commits
• [llvm] [AMDGPU] Register allocation anti-hints to reduce MFMA hazard NOPs (PR #156943)   Janek van Oirschot via llvm-commits
• [llvm] [AMDGPU] Register allocation anti-hints to reduce MFMA hazard NOPs (PR #156943)   Janek van Oirschot via llvm-commits
• [clang] [llvm] [openmp] [OpenMP][clang] Indirect and Virtual function call mapping from host to device (PR #159857)   Jason Van Beusekom via llvm-commits
• [clang] [llvm] [openmp] [OpenMP][clang] Indirect and Virtual function call mapping from host to device (PR #159857)   Jason Van Beusekom via llvm-commits
• [clang] [llvm] [OpenMP][clang] Indirect and Virtual function call mapping from host to device (PR #159857)   Jason Van Beusekom via llvm-commits
• [clang] [llvm] [OpenMP][clang] Indirect and Virtual function call mapping from host to device (PR #159857)   Jason Van Beusekom via llvm-commits
• [llvm] [AMDGPU] Fix typo "PGRM" in variable name. NFC. (PR #184104)   Jay Foad via llvm-commits
• [llvm] [AMDGPU] Fix typo "PGRM" in variable name. NFC. (PR #184104)   Jay Foad via llvm-commits
• [llvm] 52df4a1 - [AMDGPU] Fix typos "SPGR" / "VPGR" in comments   Jay Foad via llvm-commits
• [llvm] [AMDGPU] Fix typo "PGRM" in variable name. NFC. (PR #184104)   Jay Foad via llvm-commits
• [llvm] [AMDGPU][InstCombine] Fold unused m0 operand to poison for sendmsg intrinsics (PR #183755)   Jay Foad via llvm-commits
• [llvm] [AMDGPU][InstCombine] Fold unused m0 operand to poison for sendmsg intrinsics (PR #183755)   Jay Foad via llvm-commits
• [llvm] [AMDGPU][InstCombine] Fold unused m0 operand to poison for sendmsg intrinsics (PR #183755)   Jay Foad via llvm-commits
• [llvm] [AMDGPU][InstCombine] Fold unused m0 operand to poison for sendmsg intrinsics (PR #183755)   Jay Foad via llvm-commits
• [llvm] [DAG] visitCLMUL - fold (clmul x, c_pow2) -> (shl x, log2(c_pow2)) (PR #184049)   Jay Foad via llvm-commits
• [llvm] [CodeGen] Treat hasOrderedMemoryRef as implying arbitrary loads or stores (PR #182000)   Jay Foad via llvm-commits
• [llvm] [CodeGen] Treat hasOrderedMemoryRef as implying arbitrary loads or stores (PR #182000)   Jay Foad via llvm-commits
• [llvm] [CodeGen] Treat hasOrderedMemoryRef as implying arbitrary loads or stores (PR #182000)   Jay Foad via llvm-commits
• [llvm] [CodeGen] Treat hasOrderedMemoryRef as implying arbitrary loads or stores (PR #182000)   Jay Foad via llvm-commits
• [llvm] [CodeGen] Treat hasOrderedMemoryRef as implying arbitrary loads or stores (PR #182000)   Jay Foad via llvm-commits
• [llvm] [CodeGen] Treat hasOrderedMemoryRef as implying arbitrary loads or stores (PR #182000)   Jay Foad via llvm-commits
• [llvm] [CodeGen] Treat hasOrderedMemoryRef as implying arbitrary loads or stores (PR #182000)   Jay Foad via llvm-commits
• [llvm] [CodeGen] Treat hasOrderedMemoryRef as implying arbitrary loads or stores (PR #182000)   Jay Foad via llvm-commits
• [llvm] [CodeGen] Treat hasOrderedMemoryRef as implying arbitrary loads or stores (PR #182000)   Jay Foad via llvm-commits
• [llvm] [CodeGen] Treat hasOrderedMemoryRef as implying arbitrary loads or stores (PR #182000)   Jay Foad via llvm-commits
• [llvm] [AMDGPU] Generate more swaps (PR #184164)   Jay Foad via llvm-commits
• [llvm] [SelectionDAG] Use Karatsuba decomposition to expand vector CLMUL via narrower legal types (PR #184468)   Jay Foad via llvm-commits
• [llvm] [SelectionDAG] Use Karatsuba decomposition to expand vector CLMUL via narrower legal types (PR #184468)   Jay Foad via llvm-commits
• [llvm] [SelectionDAG] Use Karatsuba decomposition to expand vector CLMUL via narrower legal types (PR #184468)   Jay Foad via llvm-commits
• [llvm] [CodeGen] Treat hasOrderedMemoryRef as implying arbitrary loads or stores (PR #182000)   Jay Foad via llvm-commits
• [llvm] [CodeGen] Treat hasOrderedMemoryRef as implying arbitrary loads or stores (PR #182000)   Jay Foad via llvm-commits
• [llvm] [CodeGen] Treat hasOrderedMemoryRef as implying arbitrary loads or stores (PR #182000)   Jay Foad via llvm-commits
• [llvm] [CodeGen] Treat hasOrderedMemoryRef as implying arbitrary loads or stores (PR #182000)   Jay Foad via llvm-commits
• [llvm] [CodeGen] Treat hasOrderedMemoryRef as implying arbitrary loads or stores (PR #182000)   Jay Foad via llvm-commits
• [llvm] [CodeGen] Treat hasOrderedMemoryRef as implying arbitrary loads or stores (PR #182000)   Jay Foad via llvm-commits
• [llvm] [CodeGen] Treat hasOrderedMemoryRef as implying arbitrary loads or stores (PR #182000)   Jay Foad via llvm-commits
• [llvm] [CodeGen] Treat hasOrderedMemoryRef as implying arbitrary loads or stores (PR #182000)   Jay Foad via llvm-commits
• [llvm] [CodeGen] Treat hasOrderedMemoryRef as implying arbitrary loads or stores (PR #182000)   Jay Foad via llvm-commits
• [llvm] [TableGen] Allow targets to enforce regunits assignment as intervals (PR #175823)   Jay Foad via llvm-commits
• [llvm] [DAG] Simplify isKnownToBeAPowerOfTwo for ZERO_EXTEND (PR #182226)   Jay Foad via llvm-commits
• [llvm] Add EVT::changeVectorElementCount and MVT:changeVectorElementCount (PR #182266)   Jay Foad via llvm-commits
• [llvm] [CodeGen] Simplify EVT::operator!=. NFCI. (PR #184792)   Jay Foad via llvm-commits
• [llvm] Add EVT::changeVectorElementCount and MVT:changeVectorElementCount (PR #182266)   Jay Foad via llvm-commits
• [llvm] [AMDGPU] Have VCC as a first-class member of the SGPR pool. (PR #173870)   Jay Foad via llvm-commits
• [llvm] [CodeGen] Simplify EVT::operator!=. NFCI. (PR #184792)   Jay Foad via llvm-commits
• [llvm] [AMDGPU] Have VCC as a first-class member of the SGPR pool. (PR #173870)   Jay Foad via llvm-commits
• [llvm] [AMDGPU] Fix GFX1250 hazard: S_SET_VGPR_MSB dropped (PR #184904)   Jay Foad via llvm-commits
• [llvm] [MIPS] Fix duplicate RUN lines in tests (PR #182276)   Jay Foad via llvm-commits
• [llvm] [AMDGPU] Run AMDGPULowerVGPREncoding before hazard recognizers. NFCI. (PR #184987)   Jay Foad via llvm-commits
• [llvm] [AMDGPU] Fix GFX1250 hazard: S_SET_VGPR_MSB dropped (PR #184904)   Jay Foad via llvm-commits
• [llvm] [AMDGPU] Run AMDGPULowerVGPREncoding before hazard recognizers. NFCI. (PR #184987)   Jay Foad via llvm-commits
• [llvm] [AMDGPU] Fix incorrect check prefixes in some MC tests (PR #185015)   Jay Foad via llvm-commits
• [llvm] [AMDGPU] Fix incorrect check prefixes in some MC tests (PR #185015)   Jay Foad via llvm-commits
• [llvm] [NFC][TableGen] Add deleted copy operations for RAII guard classes (PR #184168)   Jaydeep Chauhan via llvm-commits
• [llvm] [NFC][TableGen] Add deleted copy operations for RAII guard classes (PR #184168)   Jaydeep Chauhan via llvm-commits
• [llvm] [NFC][TableGen] Add deleted copy operations for RAII guard classes (PR #184168)   Jaydeep Chauhan via llvm-commits
• [llvm] [X86] Optimized ADD + ADC to ADC (PR #173543)   Jaydeep Chauhan via llvm-commits
• [flang] [llvm] [Flang] Adding lowering for the allocation and deallocation of coarrays (PR #182110)   Jean-Didier PAILLEUX via llvm-commits
• [flang] [llvm] [Flang] Adding lowering for the allocation and deallocation of coarrays (PR #182110)   Jean-Didier PAILLEUX via llvm-commits
• [flang] [llvm] [Flang] Adding lowering for the allocation and deallocation of coarrays (PR #182110)   Jean-Didier PAILLEUX via llvm-commits
• [flang] [llvm] [Flang] Adding lowering for the allocation and deallocation of coarrays (PR #182110)   Jean-Didier PAILLEUX via llvm-commits
• [flang] [llvm] [Flang] Adding lowering for the allocation and deallocation of coarrays (PR #182110)   Jean-Didier PAILLEUX via llvm-commits
• [flang] [llvm] [Flang] Adding lowering for the allocation and deallocation of coarrays (PR #182110)   Jean-Didier PAILLEUX via llvm-commits
• [flang] [llvm] [Flang] Adding lowering for the allocation and deallocation of coarrays (PR #182110)   Jean-Didier PAILLEUX via llvm-commits
• [llvm] [AMDGPU] Add VRegToVreg hint for MFMA Dst and OpC (PR #185218)   Jeffrey Byrnes via llvm-commits
• [llvm] [VectorCombine] Merge duplicate shuffle instruction nodes (PR #182768)   Jerry Dang via llvm-commits
• [lld] [ELF] Add target-specific relocation scanning for RISC-V (PR #181332)   Jessica Clarke via llvm-commits
• [lld] [ELF] Add target-specific relocation scanning for RISC-V (PR #181332)   Jessica Clarke via llvm-commits
• [lld] [ELF] Add target-specific relocation scanning for RISC-V (PR #181332)   Jessica Clarke via llvm-commits
• [lld] [ELF] Add target-specific relocation scanning for RISC-V (PR #181332)   Jessica Clarke via llvm-commits
• [lld] [ELF] Add target-specific relocation scanning for x86 (PR #178846)   Jessica Clarke via llvm-commits
• [llvm] [RISCV][GISel] Replace buildInstr with BuildMI (PR #183714)   Jianjian Guan via llvm-commits
• [llvm] [RISCV][GISel] Replace buildInstr with BuildMI (PR #183714)   Jianjian Guan via llvm-commits
• [llvm] [RISCV][GISel] Replace buildInstr with BuildMI (PR #183714)   Jianjian Guan via llvm-commits
• [llvm] [RISCV][GISel] Support select G_INSERT_SUBVECTOR (PR #171092)   Jianjian Guan via llvm-commits
• [llvm] [RISCV][GISel] Support select G_INSERT_SUBVECTOR (PR #171092)   Jianjian Guan via llvm-commits
• [llvm] [RISCV][GISel] Support select G_INSERT_SUBVECTOR (PR #171092)   Jianjian Guan via llvm-commits
• [llvm] [RISCV][GISel] Support select G_INSERT_SUBVECTOR (PR #171092)   Jianjian Guan via llvm-commits
• [llvm] [RISCV][GISel] Support select G_INSERT_SUBVECTOR (PR #171092)   Jianjian Guan via llvm-commits
• [llvm] [CodeGen][TTI] Reduce funnel shift cost for constant shift amounts (PR #184942)   Jim Lin via llvm-commits
• [llvm] [CodeGen][TTI] Reduce funnel shift cost for constant shift amounts (PR #184942)   Jim Lin via llvm-commits
• [llvm] [RISCV] Update Andes45 vector mask scheduling info (PR #184719)   Jim Lin via llvm-commits
• [llvm] [profcheck][coro] Adding Branch weights PGO in CoroSplit and CoroFrame Passes (PR #184466)   Jin Huang via llvm-commits
• [llvm] [profcheck][coro] Adding Branch weights PGO in CoroSplit and CoroFrame Passes (PR #184466)   Jin Huang via llvm-commits
• [llvm] [profcheck][coro] Adding Branch weights PGO in Coroutines Passes (PR #184466)   Jin Huang via llvm-commits
• [llvm] [profcheck][coro] Adding Branch weights PGO in Coroutines Passes (PR #184466)   Jin Huang via llvm-commits
• [llvm] [profcheck][coro] Adding Branch weights PGO in Coroutines Passes (PR #184466)   Jin Huang via llvm-commits
• [llvm] [profcheck][coro] Adding Branch weights PGO in Coroutines Passes (PR #184466)   Jin Huang via llvm-commits
• [llvm] [profcheck][coro] Adding Branch weights PGO in Coroutines Passes (PR #184466)   Jin Huang via llvm-commits
• [llvm] [profcheck][coro] Adding Branch weights PGO in Coroutines Passes (PR #184466)   Jin Huang via llvm-commits
• [llvm] [profcheck][coro] Adding Branch weights PGO in Coroutines Passes (PR #184466)   Jin Huang via llvm-commits
• [llvm] [profcheck][coro] Adding Branch weights PGO in Coroutines Passes (PR #184466)   Jin Huang via llvm-commits
• [llvm] [profcheck][coro] Adding Branch weights PGO in Coroutines Passes (PR #184466)   Jin Huang via llvm-commits
• [llvm] [LoopUnroll][NFC] Record conditional latch info (PR #182403)   Joel E. Denny via llvm-commits
• [llvm] [SLP] Loop aware cost model/tree building (PR #150450)   Joel E. Denny via llvm-commits
• [llvm] [VPlan] Don't use the legacy cost model for loop conditions (PR #156864)   John Brawn via llvm-commits
• [llvm] [VPlan] Don't use the legacy cost model for loop conditions (PR #156864)   John Brawn via llvm-commits
• [llvm] [VPlan] Don't use the legacy cost model for loop conditions (PR #156864)   John Brawn via llvm-commits
• [llvm] [VPlan] Add the cost of spills when considering register pressure (PR #179646)   John Brawn via llvm-commits
• [llvm] [VPlan] Don't use the legacy cost model for loop conditions (PR #156864)   John Brawn via llvm-commits
• [llvm] [VPlan] Don't use the legacy cost model for loop conditions (PR #156864)   John Brawn via llvm-commits
• [llvm] [LSR] Remove unnecessary WidestFixupType (NFC) (PR #185013)   John Brawn via llvm-commits
• [llvm] [LSR] Remove unnecessary WidestFixupType (NFC) (PR #185013)   John Brawn via llvm-commits
• [llvm] [ObjCARC] Don't sink objc_retain past releasing atomics (PR #184113)   John McCall via llvm-commits
• [llvm] [flang-rt] Handle NAMELIST logical comments without preceding space (PR #183202)   John Otken via llvm-commits
• [lldb] [llvm] [llvm][Support] Make createUniquePath require at least one wildcard marker (PR #184688)   Jon Roelofs via llvm-commits
• [lldb] [llvm] [llvm][Support] Make createUniquePath require at least one wildcard marker (PR #184688)   Jon Roelofs via llvm-commits
• [llvm] [dsymutil] Use DebugMapFilter when parsing --allow/--disallow YAML input (PR #185061)   Jonas Devlieghere via llvm-commits
• [lldb] [llvm] [Support] Move HTTP client/server to new LLVMSupportHTTP lib (NFC) (PR #184572)   Jonas Devlieghere via llvm-commits
• [lldb] [llvm] [Support] Move HTTP client/server to new LLVMSupportHTTP lib (NFC) (PR #184572)   Jonas Devlieghere via llvm-commits
• [lldb] [llvm] [Support] Move HTTP client/server to new LLVMSupportHTTP lib (NFC) (PR #184572)   Jonas Devlieghere via llvm-commits
• [llvm] [SystemZ] Add a SystemZ specific pre-RA scheduling strategy. (PR #135076)   Jonas Paulsson via llvm-commits
• [llvm] Enable LoopVectorizer interleaving for vectorized loops. (PR #184306)   Jonas Paulsson via llvm-commits
• [clang] [llvm] [AArch64][clang][llvm] Add ACLE `stshh` atomic store builtin (PR #181386)   Jonathan Thackray via llvm-commits
• [clang] [llvm] [AArch64][clang][llvm] Add ACLE `stshh` atomic store builtin (PR #181386)   Jonathan Thackray via llvm-commits
• [clang] [llvm] [AArch64][clang][llvm] Add ACLE `stshh` atomic store builtin (PR #181386)   Jonathan Thackray via llvm-commits
• [clang] [llvm] [AArch64][clang][llvm] Add ACLE `stshh` atomic store builtin (PR #181386)   Jonathan Thackray via llvm-commits
• [clang] [llvm] [AArch64][clang][llvm] Add ACLE `stshh` atomic store builtin (PR #181386)   Jonathan Thackray via llvm-commits
• [clang] [llvm] [AArch64][clang][llvm] Add ACLE `stshh` atomic store builtin (PR #181386)   Jonathan Thackray via llvm-commits
• [clang] [llvm] [AArch64][clang][llvm] Add ACLE `stshh` atomic store builtin (PR #181386)   Jonathan Thackray via llvm-commits
• [llvm] [AArch64] Add partial reduce patterns for new fdot instructions (PR #184659)   Jonathan Thackray via llvm-commits
• [clang] [llvm] [AArch64][clang][llvm] Add ACLE `stshh` atomic store builtin (PR #181386)   Jonathan Thackray via llvm-commits
• [clang] [llvm] [AArch64][clang][llvm] Add ACLE `stshh` atomic store builtin (PR #181386)   Jonathan Thackray via llvm-commits
• [clang] [llvm] [AArch64][clang][llvm] Add ACLE `stshh` atomic store builtin (PR #181386)   Jonathan Thackray via llvm-commits
• [llvm] [AArch64][llvm] Gate some `tlbip` insns with either +tlbid or +d128 (PR #178913)   Jonathan Thackray via llvm-commits
• [llvm] [AArch64][llvm] Gate some `tlbip` insns with either +tlbid or +d128 (PR #178913)   Jonathan Thackray via llvm-commits
• [llvm] [AArch64][llvm] Gate some `tlbip` insns with either +tlbid or +d128 (PR #178913)   Jonathan Thackray via llvm-commits
• [llvm] [AArch64][llvm] Gate some `tlbip` insns with either +tlbid or +d128 (PR #178913)   Jonathan Thackray via llvm-commits
• [clang] [llvm] [AArch64][clang][llvm] Add ACLE `stshh` atomic store builtin (PR #181386)   Jonathan Thackray via llvm-commits
• [clang] [llvm] [AArch64][clang][llvm] Add ACLE `stshh` atomic store builtin (PR #181386)   Jonathan Thackray via llvm-commits
• [clang] [llvm] [AArch64][clang][llvm] Add ACLE `stshh` atomic store builtin (PR #181386)   Jonathan Thackray via llvm-commits
• [clang] [llvm] [AArch64][clang][llvm] Add ACLE `stshh` atomic store builtin (PR #181386)   Jonathan Thackray via llvm-commits
• [clang] [llvm] [AArch64][clang][llvm] Add ACLE `stshh` atomic store builtin (PR #181386)   Jonathan Thackray via llvm-commits
• [clang] [llvm] [AArch64][clang][llvm] Add ACLE `stshh` atomic store builtin (PR #181386)   Jonathan Thackray via llvm-commits
• [clang] [llvm] [AArch64][clang][llvm] Add ACLE `stshh` atomic store builtin (PR #181386)   Jonathan Thackray via llvm-commits
• [clang] [llvm] [AArch64][clang][llvm] Add ACLE `stshh` atomic store builtin (PR #181386)   Jonathan Thackray via llvm-commits
• [llvm] [LLVM][AArch64] Allow vector converts to run in streaming mode with … (PR #177375)   Jonathan Thackray via llvm-commits
• [llvm] [LLVM][AArch64] Allow vector converts to run in streaming mode with … (PR #177375)   Jonathan Thackray via llvm-commits
• [lldb] [llvm] [AArch64][llvm] Tighten SYSP parsing; don't disassemble invalid encodings (PR #182410)   Jonathan Thackray via llvm-commits
• [lldb] [llvm] [AArch64][llvm] Tighten SYSP parsing; don't disassemble invalid encodings (PR #182410)   Jonathan Thackray via llvm-commits
• [lldb] [llvm] [AArch64][llvm] Tighten SYSP parsing; don't disassemble invalid encodings (PR #182410)   Jonathan Thackray via llvm-commits
• [llvm] [AArch64][llvm] Update Armv9.7-A dependencies (PR #185034)   Jonathan Thackray via llvm-commits
• [llvm] [AArch64][llvm] Update Armv9.7-A dependencies (PR #185034)   Jonathan Thackray via llvm-commits
• [llvm] [AArch64][llvm] Update Armv9.7-A dependencies (PR #185034)   Jonathan Thackray via llvm-commits
• [lldb] [llvm] [AArch64][llvm] Tighten SYSP parsing; don't disassemble invalid encodings (PR #182410)   Jonathan Thackray via llvm-commits
• [lldb] [llvm] [AArch64][llvm] Tighten SYSP parsing; don't disassemble invalid encodings (PR #182410)   Jonathan Thackray via llvm-commits
• [lldb] [llvm] [AArch64][llvm] Tighten SYSP parsing; don't disassemble invalid encodings (PR #182410)   Jonathan Thackray via llvm-commits
• [llvm] [AArch64][llvm] Update Armv9.7-A dependencies (PR #185034)   Jonathan Thackray via llvm-commits
• [llvm] [AArch64][llvm] Update Armv9.7-A dependencies (PR #185034)   Jonathan Thackray via llvm-commits
• [llvm] [AArch64][llvm] Update Armv9.7-A dependencies (PR #185034)   Jonathan Thackray via llvm-commits
• [llvm] [AArch64] Fix more typos (NFC) (PR #183086)   Jonathan Thackray via llvm-commits
• [llvm] [AArch64][llvm] Update Armv9.7-A dependencies (PR #185034)   Jonathan Thackray via llvm-commits
• [llvm] [AArch64][llvm] Update Armv9.7-A dependencies (PR #185034)   Jonathan Thackray via llvm-commits
• [llvm] [mlir][bazel] Fix build after changes from #183856. (PR #184134)   Jordan Rupprecht via llvm-commits
• [llvm] [mlir][bazel] Fix build after changes from #183856. (PR #184134)   Jordan Rupprecht via llvm-commits
• [llvm] [bazel][libc] Enable layering_check for libc/BUILD.bazel (PR #183822)   Jordan Rupprecht via llvm-commits
• [llvm] [bazel][libc] Add missing dep (PR #184152)   Jordan Rupprecht via llvm-commits
• [llvm] [bazel][libc] Add missing dep (PR #184152)   Jordan Rupprecht via llvm-commits
• [llvm] [bazel][libc] Add missing dep (PR #184152)   Jordan Rupprecht via llvm-commits
• [llvm] [bazel][mlir][acc] Port 12f4eb2156559c2f8c99fa7dc3b59cb4fef1389d: scf.yield (PR #184216)   Jordan Rupprecht via llvm-commits
• [llvm] [bazel][mlir][acc] Port 12f4eb2156559c2f8c99fa7dc3b59cb4fef1389d: scf.yield (PR #184216)   Jordan Rupprecht via llvm-commits
• [llvm] [bazel] Fix building lldb without libedit (PR #184535)   Jordan Rupprecht via llvm-commits
• [llvm] [bazel] Fix more parse_headers cases in lldb (PR #184534)   Jordan Rupprecht via llvm-commits
• [llvm] [bazel] Fix more parse_headers cases in lldb (PR #184534)   Jordan Rupprecht via llvm-commits
• [llvm] [bazel] Fix more parse_headers cases in lldb (PR #184534)   Jordan Rupprecht via llvm-commits
• [llvm] [bazel] Add target for `clang-nvlink-wrapper` (PR #184644)   Jordan Rupprecht via llvm-commits
• [llvm] [bazel] Bump to latest point release (PR #185139)   Jordan Rupprecht via llvm-commits
• [llvm] [bazel] Disable parse_headers on gtest headers (PR #185138)   Jordan Rupprecht via llvm-commits
• [llvm] [SandboxVec][DAG] Handle unscheduled successors when user is external (PR #183861)   Jorge Gorbe Moya via llvm-commits
• [llvm] [offload] Add properties parameter to olLaunchKernel (PR #184343)   Joseph Huber via llvm-commits
• [llvm] [offload] Add properties parameter to olLaunchKernel (PR #184343)   Joseph Huber via llvm-commits
• [llvm] [offload] Add properties parameter to olLaunchKernel (PR #184343)   Joseph Huber via llvm-commits
• [llvm] [offload] Add properties parameter to olLaunchKernel (PR #184343)   Joseph Huber via llvm-commits
• [llvm] [offload] Add properties parameter to olLaunchKernel (PR #184343)   Joseph Huber via llvm-commits
• [llvm] [offload] Add properties parameter to olLaunchKernel (PR #184343)   Joseph Huber via llvm-commits
• [llvm] [offload] Add properties parameter to olLaunchKernel (PR #184343)   Joseph Huber via llvm-commits
• [llvm] [offload] Add properties parameter to olLaunchKernel (PR #184343)   Joseph Huber via llvm-commits
• [llvm] [offload] Add properties parameter to olLaunchKernel (PR #184343)   Joseph Huber via llvm-commits
• [llvm] [flang-rt] Fix NVPTX builds erroneously using backtrace support (PR #184415)   Joseph Huber via llvm-commits
• [llvm] [flang-rt] Fix incorrect condition for removing backtrace (PR #184610)   Joseph Huber via llvm-commits
• [llvm] [flang-rt] Fix incorrect condition for removing backtrace (PR #184610)   Joseph Huber via llvm-commits
• [llvm] [offload] Add properties parameter to olLaunchKernel (PR #184343)   Joseph Huber via llvm-commits
• [llvm] [offload] Add properties parameter to olLaunchKernel (PR #184343)   Joseph Huber via llvm-commits
• [llvm] [offload] Add properties parameter to olLaunchKernel (PR #184343)   Joseph Huber via llvm-commits
• [llvm] [offload] Add properties parameter to olLaunchKernel (PR #184343)   Joseph Huber via llvm-commits
• [llvm] [offload] Add properties parameter to olLaunchKernel (PR #184343)   Joseph Huber via llvm-commits
• [llvm] [offload] Add properties parameter to olLaunchKernel (PR #184343)   Joseph Huber via llvm-commits
• [llvm] [offload] Add properties parameter to olLaunchKernel (PR #184343)   Joseph Huber via llvm-commits
• [llvm] [offload] Add properties parameter to olLaunchKernel (PR #184343)   Joseph Huber via llvm-commits
• [clang] [llvm] [Clang] Only define `wchar_size` module flag if non-standard (PR #184668)   Joseph Huber via llvm-commits
• [clang] [llvm] [Clang] Only define `wchar_size` module flag if non-standard (PR #184668)   Joseph Huber via llvm-commits
• [clang] [llvm] [Clang] Only define `wchar_size` module flag if non-standard (PR #184668)   Joseph Huber via llvm-commits
• [llvm] [llvm][tools] Improve llvm-gpu-loader checks (PR #184791)   Joseph Huber via llvm-commits
• [llvm] [llvm][tools] Improve llvm-gpu-loader checks (PR #184791)   Joseph Huber via llvm-commits
• [llvm] [llvm][tools] Add support to llvm-offload-binary to unbundle spirv64-intel images (PR #184774)   Joseph Huber via llvm-commits
• [llvm] [llvm][tools] Add support to llvm-offload-binary to unbundle spirv64-intel images (PR #184774)   Joseph Huber via llvm-commits
• [llvm] [llvm][tools] Add support to llvm-offload-binary to unbundle spirv64-intel images (PR #184774)   Joseph Huber via llvm-commits
• [llvm] [llvm][tools] Add support to llvm-offload-binary to unbundle spirv64-intel images (PR #184774)   Joseph Huber via llvm-commits
• [llvm] [llvm][tools] Add support to llvm-offload-binary to unbundle spirv64-intel images (PR #184774)   Joseph Huber via llvm-commits
• [llvm] [llvm][tools] Improve llvm-gpu-loader checks (PR #184791)   Joseph Huber via llvm-commits
• [llvm] [OFFLOAD] Replace C-style casts with C++ style casts in obtainInfoImpl (PR #185023)   Joseph Huber via llvm-commits
• [flang] [llvm] [flang-rt] Remove experiemental OpenMP offloading support (PR #183653)   Joseph Huber via llvm-commits
• [llvm] [SPIR-V] Fix lowering of declarations with hidden visibility (PR #185029)   Joseph Huber via llvm-commits
• [llvm] [OFFLOAD] Replace C-style casts with C++ style casts in obtainInfoImpl (PR #185023)   Joseph Huber via llvm-commits
• [clang] [llvm] [LLVM] Introduce late-resolved LLVM intrinsics and Clang builtins (PR #185147)   Joseph Huber via llvm-commits
• [clang] [llvm] [LLVM] Introduce late-resolved LLVM intrinsics and Clang builtins (PR #185147)   Joseph Huber via llvm-commits
• [clang] [llvm] [LLVM] Introduce late-resolved LLVM intrinsics and Clang builtins (PR #185147)   Joseph Huber via llvm-commits
• [llvm] [AMDGPU] Add VRegToVreg hint for MFMA Dst and OpC (PR #185218)   Josh Hutton via llvm-commits
• [clang] [llvm] [HLSL] Add WaveActiveAllEqual functions (PR #183634)   Joshua Batista via llvm-commits
• [clang] [llvm] [HLSL] Add WaveActiveAllEqual functions (PR #183634)   Joshua Batista via llvm-commits
• [llvm] [Analysis][DXILResource] Correct bound computation (PR #184198)   Joshua Batista via llvm-commits
• [llvm] [Analysis][DXILResource] Correct bound computation (PR #184198)   Joshua Batista via llvm-commits
• [clang] [llvm] [HLSL] Add WaveActiveAllEqual functions (PR #183634)   Joshua Batista via llvm-commits
• [clang] [llvm] [HLSL] Add WaveActiveAllEqual functions (PR #183634)   Joshua Batista via llvm-commits
• [clang] [llvm] [HLSL][DXIL][SPIRV] Added WaveActiveBitOr HLSL intrinsic (PR #165156)   Joshua Batista via llvm-commits
• [llvm] [llvm-symbolizer] Have --obj participate in markup resolution (PR #183444)   Joshua Seaton via llvm-commits
• [llvm] [llvm-symbolizer] Have --obj participate in markup resolution (PR #183444)   Joshua Seaton via llvm-commits
• [llvm] [llvm-symbolizer] Have --obj participate in markup resolution (PR #183444)   Joshua Seaton via llvm-commits
• [llvm] [llvm-symbolizer] Have --obj participate in markup resolution (PR #183444)   Joshua Seaton via llvm-commits
• [llvm] [llvm-symbolizer] Have --obj participate in markup resolution (PR #183444)   Joshua Seaton via llvm-commits
• [llvm] [llvm-symbolizer] Have --obj participate in markup resolution (PR #183444)   Joshua Seaton via llvm-commits
• [llvm] [llvm-symbolizer] Have --obj participate in markup resolution (PR #183444)   Joshua Seaton via llvm-commits
• [llvm] [SPIR-V] Don't consider a function be a builtin just by checking name (PR #182776)   Juan Manuel Martinez Caamaño via llvm-commits
• [llvm] [SPIR-V] Don't consider a function be a builtin just by checking name (PR #182776)   Juan Manuel Martinez Caamaño via llvm-commits
• [llvm] [SPIR-V] Don't consider a function be a builtin just by checking name (PR #182776)   Juan Manuel Martinez Caamaño via llvm-commits
• [llvm] [SPIR-V] Don't consider a function be a builtin just by checking name (PR #182776)   Juan Manuel Martinez Caamaño via llvm-commits
• [llvm] [SPIRV] Fix global emission for modules with no functions (PR #183833)   Juan Manuel Martinez Caamaño via llvm-commits
• [llvm] [SPIRV] Fix global emission for modules with no functions (PR #183833)   Juan Manuel Martinez Caamaño via llvm-commits
• [llvm] [SPIRV] Fix global emission for modules with no functions (PR #183833)   Juan Manuel Martinez Caamaño via llvm-commits
• [llvm] [SPIRV] Fix global emission for modules with no functions (PR #183833)   Juan Manuel Martinez Caamaño via llvm-commits
• [llvm] [SPIRV] Update the global registry when expanding function pointer (PR #183873)   Juan Manuel Martinez Caamaño via llvm-commits
• [llvm] [SPIRV] Update the global registry when expanding function pointer (PR #183873)   Juan Manuel Martinez Caamaño via llvm-commits
• [llvm] [NFC][SPIRV] Rename `selectSelectDefaultArgs` to `selectExtendBool` (PR #184120)   Juan Manuel Martinez Caamaño via llvm-commits
• [llvm] [NFC][SPIRV] Rename `selectSelectDefaultArgs` to `selectExtendBool` (PR #184120)   Juan Manuel Martinez Caamaño via llvm-commits
• [llvm] [AMDGPU][SIInsertWaitcnts] WaitEventSet const_iterator (PR #182965)   Juan Manuel Martinez Caamaño via llvm-commits
• [llvm] [SPIRV] Update the global registry when expanding function pointer (PR #183873)   Juan Manuel Martinez Caamaño via llvm-commits
• [llvm] [SPIRV] Don't emit service function basic block names (PR #184206)   Juan Manuel Martinez Caamaño via llvm-commits
• [llvm] [SPIR-V] Complete SPV_INTEL_16bit_atomics extension support (PR #184312)   Juan Manuel Martinez Caamaño via llvm-commits
• [llvm] [SPIR-V] Complete SPV_INTEL_16bit_atomics extension support (PR #184312)   Juan Manuel Martinez Caamaño via llvm-commits
• [llvm] [SPIR-V] Complete SPV_INTEL_16bit_atomics extension support (PR #184312)   Juan Manuel Martinez Caamaño via llvm-commits
• [llvm] [SPIR-V] Complete SPV_INTEL_16bit_atomics extension support (PR #184312)   Juan Manuel Martinez Caamaño via llvm-commits
• [llvm] [SPIR-V] Complete SPV_INTEL_16bit_atomics extension support (PR #184312)   Juan Manuel Martinez Caamaño via llvm-commits
• [llvm] [SPIR-V] Complete SPV_INTEL_16bit_atomics extension support (PR #184312)   Juan Manuel Martinez Caamaño via llvm-commits
• [llvm] [SPIR-V] Complete SPV_INTEL_16bit_atomics extension support (PR #184312)   Juan Manuel Martinez Caamaño via llvm-commits
• [llvm] [SPIRV] Update the global registry when expanding function pointer (PR #183873)   Juan Manuel Martinez Caamaño via llvm-commits
• [llvm] [SPIRV] Update the global registry when expanding function pointer (PR #183873)   Juan Manuel Martinez Caamaño via llvm-commits
• [llvm] [SPIRV] Fix global emission for modules with no functions (PR #183833)   Juan Manuel Martinez Caamaño via llvm-commits
• [llvm] [SPIR-V] Complete SPV_INTEL_16bit_atomics extension support (PR #184312)   Juan Manuel Martinez Caamaño via llvm-commits
• [llvm] [NFC][SPIRV] Rename `selectSelectDefaultArgs` to `selectExtendBool` (PR #184120)   Juan Manuel Martinez Caamaño via llvm-commits
• [llvm] AMDGPU: Fix copy of Triple (PR #184594)   Juan Manuel Martinez Caamaño via llvm-commits
• [llvm] AMDGPU: Fix copy of Triple (PR #184594)   Juan Manuel Martinez Caamaño via llvm-commits
• [llvm] [SPIR-V] Add lowering of ptrtoaddr (PR #184577)   Juan Manuel Martinez Caamaño via llvm-commits
• [llvm] [SPIR-V] Add lowering of ptrtoaddr (PR #184577)   Juan Manuel Martinez Caamaño via llvm-commits
• [llvm] [SPIR-V] Add lowering of ptrtoaddr (PR #184577)   Juan Manuel Martinez Caamaño via llvm-commits
• [llvm] [SPIR-V] Add lowering of ptrtoaddr (PR #184577)   Juan Manuel Martinez Caamaño via llvm-commits
• [llvm] [NFC][SPIRV] Rename `selectSelectDefaultArgs` to `selectExtendBool` (PR #184120)   Juan Manuel Martinez Caamaño via llvm-commits
• [llvm] [NFC][SPIRV] Rename `selectSelectDefaultArgs` to `selectExtendBool` (PR #184120)   Juan Manuel Martinez Caamaño via llvm-commits
• [llvm] [NFC][SPIRV] Rename `selectSelectDefaultArgs` to `selectBoolToInt` (PR #184120)   Juan Manuel Martinez Caamaño via llvm-commits
• [llvm] [NFC][SPIRV] Rename `selectSelectDefaultArgs` to `selectBoolToInt` (PR #184120)   Juan Manuel Martinez Caamaño via llvm-commits
• [llvm] [SPIR-V] Add lowering of ptrtoaddr (PR #184577)   Juan Manuel Martinez Caamaño via llvm-commits
• [llvm] [SPIR-V] Add lowering of ptrtoaddr (PR #184577)   Juan Manuel Martinez Caamaño via llvm-commits
• [llvm] [NFC][SPIRV] Rename `selectSelectDefaultArgs` to `selectBoolToInt` (PR #184120)   Juan Manuel Martinez Caamaño via llvm-commits
• [llvm] [SPIRV] Rename `selectSelectDefaultArgs` to `selectBoolToInt` (PR #184120)   Juan Manuel Martinez Caamaño via llvm-commits
• [llvm] [SPIRV] Rename `selectSelectDefaultArgs` to `selectBoolToInt` (PR #184120)   Juan Manuel Martinez Caamaño via llvm-commits
• [llvm] [SPIRV] Rename `selectSelectDefaultArgs` to `selectBoolToInt` (PR #184120)   Juan Manuel Martinez Caamaño via llvm-commits
• [llvm] [SPIRV] Fix return value of runOnModule for SPIRVPrepareFunctions (PR #184636)   Juan Manuel Martinez Caamaño via llvm-commits
• [llvm] [SPIRV] Update the global registry when expanding function pointer (PR #183873)   Juan Manuel Martinez Caamaño via llvm-commits
• [llvm] Reapply "[SPIRV] Emit intrinsics for globals only in function that references them (#178143 (#179268)) (PR #182552)   Juan Manuel Martinez Caamaño via llvm-commits
• [llvm] Reapply "[SPIRV] Emit intrinsics for globals only in function that references them (#178143 (#179268)) (PR #182552)   Juan Manuel Martinez Caamaño via llvm-commits
• [llvm] Reapply "[SPIRV] Emit intrinsics for globals only in function that references them (#178143 (#179268)) (PR #182552)   Juan Manuel Martinez Caamaño via llvm-commits
• [llvm] [SPIRV][Debug Info] DebugCompilationUnit refactor for DebugFunction support (PR #183117)   Juan Manuel Martinez Caamaño via llvm-commits
• [llvm] Reapply "[SPIRV] Emit intrinsics for globals only in function that references them (#178143 (#179268)) (PR #182552)   Juan Manuel Martinez Caamaño via llvm-commits
• [llvm] [SPIRV] Replace `removeFromParent` with `eraseFromParent` for `ASSING_TYPE` (PR #184793)   Juan Manuel Martinez Caamaño via llvm-commits
• [llvm] [NFC][SPIRV] Remove `MachineInstr` from `DeadMIs` set after erasing it (PR #184795)   Juan Manuel Martinez Caamaño via llvm-commits
• [llvm] [SPIRV] In G_SELECT selection path: replace `removeFromParent` with `eraseFromParent` and return early (PR #184807)   Juan Manuel Martinez Caamaño via llvm-commits
• [llvm] [SPIRV] In G_SELECT selection path: replace `removeFromParent` with `eraseFromParent` and return early (PR #184807)   Juan Manuel Martinez Caamaño via llvm-commits
• [llvm] [SPIRV][NFC] Update tests to check `spirv-val` output (PR #182549)   Juan Manuel Martinez Caamaño via llvm-commits
• [llvm] [SPIRV][NFC] Update `SPV_INTEL_function_pointers` tests to check `spirv-val` output (PR #182549)   Juan Manuel Martinez Caamaño via llvm-commits
• [llvm] [SPIRV][NFC] Update `SPV_INTEL_function_pointers` tests to check `spirv-val` output (PR #182549)   Juan Manuel Martinez Caamaño via llvm-commits
• [llvm] [SPIRV][NFC] Update `SPV_INTEL_function_pointers` tests to check `spirv-val` output (PR #182549)   Juan Manuel Martinez Caamaño via llvm-commits
• [llvm] [UniformityAnalysis] Track uniform values for conservative divergence queries (PR #180509)   Juan Manuel Martinez Caamaño via llvm-commits
• [llvm] [UniformityAnalysis] Track uniform values for conservative divergence queries (PR #180509)   Juan Manuel Martinez Caamaño via llvm-commits
• [llvm] [UniformityAnalysis] Track uniform values for conservative divergence queries (PR #180509)   Juan Manuel Martinez Caamaño via llvm-commits
• [llvm] [NFC][SPIRV] Rename files from `SPV_INTEL_arbitrary_precision_integers/floating` to `SPV_ALTERA_arbitrary_precision_integers/floating` (PR #184996)   Juan Manuel Martinez Caamaño via llvm-commits
• [llvm] [UniformityAnalysis] Track uniform values for conservative divergence queries (PR #180509)   Juan Manuel Martinez Caamaño via llvm-commits
• [llvm] [SPIRV] In G_SELECT selection path: replace `removeFromParent` with `eraseFromParent` and return early (PR #184807)   Juan Manuel Martinez Caamaño via llvm-commits
• [llvm] [NFC][SPIRV] Rename files from `SPV_INTEL_arbitrary_precision_integers/floating` to `SPV_ALTERA_arbitrary_precision_integers/floating` (PR #184996)   Juan Manuel Martinez Caamaño via llvm-commits
• [llvm] [SPIRV][Debug Info] DebugCompilationUnit refactor for DebugFunction support (PR #183117)   Juan Manuel Martinez Caamaño via llvm-commits
• [llvm] [SPIRV] In G_SELECT selection path: replace `removeFromParent` with `eraseFromParent` and return early (PR #184807)   Juan Manuel Martinez Caamaño via llvm-commits
• [llvm] [VPlan] Preserve IsSingleScalar for sunken predicated stores. (PR #184329)   Julian Nagele via llvm-commits
• [llvm] [VPlan] Preserve IsSingleScalar for sunken predicated stores. (PR #184329)   Julian Nagele via llvm-commits
• [llvm] [VPlan] Preserve IsSingleScalar for sunken predicated stores. (PR #184329)   Julian Nagele via llvm-commits
• [llvm] [VPlan] Preserve IsSingleScalar for sunken predicated stores. (PR #184329)   Julian Nagele via llvm-commits
• [llvm] [VPlan] Preserve IsSingleScalar for hoisted predicated load. (PR #184453)   Julian Nagele via llvm-commits
• [llvm] [ConstantTime][LLVM] Add llvm.ct.select intrinsic with generic SelectionDAG lowering (PR #166702)   Julius Alexandre via llvm-commits
• [llvm] [ConstantTime][LLVM] Add llvm.ct.select intrinsic with generic SelectionDAG lowering (PR #166702)   Julius Alexandre via llvm-commits
• [llvm] [ConstantTime][LLVM] Add llvm.ct.select intrinsic with generic SelectionDAG lowering (PR #166702)   Julius Alexandre via llvm-commits
• [llvm] Allow the nolds modifier (PR #185129)   Jun Wang via llvm-commits
• [llvm] [Windows][test] Fix "LLVM" test failures when LLVM_WINDOWS_PREFER_FORWARD_SLASH is ON (PR #184556)   Junji Watanabe via llvm-commits
• [llvm] [Windows][test] Fix "LLVM" test failures when LLVM_WINDOWS_PREFER_FORWARD_SLASH is ON (PR #184556)   Junji Watanabe via llvm-commits
• [llvm] [Windows][test] Fix "LLVM" test failures when LLVM_WINDOWS_PREFER_FORWARD_SLASH is ON (PR #184556)   Junji Watanabe via llvm-commits
• [llvm] [Windows][test] Fix "LLVM" test failures when LLVM_WINDOWS_PREFER_FORWARD_SLASH is ON (PR #184556)   Junji Watanabe via llvm-commits
• [llvm] [Windows][test] Fix "LLVM" test failures when LLVM_WINDOWS_PREFER_FORWARD_SLASH is ON (PR #184556)   Junji Watanabe via llvm-commits
• [llvm] [Windows][test] Fix "LLVM" test failures when LLVM_WINDOWS_PREFER_FORWARD_SLASH is ON (PR #184556)   Junji Watanabe via llvm-commits
• [llvm] [Windows][test] Fix "LLVM" test failures when LLVM_WINDOWS_PREFER_FORWARD_SLASH is ON (PR #184556)   Junji Watanabe via llvm-commits
• [llvm] [Windows][test] Fix "LLVM" test failures when LLVM_WINDOWS_PREFER_FORWARD_SLASH is ON (PR #184556)   Junji Watanabe via llvm-commits
• [llvm] [Windows][test] Fix "LLVM" test failures when LLVM_WINDOWS_PREFER_FORWARD_SLASH is ON (PR #184556)   Junji Watanabe via llvm-commits
• [llvm] [Windows][test] Fix "LLVM" test failures when LLVM_WINDOWS_PREFER_FORWARD_SLASH is ON (PR #184556)   Junji Watanabe via llvm-commits
• [llvm] [Windows][test] Fix "LLVM" test failures when LLVM_WINDOWS_PREFER_FORWARD_SLASH is ON (PR #184556)   Junji Watanabe via llvm-commits
• [llvm] [HLSL][SPIRV] Fix `faceforward` pattern matcher logic (PR #183630)   Justin Bogner via llvm-commits
• [llvm] [DirectX] Split long vectors in DXILResourceAccess (PR #184732)   Justin Bogner via llvm-commits
• [llvm] [LoopUnroll] Change computeUnrollCount to return void; refactor PragmaInfo (PR #184244)   Justin Fargnoli via llvm-commits
• [llvm] [LoopUnroll] Change computeUnrollCount to return void; refactor PragmaInfo (PR #184244)   Justin Fargnoli via llvm-commits
• [llvm] [LoopUnrollPass] Add `const` to parameters in `computeUnrollCount` (NFC) (PR #184058)   Justin Fargnoli via llvm-commits
• [llvm] [LoopUnrollPass] Add `const` to parameters in `computeUnrollCount` (NFC) (PR #184058)   Justin Fargnoli via llvm-commits
• [llvm] [LoopUnrollPass] Add `const` to parameters in `computeUnrollCount` (NFC) (PR #184058)   Justin Fargnoli via llvm-commits
• [llvm] [LoopUnroll] Eliminate `computeUnrollCount`'s return value (PR #184244)   Justin Fargnoli via llvm-commits
• [llvm] [LoopUnrollPass] Don't use clang specific syntax in optimization remarks (PR #182430)   Justin Fargnoli via llvm-commits
• [llvm] Initial commit (PR #184546)   Justin Fargnoli via llvm-commits
• [llvm] Initial commit (PR #184546)   Justin Fargnoli via llvm-commits
• [llvm] [LoopUnroll][NVPTX] Boost the full unroll threshold when it may allow local memory access to be eliminated (PR #184546)   Justin Fargnoli via llvm-commits
• [llvm] [LoopUnroll][NVPTX] Boost full unroll threshold to enable local memory promotion (PR #184546)   Justin Fargnoli via llvm-commits
• [llvm] [LoopUnrollPass] Don't use clang specific syntax in optimization remarks (PR #182430)   Justin Fargnoli via llvm-commits
• [llvm] [LoopUnroll] Ensure we can accept both `llvm.loop.unroll.full` and `llvm.loop.unroll.enable` metadata on the same loop (NFC) (PR #182381)   Justin Fargnoli via llvm-commits
• [llvm] [LoopUnrollPass] Don't use clang specific syntax in optimization remarks (PR #182430)   Justin Fargnoli via llvm-commits
• [llvm] [LoopUnroll] Remove `UseUpperBound` output parameter from `computeUnrollCount` (NFC) (PR #184526)   Justin Fargnoli via llvm-commits
• [llvm] [LoopUnroll] Remove `UseUpperBound` output parameter from `computeUnrollCount` (NFC) (PR #184526)   Justin Fargnoli via llvm-commits
• [llvm] [LoopUnroll] Ensure we can accept both `llvm.loop.unroll.full` and `llvm.loop.unroll.enable` metadata on the same loop (NFC) (PR #182381)   Justin Fargnoli via llvm-commits
• [llvm] [LoopUnroll] Ensure we can accept both `llvm.loop.unroll.full` and `llvm.loop.unroll.enable` metadata on the same loop (NFC) (PR #182381)   Justin Fargnoli via llvm-commits
• [llvm] [LoopUnroll] Remove `UseUpperBound` output parameter from `computeUnrollCount` (NFC) (PR #184526)   Justin Fargnoli via llvm-commits
• [llvm] [LoopUnroll] Remove `UseUpperBound` output parameter from `computeUnrollCount` (NFC) (PR #184526)   Justin Fargnoli via llvm-commits
• [llvm] [LoopUnroll] Remove `UseUpperBound` output parameter from `computeUnrollCount` (NFC) (PR #184526)   Justin Fargnoli via llvm-commits
• [llvm] [LoopUnroll] Ensure we can accept both `llvm.loop.unroll.full` and `llvm.loop.unroll.enable` metadata on the same loop (NFC) (PR #182381)   Justin Fargnoli via llvm-commits
• [llvm] [LoopUnroll][NVPTX] Boost full unroll threshold to enable local memory promotion (PR #184855)   Justin Fargnoli via llvm-commits
• [llvm] [LoopUnroll][NVPTX] Boost full unroll threshold to enable local memory promotion (PR #184546)   Justin Fargnoli via llvm-commits
• [llvm] [LoopUnroll][NVPTX] Boost full unroll threshold to enable local memory promotion (PR #184546)   Justin Fargnoli via llvm-commits
• [llvm] [LoopUnroll] Remove `computeUnrollCount()`'s return value (PR #184529)   Justin Fargnoli via llvm-commits
• [llvm] [LoopUnroll] Remove `computeUnrollCount()`'s return value (PR #184529)   Justin Fargnoli via llvm-commits
• [clang] [llvm] [Clang] Show inlining hints for __attribute__((warning/error)) (PR #174892)   Justin Stitt via llvm-commits
• [clang] [llvm] [Clang] Show inlining hints for __attribute__((warning/error)) (PR #174892)   Justin Stitt via llvm-commits
• [llvm] [ConstantFolding] Support bitcasting vectors to smaller element sizes with non-integer ratios. (PR #179640)   Kacper Doga via llvm-commits
• [llvm] [ConstantFolding] Support bitcasting vectors to smaller element sizes with non-integer ratios. (PR #179640)   Kacper Doga via llvm-commits
• [llvm] [ConstantFolding] Support bitcasting vectors to smaller element sizes with non-integer ratios. (PR #179640)   Kacper Doga via llvm-commits
• [llvm] [ConstantFolding] Support bitcasting vectors to smaller element sizes with non-integer ratios. (PR #179640)   Kacper Doga via llvm-commits
• [llvm] [ConstantFolding] Fix bitcasting vectors with non-integer ratios (PR #179640)   Kacper Doga via llvm-commits
• [llvm] [ConstantFolding] Fix bitcasting vectors with non-integer ratios (PR #179640)   Kacper Doga via llvm-commits
• [llvm] [ConstantFolding] Fix bitcasting vectors with non-integer ratios (PR #179640)   Kacper Doga via llvm-commits
• [llvm] [ConstantFolding] Fix bitcasting vectors with non-integer ratios (PR #179640)   Kacper Doga via llvm-commits
• [llvm] [ConstantFolding] Fix bitcasting vectors with non-integer ratios (PR #179640)   Kacper Doga via llvm-commits
• [llvm] [GOFF] Set reference to ADA (PR #179734)   Kai Nacke via llvm-commits
• [llvm] [GOFF] Set reference to ADA (PR #179734)   Kai Nacke via llvm-commits
• [llvm] [GOFF] Set reference to ADA (PR #179734)   Kai Nacke via llvm-commits
• [llvm] [GOFF] Set reference to ADA (PR #179734)   Kai Nacke via llvm-commits
• [llvm] [HLSL][SPIRV] Fix `faceforward` pattern matcher logic (PR #183630)   Kaitlin Peng via llvm-commits
• [flang] [llvm] [Flang][OpenMP] Fix close map flag propagation for derived types in USM (PR #185330)   Kareem Ergawy via llvm-commits
• [llvm] [NVPTX] Merge consecutive elements while buffering constant vectors with sub-byte datatype. (PR #183628)   Karthik Senthil via llvm-commits
• [compiler-rt] compiler-rt/arm: Check for overflow when adding float denorms (PR #185245)   Keith Packard via llvm-commits
• [llvm] [bazel] Fix building lldb with zlib disabled (PR #184525)   Keith Smiley via llvm-commits
• [llvm] [bazel] Fix more parse_headers cases in lldb (PR #184534)   Keith Smiley via llvm-commits
• [llvm] [bazel] Fix building lldb without libedit (PR #184535)   Keith Smiley via llvm-commits
• [llvm] [bazel] Fix building lldb without libedit (PR #184535)   Keith Smiley via llvm-commits
• [llvm] [bazel] Fix more parse_headers cases in lldb (PR #184534)   Keith Smiley via llvm-commits
• [llvm] [bazel] Fix more parse_headers cases in lldb (PR #184534)   Keith Smiley via llvm-commits
• [llvm] [bazel] Fix more parse_headers cases in lldb (PR #184534)   Keith Smiley via llvm-commits
• [llvm] [bolt][NFC] Remove unused ReorderUtils.h (PR #184642)   Keith Smiley via llvm-commits
• [llvm] [bolt][NFC] Remove unused ReorderUtils.h (PR #184642)   Keith Smiley via llvm-commits
• [llvm] [bazel] Disable parse_headers on gtest headers (PR #185138)   Keith Smiley via llvm-commits
• [llvm] [bazel] Bump to latest point release (PR #185139)   Keith Smiley via llvm-commits
• [llvm] [VPlan] Use bitfield to store Cmp predicates and GEP wrap flags. (NFC) (PR #181571)   Kelvin Li via llvm-commits
• [llvm] [VPlan] Use pragma pack(1) for VPIRFlags on AIX. (PR #184687)   Kelvin Li via llvm-commits
• [clang] [flang] [llvm] [flang] Add runtime trampoline pool for W^X compliance (PR #183108)   Kelvin Li via llvm-commits
• [clang] [flang] [llvm] [flang] Add runtime trampoline pool for W^X compliance (PR #183108)   Kelvin Li via llvm-commits
• [clang] [llvm] [AArch64][clang][llvm] Add ACLE `stshh` atomic store builtin (PR #181386)   Kerry McLaughlin via llvm-commits
• [clang] [llvm] [AArch64][clang][llvm] Add ACLE `stshh` atomic store builtin (PR #181386)   Kerry McLaughlin via llvm-commits
• [clang] [llvm] [AArch64][clang][llvm] Add ACLE `stshh` atomic store builtin (PR #181386)   Kerry McLaughlin via llvm-commits
• [clang] [llvm] [AArch64][clang][llvm] Add ACLE `stshh` atomic store builtin (PR #181386)   Kerry McLaughlin via llvm-commits
• [clang] [llvm] [AArch64][clang][llvm] Add ACLE `stshh` atomic store builtin (PR #181386)   Kerry McLaughlin via llvm-commits
• [clang] [llvm] [AArch64][clang][llvm] Add ACLE `stshh` atomic store builtin (PR #181386)   Kerry McLaughlin via llvm-commits
• [clang] [llvm] [AArch64][clang][llvm] Add ACLE `stshh` atomic store builtin (PR #181386)   Kerry McLaughlin via llvm-commits
• [llvm] [AArch64] Add partial reduce patterns for new fdot instructions (PR #184659)   Kerry McLaughlin via llvm-commits
• [clang] [llvm] [AArch64][clang][llvm] Add ACLE `stshh` atomic store builtin (PR #181386)   Kerry McLaughlin via llvm-commits
• [clang] [llvm] [AArch64][clang][llvm] Add ACLE `stshh` atomic store builtin (PR #181386)   Kerry McLaughlin via llvm-commits
• [clang] [llvm] [AArch64][clang][llvm] Add ACLE `stshh` atomic store builtin (PR #181386)   Kerry McLaughlin via llvm-commits
• [clang] [llvm] [AArch64][clang][llvm] Add ACLE `stshh` atomic store builtin (PR #181386)   Kerry McLaughlin via llvm-commits
• [clang] [llvm] [AArch64][clang][llvm] Add ACLE `stshh` atomic store builtin (PR #181386)   Kerry McLaughlin via llvm-commits
• [llvm] [LoopUnrollPass] Add const to params in `computeUnrollCount` (NFC) (PR #184058)   Kevin McAfee via llvm-commits
• [llvm] [offload] Add properties parameter to olLaunchKernel (PR #184343)   Kevin Sala Penades via llvm-commits
• [llvm] [offload] Add properties parameter to olLaunchKernel (PR #184343)   Kevin Sala Penades via llvm-commits
• [llvm] [offload] Add properties parameter to olLaunchKernel (PR #184343)   Kevin Sala Penades via llvm-commits
• [llvm] [offload] Add properties parameter to olLaunchKernel (PR #184343)   Kevin Sala Penades via llvm-commits
• [llvm] [offload] Add properties parameter to olLaunchKernel (PR #184343)   Kevin Sala Penades via llvm-commits
• [llvm] [offload] Add properties parameter to olLaunchKernel (PR #184343)   Kevin Sala Penades via llvm-commits
• [llvm] [offload] Add properties parameter to olLaunchKernel (PR #184343)   Kevin Sala Penades via llvm-commits
• [llvm] [offload] Add properties parameter to olLaunchKernel (PR #184343)   Kevin Sala Penades via llvm-commits
• [llvm] [offload] Add properties parameter to olLaunchKernel (PR #184343)   Kevin Sala Penades via llvm-commits
• [llvm] [offload] Add properties parameter to olLaunchKernel (PR #184343)   Kevin Sala Penades via llvm-commits
• [llvm] [offload] Add properties parameter to olLaunchKernel (PR #184343)   Kevin Sala Penades via llvm-commits
• [clang] [flang] [llvm] [openmp] [OpenMP][Offload] Add offload runtime support for dyn_groupprivate clause (PR #152831)   Kevin Sala Penades via llvm-commits
• [clang] [flang] [llvm] [openmp] [OpenMP][Offload] Add offload runtime support for dyn_groupprivate clause (PR #152831)   Kevin Sala Penades via llvm-commits
• [llvm] [offload] Add properties parameter to olLaunchKernel (PR #184343)   Kevin Sala Penades via llvm-commits
• [llvm] [offload] Add properties parameter to olLaunchKernel (PR #184343)   Kevin Sala Penades via llvm-commits
• [clang] [flang] [llvm] [openmp] [OpenMP][Offload] Add offload runtime support for dyn_groupprivate clause (PR #152831)   Kevin Sala Penades via llvm-commits
• [clang] [flang] [llvm] [flang] Add runtime trampoline pool for W^X compliance (PR #183108)   Kiran Chandramohan via llvm-commits
• [clang] [flang] [llvm] [flang] Add runtime trampoline pool for W^X compliance (PR #183108)   Kiran Chandramohan via llvm-commits
• [clang] [flang] [llvm] [flang] Add runtime trampoline pool for W^X compliance (PR #183108)   Kiran Chandramohan via llvm-commits
• [clang] [flang] [llvm] [flang] Add runtime trampoline pool for W^X compliance (PR #183108)   Kiran Chandramohan via llvm-commits
• [llvm] [CollapseIdenticalNodesPass + New Opt pipeline for better codegen] (PR #184943)   Kirill Barinov via llvm-commits
• [llvm] [CollapseIdenticalNodesPass + New Opt pipeline for better codegen] (PR #184943)   Kirill Barinov via llvm-commits
• [llvm] [CollapseIdenticalNodesPass + New Opt pipeline for better codegen] (PR #184943)   Kirill Barinov via llvm-commits
• [llvm] [RISCV] Relax codegen predicates for HINT-based instructions (PR #179872)   Kito Cheng via llvm-commits
• [llvm] [SimplifyLibCalls] Combine sin/cos libcall pairs into llvm.sincos (PR #184760)   Kito Cheng via llvm-commits
• [llvm] [SimplifyLibCalls] Combine sin/cos libcall pairs into llvm.sincos (PR #184760)   Kito Cheng via llvm-commits
• [llvm] [llvm][RISCV] Use zilsd for callee-saved register spill/restore on RV32 (PR #184794)   Kito Cheng via llvm-commits
• [llvm] [llvm][RISCV] Use zilsd for callee-saved register spill/restore on RV32 (PR #184794)   Kito Cheng via llvm-commits
• [llvm] [llvm][RISCV] Use zilsd for callee-saved register spill/restore on RV32 (PR #184794)   Kito Cheng via llvm-commits
• [compiler-rt] [compiler-rt][RISCV] Initialize length only when __init_riscv_feature… (PR #115449)   Kito Cheng via llvm-commits
• [llvm] [SimplifyLibCalls] Combine sin/cos libcall pairs into llvm.sincos (PR #184760)   Kito Cheng via llvm-commits
• [clang] [llvm] [Driver][RISC-V] Support YAML multilib config with selectRISCVMultilib fallback (PR #184973)   Kito Cheng via llvm-commits
• [llvm] github-automation.py: Avoid duplicate pings (PR #184321)   Kleis Auke Wolthuizen via llvm-commits
• [llvm] github-automation.py: Fix mis-indented statement (PR #149653)   Kleis Auke Wolthuizen via llvm-commits
• [llvm] github-automation.py: Use raw strings for regex (PR #184326)   Kleis Auke Wolthuizen via llvm-commits
• [llvm] github-automation.py: Avoid duplicate pings (PR #184321)   Kleis Auke Wolthuizen via llvm-commits
• [llvm] github-automation.py: Avoid duplicate pings (PR #184321)   Kleis Auke Wolthuizen via llvm-commits
• [llvm] github-automation.py: Avoid duplicate pings (PR #184321)   Kleis Auke Wolthuizen via llvm-commits
• [llvm] [Support] formatv: non-neative-plus for integral numbers (PR #185008)   Konrad Kleine via llvm-commits
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• [llvm] [libsycl] add sycl::context stub (PR #182486)   Kseniya Tikhomirova via llvm-commits
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• [llvm] [libsycl] Add sycl::queue stub (PR #184110)   Kseniya Tikhomirova via llvm-commits
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• [llvm] [libsycl] Add sycl::queue stub (PR #184110)   Kseniya Tikhomirova via llvm-commits
• [llvm] [libsycl] Add sycl::queue stub (PR #184110)   Kseniya Tikhomirova via llvm-commits
• [llvm] [libsycl] Add sycl::queue stub (PR #184110)   Kseniya Tikhomirova via llvm-commits
• [llvm] [libsycl] Add sycl::queue stub (PR #184110)   Kseniya Tikhomirova via llvm-commits
• [llvm] [libsycl] Add sycl::queue stub (PR #184110)   Kseniya Tikhomirova via llvm-commits
• [llvm] [libsycl] Add sycl::queue stub (PR #184110)   Kseniya Tikhomirova via llvm-commits
• [llvm] [libsycl] Add sycl::queue stub (PR #184110)   Kseniya Tikhomirova via llvm-commits
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• [llvm] [libsycl] add USM alloc/free functions (PR #184111)   Kseniya Tikhomirova via llvm-commits
• [llvm] [libsycl] add USM alloc/free functions (PR #184111)   Kseniya Tikhomirova via llvm-commits
• [llvm] [libsycl] add USM alloc/free functions (PR #184111)   Kseniya Tikhomirova via llvm-commits
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• [llvm] [SimplifyCFG] Simplify identical predecessors (PR #173022)   Kunqiu Chen via llvm-commits
• [llvm] [SimplifyCFG] Simplify identical predecessors (PR #173022)   Kunqiu Chen via llvm-commits
• [llvm] [SimplifyCFG] Simplify identical predecessors (PR #173022)   Kunqiu Chen via llvm-commits
• [llvm] [SimplifyCFG] Simplify identical predecessors (PR #173022)   Kunqiu Chen via llvm-commits
• [llvm] [SimplifyCFG] Simplify identical predecessors (PR #173022)   Kunqiu Chen via llvm-commits
• [llvm] [SimplifyCFG] Simplify identical predecessors (PR #173022)   Kunqiu Chen via llvm-commits
• [llvm] [SimplifyCFG] Simplify identical predecessors (PR #173022)   Kunqiu Chen via llvm-commits
• [llvm] [SimplifyCFG] Simplify identical predecessors (PR #173022)   Kunqiu Chen via llvm-commits
• [llvm] [SimplifyCFG] Simplify identical predecessors (PR #173022)   Kunqiu Chen via llvm-commits
• [llvm] [SimplifyCFG] Simplify identical predecessors (PR #173022)   Kunqiu Chen via llvm-commits
• [llvm] [SimplifyCFG] Simplify identical predecessors (PR #173022)   Kunqiu Chen via llvm-commits
• [llvm] [SimplifyCFG] Simplify identical predecessors (PR #173022)   Kunqiu Chen via llvm-commits
• [llvm] [SimplifyCFG] Simplify identical predecessors (PR #173022)   Kunqiu Chen via llvm-commits
• [llvm] [SimplifyCFG] Simplify identical predecessors (PR #173022)   Kunqiu Chen via llvm-commits
• [llvm] [SimplifyCFG] Simplify identical predecessors (PR #173022)   Kunqiu Chen via llvm-commits
• [llvm] [SimplifyCFG] Simplify identical predecessors (PR #173022)   Kunqiu Chen via llvm-commits
• [llvm] [SimplifyCFG] Simplify identical predecessors (PR #173022)   Kunqiu Chen via llvm-commits
• [llvm] [SimplifyCFG] Simplify identical predecessors (PR #173022)   Kunqiu Chen via llvm-commits
• [llvm] [SimplifyCFG] Simplify identical predecessors (PR #173022)   Kunqiu Chen via llvm-commits
• [llvm] [SimplifyCFG] Simplify identical predecessors (PR #173022)   Kunqiu Chen via llvm-commits
• [llvm] [SimplifyCFG] Simplify identical predecessors (PR #173022)   Kunqiu Chen via llvm-commits
• [llvm] [SimplifyCFG] Simplify identical predecessors (PR #173022)   Kunqiu Chen via llvm-commits
• [llvm] [IVDescriptors] Remove function FMF attribute check for FP min/max reduction (PR #183523)   LLVM Continuous Integration via llvm-commits
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• [llvm] c9ac1c0 - [ORC] Fix typo in testcase comment. NFC.   Lang Hames via llvm-commits
• [llvm] [ORC] Refactor some WaitingOnGraph loops into named methods. NFCI. (PR #184775)   Lang Hames via llvm-commits
• [llvm] [ORC] Refactor some WaitingOnGraph loops into named methods. NFCI. (PR #184775)   Lang Hames via llvm-commits
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• [llvm] [ORC] Add WaitingOnGraph record / replay facility and test tool. (PR #185275)   Lang Hames via llvm-commits
• [llvm] [ORC] Add WaitingOnGraph record / replay facility and test tool. (PR #185275)   Lang Hames via llvm-commits
• [llvm] [PowerPC] Add mnemonics to paddis (PR #179979)   Lei Huang via llvm-commits
• [llvm] [PowerPC] Use lxvp/stxvp for v256i1 types (PR #184447)   Lei Huang via llvm-commits
• [llvm] [PowerPC] Use lxvp/stxvp for v256i1 types (PR #184447)   Lei Huang via llvm-commits
• [llvm] [PowerPC] Use lxvp/stxvp for v256i1 types (PR #184447)   Lei Huang via llvm-commits
• [llvm] [PowerPC] Use lxvp/stxvp for v256i1 types (PR #184447)   Lei Huang via llvm-commits
• [clang] [llvm] [PowerPC] Implement Deeply Compressed Weights Builtins (PR #184666)   Lei Huang via llvm-commits
• [clang] [llvm] [PowerPC] Add builtins for Post Quantum Cryptography Acceleration (PR #184717)   Lei Huang via llvm-commits
• [clang] [llvm] [PowerPC] Add builtins for Post Quantum Cryptography Acceleration (PR #184717)   Lei Huang via llvm-commits
• [llvm] [Support] Document and test ConvertEBCDIC UTF-8 error handling (PR #185176)   Levi Laine via llvm-commits
• [llvm] [x86][GlobalISel] Select MOV32ri64 for unsigned 32-bit i64 constants (PR #185182)   Levi Laine via llvm-commits
• [llvm] [x86][GlobalISel] Select MOV32ri64 for unsigned 32-bit i64 constants (PR #185182)   Levi Laine via llvm-commits
• [llvm] Revert "Avoid maxnum(sNaN, x) optimizations / folds (#170181)" (PR #184125)   Lewis Crawford via llvm-commits
• [llvm] Avoid maxnum(sNaN, x) optimizations / folds (PR #170181)   Lewis Crawford via llvm-commits
• [llvm] Revert "Avoid maxnum(sNaN, x) optimizations / folds (#170181)" (PR #184125)   Lewis Crawford via llvm-commits
• [llvm] Revert "Avoid maxnum(sNaN, x) optimizations / folds (#170181)" (PR #184125)   Lewis Crawford via llvm-commits
• [llvm] Revert "Avoid maxnum(sNaN, x) optimizations / folds (#170181)" (PR #184125)   Lewis Crawford via llvm-commits
• [llvm] Revert "Avoid maxnum(sNaN, x) optimizations / folds (#170181)" (PR #184125)   Lewis Crawford via llvm-commits
• [llvm] Update Bazel build files for a9fb8b0 (PR #184823)   Lily Gorsheneva via llvm-commits
• [llvm] Update Bazel build files for a9fb8b0 (PR #184823)   Lily Gorsheneva via llvm-commits
• [llvm] Update Bazel build files for a9fb8b0 (PR #184823)   Lily Gorsheneva via llvm-commits
• [llvm] Update Bazel build files for a9fb8b0 (PR #184823)   Lily Gorsheneva via llvm-commits
• [llvm] Update Bazel build files for a9fb8b0 (PR #184823)   Lily Gorsheneva via llvm-commits
• [llvm] Update Bazel build files for a9fb8b0 (PR #184823)   Lily Gorsheneva via llvm-commits
• [llvm] [mlir][acc] Add Dialect Utils to OpenACCDialect deps (PR #184895)   Lily Gorsheneva via llvm-commits
• [llvm] Fix bazel build for 00e247ad76fdd0cd5841193950c8d4927e3015f8 (PR #185055)   Lily Gorsheneva via llvm-commits
• [llvm] Fix bazel build for 00e247ad76fdd0cd5841193950c8d4927e3015f8 (PR #185055)   Lily Gorsheneva via llvm-commits
• [llvm] Fix bazel build for 00e247ad76fdd0cd5841193950c8d4927e3015f8 (PR #185055)   Lily Gorsheneva via llvm-commits
• [llvm] Fix bazel build for 00e247ad76fdd0cd5841193950c8d4927e3015f8 (PR #185055)   Lily Gorsheneva via llvm-commits
• [llvm] Fix bazel build for 00e247ad76fdd0cd5841193950c8d4927e3015f8 (PR #185055)   Lily Gorsheneva via llvm-commits
• [llvm] Fix bazel build for 00e247ad76fdd0cd5841193950c8d4927e3015f8 (PR #185055)   Lily Gorsheneva via llvm-commits
• [llvm] Fix layering issues for d442cc30a9f2bb83f75fead811050137905d9fc4. (PR #185076)   Lily Gorsheneva via llvm-commits
• [libcxx] [llvm] [XRay] Add bounds check before memcpy in readBinaryFormatHeader (PR #178499)   Louis Dionne via llvm-commits
• [libcxxabi] [llvm] [ItaniumDemangle][NFC] Rename argument to not conflict with SS from ptrace_abi.h (PR #179079)   Louis Dionne via llvm-commits
• [llvm] [llvm] Prefer the unknown vendor for SerenityOS triples (PR #185026)   Lucas Chollet via llvm-commits
• [llvm] [llvm] Prefer the unknown vendor for SerenityOS triples (PR #185026)   Lucas Chollet via llvm-commits
• [llvm] [CodeGen] Add listener support to the rematerializer (NFC) (PR #184338)   Lucas Ramirez via llvm-commits
• [llvm] [CodeGen] Add listener support to the rematerializer (NFC) (PR #184338)   Lucas Ramirez via llvm-commits
• [llvm] [CodeGen] Add listener support to the rematerializer (NFC) (PR #184338)   Lucas Ramirez via llvm-commits
• [llvm] [CodeGen] Add listener support to the rematerializer (NFC) (PR #184338)   Lucas Ramirez via llvm-commits
• [llvm] [CodeGen] Add listener support to the rematerializer (NFC) (PR #184338)   Lucas Ramirez via llvm-commits
• [llvm] [CodeGen] Add listener support to the rematerializer (NFC) (PR #184338)   Lucas Ramirez via llvm-commits
• [llvm] [CodeGen] Add listener support to the rematerializer (NFC) (PR #184338)   Lucas Ramirez via llvm-commits
• [llvm] [CodeGen] Add listener support to the rematerializer (NFC) (PR #184338)   Lucas Ramirez via llvm-commits
• [llvm] [CodeGen] Treat hasOrderedMemoryRef as implying arbitrary loads or stores (PR #182000)   Lucas Ramirez via llvm-commits
• [llvm] [CodeGen] Treat hasOrderedMemoryRef as implying arbitrary loads or stores (PR #182000)   Lucas Ramirez via llvm-commits
• [llvm] [CodeGen] Treat hasOrderedMemoryRef as implying arbitrary loads or stores (PR #182000)   Lucas Ramirez via llvm-commits
• [llvm] [VPlan] Move tail folding out of VPlanPredicator. NFC (PR #176143)   Luke Lau via llvm-commits
• [llvm] [VPlan] Move tail folding out of VPlanPredicator. NFC (PR #176143)   Luke Lau via llvm-commits
• [llvm] [VPlan] Move tail folding out of VPlanPredicator. NFC (PR #176143)   Luke Lau via llvm-commits
• [llvm] [VPlan] Move tail folding out of VPlanPredicator. NFC (PR #176143)   Luke Lau via llvm-commits
• [llvm] [VPlan] Move tail folding out of VPlanPredicator. NFC (PR #176143)   Luke Lau via llvm-commits
• [llvm] [Analysis][RISCV] More accurately estimate the cost of strided vector loads (PR #175135)   Luke Lau via llvm-commits
• [llvm] [Analysis][RISCV] More accurately estimate the cost of strided vector loads (PR #175135)   Luke Lau via llvm-commits
• [llvm] Add constant folding for llvm.experimental.cttz.elts #182324 (PR #182895)   Luke Lau via llvm-commits
• [llvm] [LV] Remove DataAndControlFlowWithoutRuntimeCheck. NFC (PR #183762)   Luke Lau via llvm-commits
• [llvm] [LV] Remove DataAndControlFlowWithoutRuntimeCheck. NFC (PR #183762)   Luke Lau via llvm-commits
• [llvm] [LV] Remove DataAndControlFlowWithoutRuntimeCheck. NFC (PR #183762)   Luke Lau via llvm-commits
• [llvm] [LV] Remove DataAndControlFlowWithoutRuntimeCheck. NFC (PR #183762)   Luke Lau via llvm-commits
• [llvm] [LV] Remove DataAndControlFlowWithoutRuntimeCheck. NFC (PR #183762)   Luke Lau via llvm-commits
• [llvm] [LV] Remove DataAndControlFlowWithoutRuntimeCheck. NFC (PR #183762)   Luke Lau via llvm-commits
• [llvm] [LV] Remove DataAndControlFlowWithoutRuntimeCheck. NFC (PR #183762)   Luke Lau via llvm-commits
• [llvm] [DominanceFrontier] Support multiple root nodes for post-dom (PR #181257)   Luke Lau via llvm-commits
• [llvm] [DominanceFrontier] Support multiple root nodes for post-dom (PR #181257)   Luke Lau via llvm-commits
• [llvm] [RISCV] Handle Zvabd and XRivosVizip EEWs in RISCVVLOptimizer (PR #184117)   Luke Lau via llvm-commits
• [llvm] [RISCV] Sink instructions so AVL dominates in RISCVVLOptimizer (PR #184155)   Luke Lau via llvm-commits
• [llvm] [VPlan] Move tail folding out of VPlanPredicator. NFC (PR #176143)   Luke Lau via llvm-commits
• [llvm] [VPlan] Move tail folding out of VPlanPredicator. NFC (PR #176143)   Luke Lau via llvm-commits
• [llvm] [RISCV] Sink instructions so AVL dominates in RISCVVLOptimizer (PR #184155)   Luke Lau via llvm-commits
• [llvm] [RISCV] Sink instructions so AVL dominates in RISCVVLOptimizer (PR #184155)   Luke Lau via llvm-commits
• [llvm] [RISCV] Sink instructions so AVL dominates in RISCVVLOptimizer (PR #184155)   Luke Lau via llvm-commits
• [llvm] [RISCV] Sink instructions so AVL dominates in RISCVVLOptimizer (PR #184155)   Luke Lau via llvm-commits
• [llvm] [RISCV] Handle Zvabd and XRivosVizip EEWs in RISCVVLOptimizer (PR #184117)   Luke Lau via llvm-commits
• [llvm] [LoopReduceMotion] Improve loop by extract reduction instruction (PR #179215)   Luke Lau via llvm-commits
• [llvm] [LoopReduceMotion] Improve loop by extract reduction instruction (PR #179215)   Luke Lau via llvm-commits
• [llvm] [LoopReduceMotion] Improve loop by extract reduction instruction (PR #179215)   Luke Lau via llvm-commits
• [llvm] [LoopReduceMotion] Improve loop by extract reduction instruction (PR #179215)   Luke Lau via llvm-commits
• [llvm] [LoopReduceMotion] Improve loop by extract reduction instruction (PR #179215)   Luke Lau via llvm-commits
• [llvm] [LoopReduceMotion] Improve loop by extract reduction instruction (PR #179215)   Luke Lau via llvm-commits
• [llvm] [RISCV] Sink instructions so AVL dominates in RISCVVLOptimizer (PR #184155)   Luke Lau via llvm-commits
• [llvm] [RISCV] Remove RISCVVectorPeephole::tryToReduceVL (PR #184297)   Luke Lau via llvm-commits
• [llvm] [RISCV] Remove RISCVVectorPeephole::tryToReduceVL (PR #184297)   Luke Lau via llvm-commits
• [llvm] [RISCV] Remove RISCVVectorPeephole::tryToReduceVL (PR #184297)   Luke Lau via llvm-commits
• [llvm] [RISCV] Remove VL != 1 restriction in RISCVVLOptimizer (PR #184298)   Luke Lau via llvm-commits
• [llvm] [LV] Add support for partial alias masking with tail folding (PR #182457)   Luke Lau via llvm-commits
• [llvm] [RISCV] Remove VL != 1 restriction in RISCVVLOptimizer (PR #184298)   Luke Lau via llvm-commits
• [llvm] [RISCV] Remove RISCVVectorPeephole::tryToReduceVL (PR #184297)   Luke Lau via llvm-commits
• [llvm] [LV] Add `-force-target-supports-masked-memory-ops` option (PR #184325)   Luke Lau via llvm-commits
• [llvm] [LV] Add `-force-target-supports-masked-memory-ops` option (PR #184325)   Luke Lau via llvm-commits
• [llvm] [LV] Add `-force-target-supports-masked-memory-ops` option (PR #184325)   Luke Lau via llvm-commits
• [llvm] [VPlan] Add const to VPPredicator methods. nfc (PR #184359)   Luke Lau via llvm-commits
• [llvm] [RISCV] Sink instructions so AVL dominates in RISCVVLOptimizer (PR #184155)   Luke Lau via llvm-commits
• [llvm] [RISCV] Sink instructions so AVL dominates in RISCVVLOptimizer (PR #184155)   Luke Lau via llvm-commits
• [llvm] [VPlan] Simplify the computation of the block entry mask. (PR #173265)   Luke Lau via llvm-commits
• [llvm] [VPlan] Simplify the computation of the block entry mask. (PR #173265)   Luke Lau via llvm-commits
• [llvm] [VPlan] Simplify the computation of the block entry mask. (PR #173265)   Luke Lau via llvm-commits
• [llvm] [RISCV] Sink instructions so AVL dominates in RISCVVLOptimizer (PR #184155)   Luke Lau via llvm-commits
• [llvm] [RISCV] Sink instructions so AVL dominates in RISCVVLOptimizer (PR #184155)   Luke Lau via llvm-commits
• [llvm] [RISCV] Sink instructions so AVL dominates in RISCVVLOptimizer (PR #184155)   Luke Lau via llvm-commits
• [llvm] [LV] Add `-force-target-supports-masked-memory-ops` option (PR #184325)   Luke Lau via llvm-commits
• [llvm] [VPlan] Move tail folding out of VPlanPredicator. NFC (PR #176143)   Luke Lau via llvm-commits
• [llvm] [RISCV] Add findCommutedOpIndices support for Zvabd (PR #184602)   Luke Lau via llvm-commits
• [llvm] [Analysis] Extend llvm.experimental.cttz.elts to type-based-cost (PR #184578)   Luke Lau via llvm-commits
• [llvm] [Analysis] Extend llvm.experimental.cttz.elts to type-based-cost (PR #184578)   Luke Lau via llvm-commits
• [llvm] [Analysis] Extend llvm.experimental.cttz.elts to type-based-cost (PR #184578)   Luke Lau via llvm-commits
• [llvm] [RISCV][TTI] Implement cost of llvm.experimental.vector.extract.last.active (PR #184067)   Luke Lau via llvm-commits
• [llvm] [RISCV] Remove RISCVVectorPeephole::tryToReduceVL (PR #184297)   Luke Lau via llvm-commits
• [llvm] [RISCV] Remove RISCVVectorPeephole::tryToReduceVL (PR #184297)   Luke Lau via llvm-commits
• [llvm] [RISCV] Remove RISCVVectorPeephole::tryToReduceVL (PR #184297)   Luke Lau via llvm-commits
• [llvm] [RISCV] Remove RISCVVectorPeephole::tryToReduceVL (PR #184297)   Luke Lau via llvm-commits
• [llvm] [RISCV] Remove RISCVVectorPeephole::tryToReduceVL (PR #184297)   Luke Lau via llvm-commits
• [llvm] [RISCV][TTI] Implement cost of llvm.experimental.vector.extract.last.active (PR #184067)   Luke Lau via llvm-commits
• [llvm] [RISCV][TTI] Implement cost of llvm.experimental.vector.extract.last.active (PR #184067)   Luke Lau via llvm-commits
• [llvm] [RISCV][TTI] Implement cost of llvm.experimental.vector.extract.last.active (PR #184067)   Luke Lau via llvm-commits
• [llvm] [RISCV][TTI] Implement cost of llvm.experimental.vector.extract.last.active (PR #184067)   Luke Lau via llvm-commits
• [llvm] [RISCV][TTI] Implement cost of llvm.experimental.vector.extract.last.active (PR #184067)   Luke Lau via llvm-commits
• [llvm] [VPlan] Move tail folding out of VPlanPredicator. NFC (PR #176143)   Luke Lau via llvm-commits
• [llvm] [VPlan] Move tail folding out of VPlanPredicator. NFC (PR #176143)   Luke Lau via llvm-commits
• [llvm] [VPlan] Move tail folding out of VPlanPredicator. NFC (PR #176143)   Luke Lau via llvm-commits
• [llvm] [VPlan] Move tail folding out of VPlanPredicator. NFC (PR #176143)   Luke Lau via llvm-commits
• [llvm] [VPlan] Move tail folding out of VPlanPredicator. NFC (PR #176143)   Luke Lau via llvm-commits
• [llvm] [VPlan] Move tail folding out of VPlanPredicator. NFC (PR #176143)   Luke Lau via llvm-commits
• [llvm] [LV] Remove branch on false in blend-costs.ll test. NFC (PR #184816)   Luke Lau via llvm-commits
• [llvm] [VPlan] Compute blend masks from minimum set of edge masks (PR #184838)   Luke Lau via llvm-commits
• [llvm] [VPlan] Compute blend masks from minimum set of edge masks (PR #184838)   Luke Lau via llvm-commits
• [llvm] [VPlan] Compute blend masks from minimum set of edge masks (PR #184838)   Luke Lau via llvm-commits
• [llvm] [VPlan] Compute blend masks from minimum set of edge masks (PR #184838)   Luke Lau via llvm-commits
• [llvm] [VPlan] Compute blend masks from minimum set of edge masks (PR #184838)   Luke Lau via llvm-commits
• [llvm] [VPlan] Compute blend masks from minimum set of edge masks (PR #184838)   Luke Lau via llvm-commits
• [llvm] [VPlan] Compute blend masks from minimum set of edge masks (PR #184838)   Luke Lau via llvm-commits
• [llvm] [RISCV] Remove outdated TODO in isExtractSubvectorCheap (PR #184938)   Luke Lau via llvm-commits
• [llvm] [RISCV][TTI] Implement cost of llvm.experimental.vector.extract.last.active (PR #184067)   Luke Lau via llvm-commits
• [llvm] [LV] Remove branch on false in blend-costs.ll test. NFC (PR #184816)   Luke Lau via llvm-commits
• [llvm] [Analysis] Extend llvm.experimental.cttz.elts to type-based-cost (PR #184578)   Luke Lau via llvm-commits
• [llvm] [Analysis] Extend llvm.experimental.cttz.elts to type-based-cost (PR #184578)   Luke Lau via llvm-commits
• [llvm] [CMake][LLVM] Align CMAKE_EXPORT_COMPILE_COMMANDS from 1 to ON (PR #184971)   Luke Lau via llvm-commits
• [llvm] [Analysis] Extend llvm.experimental.cttz.elts to type-based-cost (PR #184578)   Luke Lau via llvm-commits
• [llvm] [Analysis] Extend llvm.experimental.cttz.elts to type-based-cost (PR #184578)   Luke Lau via llvm-commits
• [llvm] [RISCV] Add tests for vwaddu_wv+vabd(u) combine (PR #184962)   Luke Lau via llvm-commits
• [llvm] [Analysis] Extend llvm.experimental.cttz.elts to type-based-cost (PR #184578)   Luke Lau via llvm-commits
• [llvm] [RISCV][TTI] Implement cost of llvm.experimental.vector.extract.last.active (PR #184067)   Luke Lau via llvm-commits
• [llvm] [Support] Always scale InstructionCost::Value (PR #178962)   Luke Lau via llvm-commits
• [llvm] [Support] Always scale InstructionCost::Value (PR #178962)   Luke Lau via llvm-commits
• [llvm] [RISCV] Add tests for vwaddu_wv+vabd(u) combine (PR #184962)   Luke Lau via llvm-commits
• [llvm] [RISCV] Add tests for vwaddu_wv+vabd(u) combine (PR #184962)   Luke Lau via llvm-commits
• [llvm] [LV] Support float and pointer FindLast reductions (PR #184101)   Luke Lau via llvm-commits
• [llvm] [VPlan] Add poisoning value handle for VPValue. (NFCI) (PR #185054)   Luke Lau via llvm-commits
• [llvm] [VPlan] Add poisoning value handle for VPValue. (NFCI) (PR #185054)   Luke Lau via llvm-commits
• [llvm] [InferAS][NFC] Improve documentation for getAddrSpaceCastPreservedPtrMask (PR #185239)   Luo Yuanke via llvm-commits
• [llvm] [InferAS] Infer the address space of inttoptr (PR #173244)   Luo Yuanke via llvm-commits
• [llvm] [FastISel] Lower call instruction with illegal type returned (PR #180322)   Luo Yuanke via llvm-commits
• [llvm] [LoopVectorize] Fix crash with GC statepoint in epilogue vectorization (PR #179459)   Luohao Wang via llvm-commits
• [llvm] [LoopVectorize] Fix crash with GC statepoint in epilogue vectorization (PR #179459)   Luohao Wang via llvm-commits
• [llvm] [SelectionDAG] Optimize 32-bit udiv with 33-bit magic constants on 64-bit targets (PR #181288)   MITSUNARI Shigeo via llvm-commits
• [llvm] [LoopUnroll] Support parallel reductions for minmax (PR #182473)   Madhur Amilkanthwar via llvm-commits
• [llvm] [Verifier] Add checks for loop metadata nodes (PR #182252)   Madhur Amilkanthwar via llvm-commits
• [llvm] [Verifier] Add checks for loop metadata nodes (PR #182252)   Madhur Amilkanthwar via llvm-commits
• [llvm] [GVN] Fix crash when svcount is used with globals-aa (PR #184347)   Madhur Amilkanthwar via llvm-commits
• [llvm] [GVN] Fix crash when svcount is used with globals-aa (PR #184347)   Madhur Amilkanthwar via llvm-commits
• [llvm] [GVN] Fix crash when svcount is used with globals-aa (PR #184347)   Madhur Amilkanthwar via llvm-commits
• [llvm] [GVN] Fix crash when svcount is used with globals-aa (PR #184347)   Madhur Amilkanthwar via llvm-commits
• [llvm] [LoopFusion] Fix crash "SCEVAddRecExpr operand is not available at loop entry (PR #176378)   Madhur Amilkanthwar via llvm-commits
• [llvm] [GVN] Fix crash when svcount is used with globals-aa (PR #184347)   Madhur Amilkanthwar via llvm-commits
• [llvm] [LoopUnroll] Support parallel reductions for minmax (PR #182473)   Madhur Amilkanthwar via llvm-commits
• [llvm] [Verifier] Add checks for loop metadata nodes (PR #182252)   Madhur Amilkanthwar via llvm-commits
• [llvm] [Verifier] Add checks for loop metadata nodes (PR #182252)   Madhur Amilkanthwar via llvm-commits
• [compiler-rt] [asan] API for getting multiple pointer ranges (PR #181446)   Maksim Ivanov via llvm-commits
• [llvm] [mlir] [MLIR] [Bazel] Removed the stubgen plumbing added in #179211 (PR #185292)   Maksim Levental via llvm-commits
• [llvm] [InstCombine] Modify zero-indexed GEPs in place rather than cloning (PR #185053)   Manasij Mukherjee via llvm-commits
• [llvm] Reapply "[SPIRV] Emit intrinsics for globals only in function that references them (#178143 (#179268)) (PR #182552)   Manuel Carrasco via llvm-commits
• [llvm] [SPIRV][Debug Info] DebugCompilationUnit refactor for DebugFunction support (PR #183117)   Manuel Carrasco via llvm-commits
• [llvm] [SPIRV][Debug Info] DebugCompilationUnit refactor for DebugFunction support (PR #183117)   Manuel Carrasco via llvm-commits
• [llvm] [SPIRV][Debug Info] DebugCompilationUnit refactor for DebugFunction support (PR #183117)   Manuel Carrasco via llvm-commits
• [llvm] [SPIRV][Debug Info] DebugCompilationUnit refactor for DebugFunction support (PR #183117)   Manuel Carrasco via llvm-commits
• [llvm] [SPIRV][Debug Info] DebugCompilationUnit refactor for DebugFunction support (PR #183117)   Manuel Carrasco via llvm-commits
• [llvm] [DAG] isKnownToBeAPowerOfTwo - Power of 2 value is known to be power of 2 after BSWAP/BITREVERSE (PR #182207)   Manuel Dun via llvm-commits
• [llvm] [DAG] isKnownToBeAPowerOfTwo - Power of 2 value is known to be power of 2 after BSWAP/BITREVERSE (PR #182207)   Manuel Dun via llvm-commits
• [llvm] [DAG] isKnownToBeAPowerOfTwo - Power of 2 value is known to be power of 2 after BSWAP/BITREVERSE (PR #182207)   Manuel Dun via llvm-commits
• [llvm] [DAG] isKnownToBeAPowerOfTwo - Power of 2 value is known to be power of 2 after BSWAP/BITREVERSE (PR #182207)   Manuel Dun via llvm-commits
• [llvm] [DAG] isKnownToBeAPowerOfTwo - Power of 2 value is known to be power of 2 after BSWAP/BITREVERSE (PR #182207)   Manuel Dun via llvm-commits
• [llvm] [DAG] isKnownToBeAPowerOfTwo - Power of 2 value is known to be power of 2 after BSWAP/BITREVERSE (PR #182207)   Manuel Dun via llvm-commits
• [llvm] [DAG] isKnownToBeAPowerOfTwo - Power of 2 value is known to be power of 2 after BSWAP/BITREVERSE (PR #182207)   Manuel Dun via llvm-commits
• [llvm] [SPIRV] Fix global emission for modules with no functions (PR #183833)   Marcos Maronas via llvm-commits
• [llvm] [SPIRV] Fix global emission for modules with no functions (PR #183833)   Marcos Maronas via llvm-commits
• [llvm] [SPIRV] Fix global emission for modules with no functions (PR #183833)   Marcos Maronas via llvm-commits
• [llvm] [SPIRV] Update the global registry when expanding function pointer (PR #183873)   Marcos Maronas via llvm-commits
• [llvm] [SPIRV] Update the global registry when expanding function pointer (PR #183873)   Marcos Maronas via llvm-commits
• [llvm] [SPIRV] Fix global emission for modules with no functions (PR #183833)   Marcos Maronas via llvm-commits
• [llvm] [SPIRV] Fix global emission for modules with no functions (PR #183833)   Marcos Maronas via llvm-commits
• [llvm] [SPIRV] Fix global emission for modules with no functions (PR #183833)   Marcos Maronas via llvm-commits
• [llvm] Reapply "[SPIRV][NFCI] Use unordered data structures for SPIR-V extensions (PR #184162)   Marcos Maronas via llvm-commits
• [llvm] [SPIR-V] Complete SPV_INTEL_16bit_atomics extension support (PR #184312)   Marcos Maronas via llvm-commits
• [llvm] [SPIR-V] Complete SPV_INTEL_16bit_atomics extension support (PR #184312)   Marcos Maronas via llvm-commits
• [llvm] [SPIR-V] Complete SPV_INTEL_16bit_atomics extension support (PR #184312)   Marcos Maronas via llvm-commits
• [llvm] [SPIR-V] Complete SPV_INTEL_16bit_atomics extension support (PR #184312)   Marcos Maronas via llvm-commits
• [llvm] [SPIR-V] Complete SPV_INTEL_16bit_atomics extension support (PR #184312)   Marcos Maronas via llvm-commits
• [llvm] [SPIR-V] Add lowering of ptrtoaddr (PR #184577)   Marcos Maronas via llvm-commits
• [llvm] [SPIRV] In G_SELECT selection path: replace `removeFromParent` with `eraseFromParent` and return early (PR #184807)   Marcos Maronas via llvm-commits
• [llvm] [ObjCARC] Don't sink objc_retain past releasing atomics (PR #184113)   Marina Taylor via llvm-commits
• [llvm] [ObjCARC] Run ObjCARCContract before PreISelIntrinsicLowering (PR #184149)   Marina Taylor via llvm-commits
• [llvm] [ObjCARC] Run ObjCARCContract before PreISelIntrinsicLowering (PR #184149)   Marina Taylor via llvm-commits
• [llvm] [ObjCARC] Don't sink objc_retain past releasing atomics (PR #184113)   Marina Taylor via llvm-commits
• [llvm] [AMDGPU] Use subtarget feature for flat offset bit width instead of arch checks (PR #183742)   Mariusz Sikora via llvm-commits
• [llvm] [AMDGPU] Use subtarget feature for flat offset bit width instead of arch checks (PR #183742)   Mariusz Sikora via llvm-commits
• [llvm] [AMDGPU] Add VINTERP encoding to gfx13 (PR #182481)   Mariusz Sikora via llvm-commits
• [llvm] [AMDGPU] Add VINTERP encoding to gfx13 (PR #182481)   Mariusz Sikora via llvm-commits
• [llvm] [AMDGPU] Use subtarget feature for flat offset bit width instead of arch checks (PR #183742)   Mariusz Sikora via llvm-commits
• [llvm] [AMDGPU] Use subtarget feature for flat offset bit width instead of arch checks (PR #183742)   Mariusz Sikora via llvm-commits
• [llvm] [AMDGPU] Use subtarget feature for flat offset bit width instead of arch checks (PR #183742)   Mariusz Sikora via llvm-commits
• [llvm] [AMDGPU] Use subtarget feature for flat offset bit width instead of arch checks (PR #183742)   Mariusz Sikora via llvm-commits
• [llvm] [AMDGPU] Use subtarget feature for flat offset bit width instead of arch checks (PR #183742)   Mariusz Sikora via llvm-commits
• [llvm] [AMDGPU] Use subtarget feature for flat offset bit width instead of arch checks (PR #183742)   Mariusz Sikora via llvm-commits
• [llvm] [AMDGPU] Use subtarget feature for flat offset bit width instead of arch checks (PR #183742)   Mariusz Sikora via llvm-commits
• [llvm] [AMDGPU] Use subtarget feature for flat offset bit width instead of arch checks (PR #183742)   Mariusz Sikora via llvm-commits
• [llvm] [AMDGPU] Use subtarget feature for flat offset bit width instead of arch checks (PR #183742)   Mariusz Sikora via llvm-commits
• [llvm] AMDGPU: Add FlatSignedOffset feature and use it for flat offset printing (PR #183483)   Mariusz Sikora via llvm-commits
• [llvm] AMDGPU: Add FlatSignedOffset feature and use it for flat offset printing (PR #183483)   Mariusz Sikora via llvm-commits
• [llvm] AMDGPU: Add FlatSignedOffset feature and use it for flat offset printing (PR #183483)   Mariusz Sikora via llvm-commits
• [llvm] [AMDGPU] Test hazard-getreg-waitalu.mir on gfx13 (PR #183007)   Mariusz Sikora via llvm-commits
• [llvm] [AMDGPU] Add VFLAT, VGLOBAL, VSCRATCH to gfx13 (PR #182811)   Mariusz Sikora via llvm-commits
• [llvm] [AMDGPU] Add VFLAT, VGLOBAL, VSCRATCH to gfx13 (PR #182811)   Mariusz Sikora via llvm-commits
• [llvm] [AMDGPU] Test hazard-getreg-waitalu.mir on gfx13 (PR #183007)   Mariusz Sikora via llvm-commits
• [llvm] [AMDGPU] Add VFLAT, VGLOBAL, VSCRATCH to gfx13 (PR #182811)   Mariusz Sikora via llvm-commits
• [lld] [lld] update maintainers (PR #183803)   Martin Storsjö via llvm-commits
• [llvm] [VPlan] Use bitfield to store Cmp predicates and GEP wrap flags. (NFC) (PR #181571)   Martin Storsjö via llvm-commits
• [llvm] COFF: Allow hex literals in .def files: BASE/HEAPSIZE/STACKSIZE (PR #184764)   Martin Storsjö via llvm-commits
• [lld] [llvm] COFF: Allow hex literals in .def files: BASE/HEAPSIZE/STACKSIZE (PR #184764)   Martin Storsjö via llvm-commits
• [lld] [llvm] COFF: Allow hex literals in .def files: BASE/HEAPSIZE/STACKSIZE (PR #184764)   Martin Storsjö via llvm-commits
• [lld] [llvm] COFF: Allow hex literals in .def files: BASE/HEAPSIZE/STACKSIZE (PR #184764)   Martin Storsjö via llvm-commits
• [clang] [llvm] [ARM] Add support for Windows SEH (PR #184953)   Martin Storsjö via llvm-commits
• [clang] [llvm] [ARM] Add support for Windows SEH (PR #184953)   Martin Storsjö via llvm-commits
• [compiler-rt] builtins: adjust FP80 source management (PR #183871)   Martin Storsjö via llvm-commits
• [clang] [llvm] [ARM] Add support for Windows SEH (PR #184953)   Martin Storsjö via llvm-commits
• [llvm] [PowerPC] Implement v256i1 BUILD_VECTOR custom lowering (PR #181233)   Maryam Moghadas via llvm-commits
• [llvm] [PowerPC] Optimize bitcast(truncate) patterns using vbpermq/vbpermd (PR #181233)   Maryam Moghadas via llvm-commits
• [llvm] [PowerPC] Optimize bitcast(truncate) patterns using vbpermq/vbpermd (PR #181233)   Maryam Moghadas via llvm-commits
• [clang] [llvm] Add AMO load with Compare and Swap Not Equal (PR #178061)   Maryam Moghadas via llvm-commits
• [clang] [llvm] Add AMO load with Compare and Swap Not Equal (PR #178061)   Maryam Moghadas via llvm-commits
• [compiler-rt] [compiler-rt] Use static buffers in setvbuf/setbuf/setbuffer tests (PR #185204)   Mats Kindahl via llvm-commits
• [compiler-rt] [compiler-rt] Use static buffers in setvbuf/setbuf/setbuffer tests (PR #185204)   Mats Kindahl via llvm-commits
• [compiler-rt] [compiler-rt] Use static buffers in setvbuf/setbuf/setbuffer tests (PR #185204)   Mats Kindahl via llvm-commits
• [llvm] ValueTracking: Teach computeKnownFPClass to look at bitcast + integer max (PR #184073)   Matt Arsenault via llvm-commits
• [llvm] ValueTracking: Teach computeKnownFPClass to look at bitcast + integer max (PR #184073)   Matt Arsenault via llvm-commits
• [llvm] ValueTracking: Teach computeKnownFPClass to look at bitcast + integer max (PR #184073)   Matt Arsenault via llvm-commits
• [llvm] InstCombine: Pass SimplifyQuery through SimplifyDemandedFPClass (PR #184096)   Matt Arsenault via llvm-commits
• [llvm] InstCombine: Pass SimplifyQuery through SimplifyDemandedFPClass (PR #184096)   Matt Arsenault via llvm-commits
• [llvm] InstCombine: Pass SimplifyQuery through SimplifyDemandedFPClass (PR #184096)   Matt Arsenault via llvm-commits
• [llvm] ValueTracking: Teach computeKnownFPClass to look at bitcast + integer max (PR #184073)   Matt Arsenault via llvm-commits
• [llvm] InstCombine: Pass SimplifyQuery through SimplifyDemandedFPClass (PR #184096)   Matt Arsenault via llvm-commits
• [llvm] InstCombine: Pass SimplifyQuery through SimplifyDemandedFPClass (PR #184096)   Matt Arsenault via llvm-commits
• [llvm] InstCombine: Pass SimplifyQuery through SimplifyDemandedFPClass (PR #184096)   Matt Arsenault via llvm-commits
• [llvm] InstCombine: Baseline tests for SimplifyDemandedFPClass phi support (PR #184123)   Matt Arsenault via llvm-commits
• [llvm] InstCombine: Baseline tests for SimplifyDemandedFPClass phi support (PR #184123)   Matt Arsenault via llvm-commits
• [llvm] InstCombine: Baseline tests for SimplifyDemandedFPClass phi support (PR #184123)   Matt Arsenault via llvm-commits
• [llvm] Revert "Avoid maxnum(sNaN, x) optimizations / folds (#170181)" (PR #184125)   Matt Arsenault via llvm-commits
• [lldb] [llvm] [mlir] [IR] Split Br into UncondBr and CondBr (PR #184027)   Matt Arsenault via llvm-commits
• [lldb] [llvm] [mlir] [IR] Split Br into UncondBr and CondBr (PR #184027)   Matt Arsenault via llvm-commits
• [llvm] Reapply "[AMDGPU] Elide bitcast fold i64 imm to build_vector" (#160325) (PR #184114)   Matt Arsenault via llvm-commits
• [llvm] AMDGPU: Stop copying triple into AMDGPUSubtarget (PR #184147)   Matt Arsenault via llvm-commits
• [llvm] AMDGPU: Stop copying triple into AMDGPUSubtarget (PR #184147)   Matt Arsenault via llvm-commits
• [llvm] AMDGPU: Stop copying triple into AMDGPUSubtarget (PR #184147)   Matt Arsenault via llvm-commits
• [llvm] AMDGPU: Stop copying triple into AMDGPUSubtarget (PR #184147)   Matt Arsenault via llvm-commits
• [llvm] AMDGPU: Stop copying triple into AMDGPUSubtarget (PR #184147)   Matt Arsenault via llvm-commits
• [llvm] [llvm] Turn misc copy-assign to move-assign (PR #184143)   Matt Arsenault via llvm-commits
• [llvm] [ObjCARC] Run ObjCARCContract before PreISelIntrinsicLowering (PR #184149)   Matt Arsenault via llvm-commits
• [llvm] [LegalizeTypes] Expand 128-bit UDIV/UREM by constant via Chunk Addition (PR #146238)   Matt Arsenault via llvm-commits
• [llvm] InstCombine: Support extractvalue in SimplifyDemandedFPClass (PR #184171)   Matt Arsenault via llvm-commits
• [llvm] [AArch64] Add vector expansion support for ISD::FCBRT when using ArmPL (PR #183750)   Matt Arsenault via llvm-commits
• [llvm] [AArch64] Add vector expansion support for ISD::FCBRT when using ArmPL (PR #183750)   Matt Arsenault via llvm-commits
• [clang] [llvm] [AMDGPU] Add suffix _D4 to tensor load/store with 4 groups D#, NFC (PR #184176)   Matt Arsenault via llvm-commits
• [llvm] [AArch64][GlobalISel] Protect against fdiv of 1 (PR #184063)   Matt Arsenault via llvm-commits
• [llvm] [SelectionDAG] Add expansion for llvm.convert.from.arbitrary.fp (PR #179318)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Select v_bfe_u32 for i8/i16 (and (srl x, c), mask) (PR #182446)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Select v_bfe_u32 for i8/i16 (and (srl x, c), mask) (PR #182446)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Generate more swaps (PR #184164)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Generate more swaps (PR #184164)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Generate more swaps (PR #184164)   Matt Arsenault via llvm-commits
• [llvm] [CodeGen] Keep physreg copies when successors use-before-def (PR #182732)   Matt Arsenault via llvm-commits
• [llvm] [CodeGen] Keep physreg copies when successors use-before-def (PR #182732)   Matt Arsenault via llvm-commits
• [llvm] [CodeGen] Keep physreg copies when successors use-before-def (PR #182732)   Matt Arsenault via llvm-commits
• [llvm] [CodeGen] Keep physreg copies when successors use-before-def (PR #182732)   Matt Arsenault via llvm-commits
• [llvm] Centralize prefetch target storage in MachineFunction. (PR #184194)   Matt Arsenault via llvm-commits
• [llvm] Centralize prefetch target storage in MachineFunction. (PR #184194)   Matt Arsenault via llvm-commits
• [llvm] Centralize prefetch target storage in MachineFunction. (PR #184194)   Matt Arsenault via llvm-commits
• [llvm] Centralize prefetch target storage in MachineFunction. (PR #184194)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Select v_bfe_u32 for i8/i16 (and (srl x, c), mask) (PR #182446)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Select v_bfe_u32 for i8/i16 (and (srl x, c), mask) (PR #182446)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Select v_bfe_u32 for i8/i16 (and (srl x, c), mask) (PR #182446)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Select v_bfe_u32 for i8/i16 (and (srl x, c), mask) (PR #182446)   Matt Arsenault via llvm-commits
• [llvm] [LegalizeTypes] Expand 128-bit UDIV/UREM by constant via Chunk Addition (PR #146238)   Matt Arsenault via llvm-commits
• [llvm] [LegalizeTypes] Expand 128-bit UDIV/UREM by constant via Chunk Addition (PR #146238)   Matt Arsenault via llvm-commits
• [llvm] [LegalizeTypes] Expand 128-bit UDIV/UREM by constant via Chunk Addition (PR #146238)   Matt Arsenault via llvm-commits
• [llvm] [SelectionDAG] Preserver poison for abs INT_MIN lowering (PR #183851)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU][InstCombine] Fold unused m0 operand to poison for sendmsg intrinsics (PR #183755)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU][InstCombine] Fold unused m0 operand to poison for sendmsg intrinsics (PR #183755)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU][InstCombine] Fold unused m0 operand to poison for sendmsg intrinsics (PR #183755)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] IGroupLP: Refactor SchedGroup::initSchedGroup (NFC) (PR #184122)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Detect VALU-after-MFMA hazard in post-RA scheduler's getHazardType (PR #184084)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Detect VALU-after-MFMA hazard in post-RA scheduler's getHazardType (PR #184084)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Detect VALU-after-MFMA hazard in post-RA scheduler's getHazardType (PR #184084)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU][GlobalISel] Fix pointer type handling in instruction selection (PR #181842)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] IGroupLP: Refactor SchedGroup::initSchedGroup (NFC) (PR #184122)   Matt Arsenault via llvm-commits
• [llvm] [DAG] Improved handling of ISD::ROTL and ISD::ROTR in isKnownToBeAPowerOfTwo (PR #182744)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] AMDGPUIGroupLP: Avoid repeating reachability checks in greedy algorithm (PR #182463)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Add dereferenceable retAttr to a call to llvm.amdgcn.implicitarg.ptr (PR #182206)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Add dereferenceable retAttr to a call to llvm.amdgcn.implicitarg.ptr (PR #182206)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Add dereferenceable retAttr to a call to llvm.amdgcn.implicitarg.ptr (PR #182206)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Add dereferenceable retAttr to a call to llvm.amdgcn.implicitarg.ptr (PR #182206)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Add dereferenceable retAttr to a call to llvm.amdgcn.implicitarg.ptr (PR #182206)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Add dereferenceable retAttr to a call to llvm.amdgcn.implicitarg.ptr (PR #182206)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Add dereferenceable retAttr to a call to llvm.amdgcn.implicitarg.ptr (PR #182206)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Add dereferenceable retAttr to a call to llvm.amdgcn.implicitarg.ptr (PR #182206)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] AMDGPUIGroupLP: Avoid repeating reachability checks in greedy algorithm (PR #182463)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Add readfirstlane for inline asm SGPR with VGPR input (PR #176330)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Add readfirstlane for inline asm SGPR with VGPR input (PR #176330)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Add readfirstlane for inline asm SGPR with VGPR input (PR #176330)   Matt Arsenault via llvm-commits
• [llvm] [DAG] isKnownNeverZero - add ISD::UDIV/SDIV DemandedElts handling and tests (PR #183227)   Matt Arsenault via llvm-commits
• [llvm] Support unnamed functions in MIR parser (PR #183018)   Matt Arsenault via llvm-commits
• [llvm] Support unnamed functions in MIR parser (PR #183018)   Matt Arsenault via llvm-commits
• [llvm] [X86][GISel] Add initial tests for x86 postleg combiner (PR #183844)   Matt Arsenault via llvm-commits
• [llvm] [X86][GISel] Add initial tests for x86 postleg combiner (PR #183844)   Matt Arsenault via llvm-commits
• [llvm] [X86][GISel] Add initial tests for x86 postleg combiner (PR #183844)   Matt Arsenault via llvm-commits
• [llvm] [X86][GISel] Add initial tests for x86 postleg combiner (PR #183844)   Matt Arsenault via llvm-commits
• [llvm] [X86][GISel] Add initial tests for x86 postleg combiner (PR #183844)   Matt Arsenault via llvm-commits
• [llvm] [RISCV][GISel] Replace buildInstr with BuildMI (PR #183714)   Matt Arsenault via llvm-commits
• [llvm] Support unnamed functions in MIR parser (PR #183018)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Add ML-oriented coexec scheduler selection and queue handling (PR #169616)   Matt Arsenault via llvm-commits
• [llvm] SelectionDAG: Support FMINIMUMNUM and FMINIMUM in combineMinNumMaxNumImpl (PR #137449)   Matt Arsenault via llvm-commits
• [llvm] SelectionDAG: Support FMINIMUMNUM and FMINIMUM in combineMinNumMaxNumImpl (PR #137449)   Matt Arsenault via llvm-commits
• [llvm] SelectionDAG: Support FMINIMUMNUM and FMINIMUM in combineMinNumMaxNumImpl (PR #137449)   Matt Arsenault via llvm-commits
• [llvm] SelectionDAG: Support FMINIMUMNUM and FMINIMUM in combineMinNumMaxNumImpl (PR #137449)   Matt Arsenault via llvm-commits
• [llvm] SelectionDAG: Support FMINIMUMNUM and FMINIMUM in combineMinNumMaxNumImpl (PR #137449)   Matt Arsenault via llvm-commits
• [llvm] SelectionDAG: Support FMINIMUMNUM and FMINIMUM in combineMinNumMaxNumImpl (PR #137449)   Matt Arsenault via llvm-commits
• [llvm] SelectionDAG: Support FMINIMUMNUM and FMINIMUM in combineMinNumMaxNumImpl (PR #137449)   Matt Arsenault via llvm-commits
• [llvm] SelectionDAG: Support FMINIMUMNUM and FMINIMUM in combineMinNumMaxNumImpl (PR #137449)   Matt Arsenault via llvm-commits
• [llvm] AMDGPU: Add more tests for fp min/max combines (PR #184336)   Matt Arsenault via llvm-commits
• [llvm] AMDGPU: Add more tests for fp min/max combines (PR #184336)   Matt Arsenault via llvm-commits
• [llvm] SelectionDAG: Support FMINIMUMNUM and FMINIMUM in combineMinNumMaxNumImpl (PR #137449)   Matt Arsenault via llvm-commits
• [llvm] AMDGPU: Add more tests for fp min/max combines (PR #184336)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Shrink S_MOV_B64 to S_MOV_B32 during rematerialization (PR #184333)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Shrink S_MOV_B64 to S_MOV_B32 during rematerialization (PR #184333)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Shrink S_MOV_B64 to S_MOV_B32 during rematerialization (PR #184333)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Shrink S_MOV_B64 to S_MOV_B32 during rematerialization (PR #184333)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Legalize 64bit elements for BUILD_VECTOR on gfx942 (PR #145052)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Legalize 64bit elements for BUILD_VECTOR on gfx942 (PR #145052)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Legalize 64bit elements for BUILD_VECTOR on gfx942 (PR #145052)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Legalize 64bit elements for BUILD_VECTOR on gfx942 (PR #145052)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Legalize 64bit elements for BUILD_VECTOR on gfx942 (PR #145052)   Matt Arsenault via llvm-commits
• [llvm] [TableGen] Complete the support for artificial registers (PR #183371)   Matt Arsenault via llvm-commits
• [llvm] [TableGen] Complete the support for artificial registers (PR #183371)   Matt Arsenault via llvm-commits
• [llvm] [CodeGen] Add listener support to the rematerializer (NFC) (PR #184338)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Insert readfirstlane for uniform VGPR arguments (PR #178198)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Insert readfirstlane for uniform VGPR arguments (PR #178198)   Matt Arsenault via llvm-commits
• [llvm] Fix `assignValueToReg` function's argument (PR #184354)   Matt Arsenault via llvm-commits
• [llvm] [NFC] Refactor the SelectionDAG::getMemcmp etc with a existing helper function getRuntimeCallSDValueHelper (PR #184200)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Remove alignment constraint from spill pseudos (PR #177317)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Remove alignment constraint from spill pseudos (PR #177317)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Add dereferenceable retAttr to a call to llvm.amdgcn.implicitarg.ptr (PR #182206)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Add dereferenceable retAttr to a call to llvm.amdgcn.implicitarg.ptr (PR #182206)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Add ML-oriented coexec scheduler selection and queue handling (PR #169616)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Select v_bfe_u32 for i8/i16 (and (srl x, c), mask) (PR #182446)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Implement LSR cost model for GFX9+ (PR #184138)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Implement LSR cost model for GFX9+ (PR #184138)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Implement LSR cost model for GFX9+ (PR #184138)   Matt Arsenault via llvm-commits
• [llvm] AMDGPU: Fix copy of Triple (PR #184594)   Matt Arsenault via llvm-commits
• [llvm] AMDGPU: Fix copy of Triple (PR #184594)   Matt Arsenault via llvm-commits
• [llvm] AMDGPU: Fix copy of Triple (PR #184594)   Matt Arsenault via llvm-commits
• [llvm] AMDGPU: Fix copy of Triple (PR #184594)   Matt Arsenault via llvm-commits
• [llvm] [SDAGBuilder] Fix incorrect fcmp+select to minnum/maxnum transform (PR #184590)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU][GlobalIsel] Add register bank legalization rules for amdgcn atomic fminmax num (PR #184564)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU][GlobalIsel] Add register bank legalization rules for amdgcn atomic fminmax num (PR #184564)   Matt Arsenault via llvm-commits
• [llvm] AMDGPU: Fix copy of Triple (PR #184594)   Matt Arsenault via llvm-commits
• [llvm] AMDGPU: Fix copy of Triple (PR #184594)   Matt Arsenault via llvm-commits
• [llvm] AMDGPU: Clean up print handling of AMDGPUTargetID (PR #184643)   Matt Arsenault via llvm-commits
• [llvm] AMDGPU: Clean up print handling of AMDGPUTargetID (PR #184643)   Matt Arsenault via llvm-commits
• [llvm] AMDGPU: Clean up print handling of AMDGPUTargetID (PR #184643)   Matt Arsenault via llvm-commits
• [llvm] InstCombine: Support extractvalue in SimplifyDemandedFPClass (PR #184171)   Matt Arsenault via llvm-commits
• [llvm] ValueTracking: Handle ConstantDataSequential in computeKnownFPClass (PR #184191)   Matt Arsenault via llvm-commits
• [llvm] ValueTracking: Handle ConstantDataSequential in computeKnownFPClass (PR #184191)   Matt Arsenault via llvm-commits
• [llvm] ValueTracking: Handle ConstantDataSequential in computeKnownFPClass (PR #184191)   Matt Arsenault via llvm-commits
• [llvm] ValueTracking: Handle ConstantDataSequential in computeKnownFPClass (PR #184191)   Matt Arsenault via llvm-commits
• [llvm] AMDGPU: Clean up print handling of AMDGPUTargetID (PR #184643)   Matt Arsenault via llvm-commits
• [llvm] ValueTracking: Teach computeKnownFPClass to look at bitcast + integer max (PR #184073)   Matt Arsenault via llvm-commits
• [llvm] ValueTracking: Handle constant structs in computeKnownFPClass (PR #184192)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Poison invalid globals after emitting error in LowerBufferFatPointers pass (PR #184662)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Poison invalid globals after emitting error in LowerBufferFatPointers pass (PR #184662)   Matt Arsenault via llvm-commits
• [llvm] ValueTracking: Teach computeKnownFPClass to look at bitcast + integer max (PR #184073)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Poison invalid globals after emitting error in LowerBufferFatPointers pass (PR #184662)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Poison invalid globals after emitting error in LowerBufferFatPointers pass (PR #184662)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Implement LSR cost model for GFX9+ (PR #184138)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Poison invalid globals after emitting error in LowerBufferFatPointers pass (PR #184662)   Matt Arsenault via llvm-commits
• [llvm] DAG: Replace legal type check in EmitCopyFromReg (PR #177788)   Matt Arsenault via llvm-commits
• [llvm] DAG: Replace legal type check in EmitCopyFromReg (PR #177788)   Matt Arsenault via llvm-commits
• [llvm] [NVPTX] Remove `NoNaNsFPMath` uses (PR #183447)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Make chain functions receive a stack pointer (PR #184616)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Make chain functions receive a stack pointer (PR #184616)   Matt Arsenault via llvm-commits
• [llvm] DAG: Replace legal type check in EmitCopyFromReg (PR #177788)   Matt Arsenault via llvm-commits
• [llvm] [CodeGen] Simplify EVT::operator!=. NFCI. (PR #184792)   Matt Arsenault via llvm-commits
• [llvm] expandIS_FPCLASS: Support fcNegative and fcPositive (PR #184788)   Matt Arsenault via llvm-commits
• [llvm] expandIS_FPCLASS: Support fcNegative and fcPositive (PR #184788)   Matt Arsenault via llvm-commits
• [llvm] expandIS_FPCLASS: Support fcNegative and fcPositive (PR #184788)   Matt Arsenault via llvm-commits
• [llvm] expandIS_FPCLASS: Support fcNegative and fcPositive (PR #184788)   Matt Arsenault via llvm-commits
• [llvm] expandIS_FPCLASS: Support fcNegative and fcPositive (PR #184788)   Matt Arsenault via llvm-commits
• [llvm] [SimplifyLibCalls] Combine sin/cos libcall pairs into llvm.sincos (PR #184760)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Generate COPY for each use-constraint instead of constraining the register class (PR #182104)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Generate COPY for each use-constraint instead of constraining the register class (PR #182104)   Matt Arsenault via llvm-commits
• [llvm] InstCombine: Handle insertvalue in SimplifyDemandedFPClass (PR #184193)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Generate COPY for each use-constraint instead of constraining the register class (PR #182104)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Add missing -wwm-regalloc=fast to 4 more tests (NFC) (PR #184966)   Matt Arsenault via llvm-commits
• [llvm] expandIS_FPCLASS: Support fcNegative and fcPositive (PR #184788)   Matt Arsenault via llvm-commits
• [llvm] expandIS_FPCLASS: Support fcNegative and fcPositive (PR #184788)   Matt Arsenault via llvm-commits
• [llvm] expandIS_FPCLASS: Support fcNegative and fcPositive (PR #184788)   Matt Arsenault via llvm-commits
• [llvm] DAGCombiner::visitBITCAST: CastLoad strip AssertNoFPClass (PR #184952)   Matt Arsenault via llvm-commits
• [llvm] DAGCombiner::visitBITCAST: CastLoad strip AssertNoFPClass (PR #184952)   Matt Arsenault via llvm-commits
• [llvm] DAGCombiner::visitBITCAST: CastLoad strip AssertNoFPClass (PR #184952)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Run AMDGPULowerVGPREncoding before hazard recognizers. NFCI. (PR #184987)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Remove alignment constraint from spill pseudos (PR #177317)   Matt Arsenault via llvm-commits
• [clang] [llvm] [WebAssembly] Support acquire-release atomics in CodeGen (PR #184900)   Matt Arsenault via llvm-commits
• [clang] [llvm] [WebAssembly] Support acquire-release atomics in CodeGen (PR #184900)   Matt Arsenault via llvm-commits
• [clang] [llvm] [WebAssembly] Support acquire-release atomics in CodeGen (PR #184900)   Matt Arsenault via llvm-commits
• [llvm] [X86][GISel] Add initial tests for x86 postleg combiner (PR #183844)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Implement LSR cost model for GFX9+ (PR #184138)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Implement LSR cost model for GFX9+ (PR #184138)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Fix incorrect check prefixes in some MC tests (PR #185015)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Register allocation anti-hints to reduce MFMA hazard NOPs (PR #156943)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Register allocation anti-hints to reduce MFMA hazard NOPs (PR #156943)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Register allocation anti-hints to reduce MFMA hazard NOPs (PR #156943)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Register allocation anti-hints to reduce MFMA hazard NOPs (PR #156943)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Register allocation anti-hints to reduce MFMA hazard NOPs (PR #156943)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Register allocation anti-hints to reduce MFMA hazard NOPs (PR #156943)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Register allocation anti-hints to reduce MFMA hazard NOPs (PR #156943)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Register allocation anti-hints to reduce MFMA hazard NOPs (PR #156943)   Matt Arsenault via llvm-commits
• [llvm] AMDGPU: Fix selection failure on fast vector rootn (PR #185035)   Matt Arsenault via llvm-commits
• [llvm] AMDGPU: Fix selection failure on fast vector rootn (PR #185035)   Matt Arsenault via llvm-commits
• [llvm] AMDGPU: Fix selection failure on fast vector rootn (PR #185035)   Matt Arsenault via llvm-commits
• [clang] [llvm] [WebAssembly] Support acquire-release atomics in CodeGen (PR #184900)   Matt Arsenault via llvm-commits
• [llvm] [AArch64][ISel] Use vector register for scalar CLMUL (PR #183282)   Matthew Devereau via llvm-commits
• [llvm] [AArch64][ISel] Use vector register for scalar CLMUL (PR #183282)   Matthew Devereau via llvm-commits
• [llvm] [AArch64][ISel] Use vector register for scalar CLMUL (PR #183282)   Matthew Devereau via llvm-commits
• [llvm] [AArch64][ISel] Use vector register for scalar CLMUL (PR #183282)   Matthew Devereau via llvm-commits
• [llvm] [AArch64][ISel] Use vector register for scalar CLMUL (PR #183282)   Matthew Devereau via llvm-commits
• [llvm] [AArch64][ISel] Use vector register for scalar CLMUL (PR #183282)   Matthew Devereau via llvm-commits
• [llvm] [AArch64][ISel] Use vector register for scalar CLMUL (PR #183282)   Matthew Devereau via llvm-commits
• [llvm] [AArch64] Enabled and regenerate clmul-fixed.ll. NFC (PR #184628)   Matthew Devereau via llvm-commits
• [llvm] [SimplifyCFG] Allow phi folding for boolean logic over non-equality (PR #185124)   Matthew Maurer via llvm-commits
• [clang] [lld] [llvm] [mlir] Revert "[CMake] Use keyword signature in two additional callsites (#1… (PR #184186)   Mehdi Amini via llvm-commits
• [llvm] [mlir] [mlir][bytecode] Add builtin dialect version (PR #184678)   Mehdi Amini via llvm-commits
• [llvm] [mlir] [mlir][bytecode] Add builtin dialect version (PR #184678)   Mehdi Amini via llvm-commits
• [llvm] [TableGen] Add let append/prepend syntax for field concatenation (PR #182382)   Mehdi Amini via llvm-commits
• [llvm] [TableGen] Add let append/prepend syntax for field concatenation (PR #182382)   Mehdi Amini via llvm-commits
• [llvm] [IVDescriptors] Remove function FMF attribute check for FP min/max reduction (PR #183523)   Mel Chen via llvm-commits
• [llvm] [IVDescriptors] Remove function FMF attribute check for FP min/max reduction (PR #183523)   Mel Chen via llvm-commits
• [llvm] [IVDescriptors] Remove function FMF attribute check for FP min/max reduction (PR #183523)   Mel Chen via llvm-commits
• [llvm] [VPlan] Remove unused VPExpandSCEVRecipe before expansion (PR #181329)   Mel Chen via llvm-commits
• [llvm] [IVDescriptors] Remove function FMF attribute check for FP min/max reduction (PR #183523)   Mel Chen via llvm-commits
• [llvm] [VPlan] Remove unused VPExpandSCEVRecipe before expansion (PR #181329)   Mel Chen via llvm-commits
• [llvm] [VPlan] Remove unused VPExpandSCEVRecipe before expansion (PR #181329)   Mel Chen via llvm-commits
• [llvm] [VPlan] Remove unused VPExpandSCEVRecipe before expansion (PR #181329)   Mel Chen via llvm-commits
• [llvm] [VPlan] Add const to VPPredicator methods. nfc (PR #184359)   Mel Chen via llvm-commits
• [llvm] [VPlan] Simplify the computation of the block entry mask. (PR #173265)   Mel Chen via llvm-commits
• [llvm] [VPlan] Simplify the computation of the block entry mask. (PR #173265)   Mel Chen via llvm-commits
• [llvm] [VPlan] Simplify the computation of the block entry mask. (PR #173265)   Mel Chen via llvm-commits
• [llvm] [VPlan] Simplify the computation of the block entry mask. (PR #173265)   Mel Chen via llvm-commits
• [llvm] [VPlan] Simplify the computation of the block entry mask. (PR #173265)   Mel Chen via llvm-commits
• [llvm] [VPlan] Add const to VPPredicator methods. nfc (PR #184359)   Mel Chen via llvm-commits
• [llvm] [VPlan] Add const to VPPredicator methods. nfc (PR #184359)   Mel Chen via llvm-commits
• [llvm] [VPlan] Add const to VPPredicator methods. nfc (PR #184359)   Mel Chen via llvm-commits
• [llvm] [VPlan] Add const to VPPredicator methods. nfc (PR #184359)   Mel Chen via llvm-commits
• [llvm] [VPlan] Simplify the computation of the block entry mask. (PR #173265)   Mel Chen via llvm-commits
• [llvm] [VPlan] Simplify the computation of the block entry mask. (PR #173265)   Mel Chen via llvm-commits
• [llvm] [VPlan] Simplify the computation of the block entry mask. (PR #173265)   Mel Chen via llvm-commits
• [llvm] [VPlan] Simplify the computation of the block entry mask. (PR #173265)   Mel Chen via llvm-commits
• [llvm] [LV] Enable CSA for RISCV EVL tail-folding with scalable vector. (PR #184068)   Mel Chen via llvm-commits
• [llvm] [VPlan] Move tail folding out of VPlanPredicator. NFC (PR #176143)   Mel Chen via llvm-commits
• [llvm] [VPlan] Move tail folding out of VPlanPredicator. NFC (PR #176143)   Mel Chen via llvm-commits
• [llvm] Update [Github] Update GHA Dependencies (PR #176676)   Mend Renovate via llvm-commits
• [llvm] Update [Github] Update GHA Dependencies (PR #176676)   Mend Renovate via llvm-commits
• [llvm] [LLVM] [SeparateConstOffsetFromGEP] Fix sep-const-offset-from-gep invalid assumption (PR #183402)   Meredith Julian via llvm-commits
• [llvm] [LSR][RISCV] Add cmp/branch support (PR #178039)   Michael Berg via llvm-commits
• [llvm] [LSR][RISCV] Add cmp/branch support (PR #178039)   Michael Berg via llvm-commits
• [llvm] 925ec95 - [llvm][DebugInfo][test] dwarf-asm-multiple-sections.s: refine FileCheck checks   Michael Buch via llvm-commits
• [llvm] [llvm][DebugInfo] Emit DW_LNAME_Assembly for DWARFv6 assembly CUs (PR #183897)   Michael Buch via llvm-commits
• [llvm] [DebugInfo] Fix segfault in constructSubprogramScopeDIE with null subprogram type (PR #184299)   Michael Buch via llvm-commits
• [clang] [llvm] [DebugInfo] Emit DW_AT_const_value for constexpr array static members (PR #182442)   Michael Buch via llvm-commits
• [clang] [llvm] [DebugInfo] Emit DW_AT_const_value for constexpr array static members (PR #182442)   Michael Buch via llvm-commits
• [clang] [llvm] [DebugInfo] Emit DW_AT_const_value for constexpr array static members (PR #182442)   Michael Buch via llvm-commits
• [clang] [llvm] [DebugInfo] Emit DW_AT_const_value for constexpr array static members (PR #182442)   Michael Buch via llvm-commits
• [clang] [llvm] [DebugInfo] Emit DW_AT_const_value for constexpr array static members (PR #182442)   Michael Buch via llvm-commits
• [clang] [llvm] [DebugInfo] Emit DW_AT_const_value for constexpr array static members (PR #182442)   Michael Buch via llvm-commits
• [llvm] [DebugInfo] Fix segfault in constructSubprogramScopeDIE with null subprogram type (PR #184299)   Michael Buch via llvm-commits
• [llvm] [DebugInfo] Fix segfault in constructSubprogramScopeDIE with null subprogram type (PR #184299)   Michael Buch via llvm-commits
• [llvm] [DebugInfo] Fix segfault in constructSubprogramScopeDIE with null subprogram type (PR #184299)   Michael Buch via llvm-commits
• [clang] [llvm] [DebugInfo] Emit DW_AT_const_value for constexpr array static members (PR #182442)   Michael Buch via llvm-commits
• [clang] [llvm] [DebugInfo] Emit DW_AT_const_value for constexpr array static members (PR #182442)   Michael Buch via llvm-commits
• [clang] [llvm] [DebugInfo] Emit DW_AT_const_value for constexpr array static members (PR #182442)   Michael Buch via llvm-commits
• [clang] [llvm] [DebugInfo] Fix endianness in DW_AT_const_value for constexpr arrays (PR #184804)   Michael Buch via llvm-commits
• [clang] [llvm] [DebugInfo] Fix endianness in DW_AT_const_value for constexpr arrays (PR #184804)   Michael Buch via llvm-commits
• [clang] [llvm] [DebugInfo] Fix endianness in DW_AT_const_value for constexpr arrays (PR #184804)   Michael Buch via llvm-commits
• [clang] [llvm] [DebugInfo] Fix endianness in DW_AT_const_value for constexpr arrays (PR #184804)   Michael Buch via llvm-commits
• [clang] [llvm] [DebugInfo] Fix endianness in DW_AT_const_value for constexpr arrays (PR #184804)   Michael Buch via llvm-commits
• [clang] [llvm] [DebugInfo] Fix endianness in DW_AT_const_value for constexpr arrays (PR #184804)   Michael Buch via llvm-commits
• [llvm] [AMDGPU] Exec-protect regular VGPR spill saves under narrowed exec (PR #184135)   Michael Halkenhäuser via llvm-commits
• [llvm] [AMDGPU] Exec-protect regular VGPR spill saves under narrowed exec (PR #184135)   Michael Halkenhäuser via llvm-commits
• [llvm] [AMDGPU] Exec-protect regular VGPR spill saves under narrowed exec (PR #184135)   Michael Halkenhäuser via llvm-commits
• [llvm] [AMDGPU] Exec-protect regular VGPR spill saves under narrowed exec (PR #184135)   Michael Halkenhäuser via llvm-commits
• [llvm] [libc][bazel] Add generation for public headers (PR #184889)   Michael Jones via llvm-commits
• [flang] [llvm] [flang-rt] Remove experiemental OpenMP offloading support (PR #183653)   Michael Kruse via llvm-commits
• [llvm] [llvm][support] Refactor symlink handling and add readlink (PR #184256)   Michael Spencer via llvm-commits
• [llvm] [llvm][support] Refactor symlink handling and add readlink (PR #184256)   Michael Spencer via llvm-commits
• [llvm] [llvm][support] Refactor symlink handling and add readlink (PR #184256)   Michael Spencer via llvm-commits
• [llvm] [llvm][support] Refactor symlink handling and add readlink (PR #184256)   Michael Spencer via llvm-commits
• [llvm] [llvm][support] Refactor symlink handling and add readlink (PR #184256)   Michael Spencer via llvm-commits
• [llvm] [AArch64][GlobalISel] Use GPR for illegal fconstants and extend < 32 bit GPR constants to 32 bits (PR #178692)   Mikael Holmen via llvm-commits
• [llvm] [AArch64][GlobalISel] Use GPR for illegal fconstants and extend < 32 bit GPR constants to 32 bits (PR #178692)   Mikael Holmen via llvm-commits
• [llvm] [TableGen] Complete the support for artificial registers (PR #183371)   Mikael Holmen via llvm-commits
• [llvm] [TableGen] Complete the support for artificial registers (PR #183371)   Mikael Holmen via llvm-commits
• [llvm] [TableGen] Complete the support for artificial registers (PR #183371)   Mikael Holmen via llvm-commits
• [llvm] [TableGen] Complete the support for artificial registers (PR #183371)   Mikael Holmen via llvm-commits
• [llvm] [LV] Vectorize early exit loops with multiple exits. (PR #174864)   Mikael Holmen via llvm-commits
• [llvm] [TableGen] Complete the support for artificial registers (PR #183371)   Mikael Holmen via llvm-commits
• [llvm] [RISCV] Implement `isLoadFromStackSlotPostFE` and ... (PR #184673)   Mikhail Gudim via llvm-commits
• [llvm] [RISCV] Implement `isLoadFromStackSlotPostFE` and `isStoreToStackSlotPostFE` (PR #184673)   Mikhail Gudim via llvm-commits
• [llvm] [RISCV] Implement `isLoadFromStackSlotPostFE` and `isStoreToStackSlotPostFE` (PR #184673)   Mikhail Gudim via llvm-commits
• [llvm] [RISCV] Implement `isLoadFromStackSlotPostFE` and `isStoreToStackSlotPostFE` (PR #184673)   Mikhail Gudim via llvm-commits
• [clang] [llvm] [X86] Support apxf in attribute target (PR #184078)   Mikołaj Piróg via llvm-commits
• [clang] [llvm] [X86] Support apxf in attribute target (PR #184078)   Mikołaj Piróg via llvm-commits
• [clang] [llvm] [X86] Support apxf in attribute target (PR #184078)   Mikołaj Piróg via llvm-commits
• [clang] [llvm] [X86] Support apxf in attribute target (PR #184078)   Mikołaj Piróg via llvm-commits
• [clang] [llvm] [X86] Support apxf in attribute target (PR #184078)   Mikołaj Piróg via llvm-commits
• [clang] [llvm] [X86] Support apxf in attribute target (PR #184078)   Mikołaj Piróg via llvm-commits
• [clang] [llvm] [X86] Support apxf in attribute target (PR #184078)   Mikołaj Piróg via llvm-commits
• [llvm] [DAG] Fold SETCC against isKnownNeverZero (PR #184010)   Min-Yih Hsu via llvm-commits
• [llvm] [DAG] Fold SETCC against isKnownNeverZero (PR #184010)   Min-Yih Hsu via llvm-commits
• [llvm] [RISCV] Update Andes45 vector mask scheduling info (PR #184719)   Min-Yih Hsu via llvm-commits
• [llvm] [doc][RISCV] Add documentation for customizing VCIX scheduling info (PR #183129)   Min-Yih Hsu via llvm-commits
• [llvm] [doc][RISCV] Add documentation for customizing VCIX scheduling info (PR #183129)   Min-Yih Hsu via llvm-commits
• [llvm] [RISCV] Add tests for vwaddu_wv+vabd(u) combine (PR #184962)   Min-Yih Hsu via llvm-commits
• [llvm] [RISCV] Add tests for vwaddu_wv+vabd(u) combine (PR #184962)   Min-Yih Hsu via llvm-commits
• [llvm] [BasicBlockUtils] Fixed LoopInfo update in UpdateAnalysisInformation() (PR #177147)   Mingjie Xu via llvm-commits
• [lldb] [llvm] [lldb][Process/FreeBSDKernelCore] Load core according to KASLR (PR #183975)   Minsoo Choo via llvm-commits
• [lldb] [llvm] [lldb][Process/FreeBSDKernelCore] Improve DoUpdateThreadList() (PR #183981)   Minsoo Choo via llvm-commits
• [lldb] [llvm] [lldb][Process/FreeBSDKernelCore] Improve DoUpdateThreadList() (PR #183981)   Minsoo Choo via llvm-commits
• [lldb] [llvm] [lldb][Process/FreeBSDKernelCore] Improve DoUpdateThreadList() (PR #183981)   Minsoo Choo via llvm-commits
• [lldb] [llvm] [lldb][Process/FreeBSDKernelCore] Improve DoUpdateThreadList() (PR #183981)   Minsoo Choo via llvm-commits
• [lldb] [llvm] [lldb][Process/FreeBSDKernelCore] Improve DoUpdateThreadList() (PR #183981)   Minsoo Choo via llvm-commits
• [lldb] [llvm] [lldb][Process/FreeBSDKernelCore] Improve DoUpdateThreadList() (PR #183981)   Minsoo Choo via llvm-commits
• [lldb] [llvm] [lldb][Process/FreeBSDKernelCore] Improve DoUpdateThreadList() (PR #183981)   Minsoo Choo via llvm-commits
• [lldb] [llvm] [lldb][Process/FreeBSDKernelCore] Improve DoUpdateThreadList() (PR #183981)   Minsoo Choo via llvm-commits
• [lldb] [llvm] [lldb][Process/FreeBSDKernelCore] Improve DoUpdateThreadList() (PR #183981)   Minsoo Choo via llvm-commits
• [lldb] [llvm] [lldb][Process/FreeBSDKernelCore] Improve DoUpdateThreadList() (PR #183981)   Minsoo Choo via llvm-commits
• [lldb] [llvm] [lldb][Process/FreeBSDKernelCore] Improve DoUpdateThreadList() (PR #183981)   Minsoo Choo via llvm-commits
• [lldb] [llvm] [lldb][Process/FreeBSDKernelCore] Set kernel displacement (PR #183975)   Minsoo Choo via llvm-commits
• [lldb] [llvm] [lldb][Process/FreeBSDKernelCore] Set kernel displacement (PR #183975)   Minsoo Choo via llvm-commits
• [lldb] [llvm] [lldb][Process/FreeBSDKernelCore] Set kernel displacement (PR #183975)   Minsoo Choo via llvm-commits
• [lldb] [llvm] [lldb][Process/FreeBSDKernelCore] Set kernel displacement (PR #183975)   Minsoo Choo via llvm-commits
• [llvm] [DAG] Improved handling of ISD::ROTL and ISD::ROTR in isKnownToBeAPowerOfTwo (PR #182744)   Mir Immad via llvm-commits
• [llvm] [DAG] Improved handling of ISD::ROTL and ISD::ROTR in isKnownToBeAPowerOfTwo (PR #182744)   Mir Immad via llvm-commits
• [llvm] [DAG] Improved handling of ISD::ROTL and ISD::ROTR in isKnownToBeAPowerOfTwo (PR #182744)   Mir Immad via llvm-commits
• [llvm] [DAG] Improved handling of ISD::ROTL and ISD::ROTR in isKnownToBeAPowerOfTwo (PR #182744)   Mir Immad via llvm-commits
• [llvm] [DAG] Improved handling of ISD::ROTL and ISD::ROTR in isKnownToBeAPowerOfTwo (PR #182744)   Mir Immad via llvm-commits
• [llvm] [DAG] Improved handling of ISD::ROTL and ISD::ROTR in isKnownToBeAPowerOfTwo (PR #182744)   Mir Immad via llvm-commits
• [llvm] [DAG] Improved handling of ISD::ROTL and ISD::ROTR in isKnownToBeAPowerOfTwo (PR #182744)   Mir Immad via llvm-commits
• [llvm] [DAG] Improved handling of ISD::ROTL and ISD::ROTR in isKnownToBeAPowerOfTwo (PR #182744)   Mir Immad via llvm-commits
• [llvm] [DAG] Improved handling of ISD::ROTL and ISD::ROTR in isKnownToBeAPowerOfTwo (PR #182744)   Mir Immad via llvm-commits
• [llvm] [DAG] Improved handling of ISD::ROTL and ISD::ROTR in isKnownToBeAPowerOfTwo (PR #182744)   Mir Immad via llvm-commits
• [llvm] [DAG] Improved handling of ISD::ROTL and ISD::ROTR in isKnownToBeAPowerOfTwo (PR #182744)   Mir Immad via llvm-commits
• [llvm] [DAG] Improved handling of ISD::ROTL and ISD::ROTR in isKnownToBeAPowerOfTwo (PR #182744)   Mir Immad via llvm-commits
• [llvm] [DAG] Improved handling of ISD::ROTL and ISD::ROTR in isKnownToBeAPowerOfTwo (PR #182744)   Mir Immad via llvm-commits
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• [llvm] [DAG] Improved handling of ISD::ROTL and ISD::ROTR in isKnownToBeAPowerOfTwo (PR #182744)   Mir Immad via llvm-commits
• [llvm] [DAG] Improved handling of ISD::ROTL and ISD::ROTR in isKnownToBeAPowerOfTwo (PR #182744)   Mir Immad via llvm-commits
• [llvm] [DAG] Improved handling of ISD::ROTL and ISD::ROTR in isKnownToBeAPowerOfTwo (PR #182744)   Mir Immad via llvm-commits
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• [llvm] [DAG] Improved handling of ISD::ROTL and ISD::ROTR in isKnownToBeAPowerOfTwo (PR #182744)   Mir Immad via llvm-commits
• [llvm] [DTU] fix dominator tree update eliding reachable nodes (PR #177683)   Mircea Trofin via llvm-commits
• [llvm] [DTU] fix dominator tree update eliding reachable nodes (PR #177683)   Mircea Trofin via llvm-commits
• [llvm] [DTU] fix dominator tree update eliding reachable nodes (PR #177683)   Mircea Trofin via llvm-commits
• [llvm] Compute GUIDs once and store in metadata (PR #184065)   Mircea Trofin via llvm-commits
• [llvm] Compute GUIDs once and store in metadata (PR #184065)   Mircea Trofin via llvm-commits
• [llvm] Compute GUIDs once and store in metadata (PR #184065)   Mircea Trofin via llvm-commits
• [llvm] Compute GUIDs once and store in metadata (PR #184065)   Mircea Trofin via llvm-commits
• [llvm] Compute GUIDs once and store in metadata (PR #184065)   Mircea Trofin via llvm-commits
• [llvm] Compute GUIDs once and store in metadata (PR #184065)   Mircea Trofin via llvm-commits
• [llvm] Compute GUIDs once and store in metadata (PR #184065)   Mircea Trofin via llvm-commits
• [clang] [llvm] [AMDGPU] Remove DX10_CLAMP and IEEE bits from gfx1170 (PR #182107)   Mirko Brkušanin via llvm-commits
• [llvm] [AMDGPU][MC] Update old and add new min/max instructions for gfx1170 (PR #184601)   Mirko Brkušanin via llvm-commits
• [llvm] AMDGPU/GlobalISel: Regbanklegalize rules for G_PHI (PR #179735)   Mirko Brkušanin via llvm-commits
• [llvm] [NVPTX] Support lowering of `(l)lround` (PR #183901)   Mitch Briles via llvm-commits
• [llvm] [NVPTX] Support lowering of `(l)lround` (PR #183901)   Mitch Briles via llvm-commits
• [libc] [llvm] [libc][math][c23] Add asinbf16 math function (PR #184170)   Mohamed Emad via llvm-commits
• [libc] [llvm] [libc][math][c23] Add asinbf16 math function (PR #184170)   Mohamed Emad via llvm-commits
• [libc] [llvm] [libc][math][c23] Add asinbf16 math function (PR #184170)   Mohamed Emad via llvm-commits
• [libc] [llvm] [libc][math][c23] Add asinbf16 math function (PR #184170)   Mohamed Emad via llvm-commits
• [libc] [llvm] [libc][math] Refactor dadd family to header-only (PR #182142)   Mohamed Emad via llvm-commits
• [libc] [llvm] [libc][math] Refactor fmaximum_mag_num family to header-only (PR #182169)   Mohamed Emad via llvm-commits
• [libc] [llvm] [libc][math] Refactor fmaximum_mag_num family to header-only (PR #182169)   Mohamed Emad via llvm-commits
• [libc] [llvm] [libc][math] Refactor copysign family to header-only (PR #182137)   Mohamed Emad via llvm-commits
• [libc] [llvm] [libc][math] Refactor fabs family to header-only (PR #182173)   Mohamed Emad via llvm-commits
• [libc] [llvm] [libc][math] Implement C23 half precision pow function (PR #159906)   Muhammad Bassiouni via llvm-commits
• [libc] [llvm] [libc][math] Implement C23 half precision pow function (PR #159906)   Muhammad Bassiouni via llvm-commits
• [libc] [llvm] [libc][math] Implement C23 half precision pow function (PR #159906)   Muhammad Bassiouni via llvm-commits
• [libc] [llvm] [libc][math] Implement C23 half precision pow function (PR #159906)   Muhammad Bassiouni via llvm-commits
• [libc] [llvm] [libc][math][c23] Add atan2f16 function (PR #183531)   Muhammad Bassiouni via llvm-commits
• [libc] [llvm] [libc][math][c23] Add atan2f16 function (PR #183531)   Muhammad Bassiouni via llvm-commits
• [libc] [llvm] [libc][math][c23] Add atan2f16 function (PR #183531)   Muhammad Bassiouni via llvm-commits
• [libc] [llvm] [libc][math][c23] Add atan2f16 function (PR #183531)   Muhammad Bassiouni via llvm-commits
• [libc] [llvm] [libc][math][c23] Add atan2f16 function (PR #183531)   Muhammad Bassiouni via llvm-commits
• [libc] [llvm] [libc][math][c23] Add hypotbf16 function (PR #183460)   Muhammad Bassiouni via llvm-commits
• [libc] [llvm] [libc][math][c23] Add hypotbf16 function (PR #183460)   Muhammad Bassiouni via llvm-commits
• [libc] [llvm] [libc][math][c23] Add hypotbf16 function (PR #183460)   Muhammad Bassiouni via llvm-commits
• [libc] [llvm] [libc][math][c23] Add hypotbf16 function (PR #183460)   Muhammad Bassiouni via llvm-commits
• [libc] [llvm] [libc][math][c23] Add hypotbf16 function (PR #183460)   Muhammad Bassiouni via llvm-commits
• [libc] [llvm] [libc][math][c23] Add hypotbf16 function (PR #183460)   Muhammad Bassiouni via llvm-commits
• [libc] [llvm] [libc][math][c23] Add hypotbf16 function (PR #183460)   Muhammad Bassiouni via llvm-commits
• [libc] [llvm] [libc][math][c23] Add hypotbf16 function (PR #183460)   Muhammad Bassiouni via llvm-commits
• [libc] [llvm] [libc][math][c23] Add hypotbf16 function (PR #183460)   Muhammad Bassiouni via llvm-commits
• [libc] [llvm] [libc][math][c23] Add hypotbf16 function (PR #183460)   Muhammad Bassiouni via llvm-commits
• [libc] [llvm] [libc][math][c23] Add hypotbf16 function (PR #183460)   Muhammad Bassiouni via llvm-commits
• [llvm] Restore #125407, Make covmap tolerant of nested Decisions (PR #183073)   NAKAMURA Takumi via llvm-commits
• [llvm] [AArch64] C1-Ultra Scheduling model (PR #182251)   Nashe Mncube via llvm-commits
• [llvm] [NFC][AArch64] Refactor Arm llvm-mca tests (PR #183294)   Nashe Mncube via llvm-commits
• [llvm] [NFC][AArch64] Refactor Arm llvm-mca tests (PR #183294)   Nashe Mncube via llvm-commits
• [llvm] [AArch64] C1-Ultra Scheduling model (PR #182251)   Nashe Mncube via llvm-commits
• [llvm] [NFC][AArch64] isPureCmp is a duplicate of canAdjustCmp, so remove the duplicate (PR #183568)   Nashe Mncube via llvm-commits
• [llvm] [NFC][AArch64] isPureCmp is a duplicate of canAdjustCmp, so remove the duplicate (PR #183568)   Nashe Mncube via llvm-commits
• [llvm] [AArch64] C1-Ultra Scheduling model (PR #182251)   Nashe Mncube via llvm-commits
• [llvm] [NFC][AArch64] Improve semantics of findSuitableCompare in ConditionOptimizer (PR #183532)   Nashe Mncube via llvm-commits
• [llvm] [NFC][AArch64] Improve semantics of findSuitableCompare in ConditionOptimizer (PR #183532)   Nashe Mncube via llvm-commits
• [llvm] [NFC][AArch64] Improve semantics of findSuitableCompare in ConditionOptimizer (PR #183532)   Nashe Mncube via llvm-commits
• [llvm] [NFC][AArch64] isPureCmp is a duplicate of canAdjustCmp, so remove the duplicate (PR #183568)   Nashe Mncube via llvm-commits
• [llvm] [AArch64] Add extra sched predicates (PR #184801)   Nashe Mncube via llvm-commits
• [llvm] [AArch64] Add extra sched predicates (PR #184801)   Nashe Mncube via llvm-commits
• [llvm] [AArch64] Add extra sched predicates (PR #184801)   Nashe Mncube via llvm-commits
• [llvm] [SROA][Target] Add requiresStructuredGEP to TTI (PR #183296)   Nathan Gauër via llvm-commits
• [llvm] [SROA][Target] Add requiresStructuredGEP to TTI (PR #183296)   Nathan Gauër via llvm-commits
• [clang] [llvm] [HLSL] Implement Texture2D::Gather and Texture2D::GatherCmp (PR #183323)   Nathan Gauër via llvm-commits
• [llvm] [SPIR-V] Add lowering of ptrtoaddr (PR #184577)   Nathan Gauër via llvm-commits
• [llvm] [InstCombine] Decompose icmp over min/max intrinsics when compared with a constant (PR #182461)   Nathiyaa Sengodan via llvm-commits
• [llvm] [SPIRV] Fix global emission for modules with no functions (PR #183833)   Nick Sarnie via llvm-commits
• [llvm] [SPIRV] Fix global emission for modules with no functions (PR #183833)   Nick Sarnie via llvm-commits
• [llvm] [SPIRV] Fix global emission for modules with no functions (PR #183833)   Nick Sarnie via llvm-commits
• [llvm] [SPIRV] Fix global emission for modules with no functions (PR #183833)   Nick Sarnie via llvm-commits
• [llvm] [SPIRV] Fix global emission for modules with no functions (PR #183833)   Nick Sarnie via llvm-commits
• [llvm] [SPIRV] Fix global emission for modules with no functions (PR #183833)   Nick Sarnie via llvm-commits
• [llvm] [TableGen] Allow specification of underlying type for GenericEnum (PR #183769)   Nick Sarnie via llvm-commits
• [llvm] AMDGPU: Stop copying triple into AMDGPUSubtarget (PR #184147)   Nick Sarnie via llvm-commits
• [llvm] Reapply "[SPIRV][NFCI] Use unordered data structures for SPIR-V extensions (PR #184162)   Nick Sarnie via llvm-commits
• [llvm] [CI] Add libsycl precommit testing (PR #184174)   Nick Sarnie via llvm-commits
• [llvm] [CI] Add libsycl precommit testing (PR #184174)   Nick Sarnie via llvm-commits
• [llvm] [SPIRV] Don't emit service function basic block names (PR #184206)   Nick Sarnie via llvm-commits
• [llvm] [SPIRV] Fix global emission for modules with no functions (PR #183833)   Nick Sarnie via llvm-commits
• [llvm] [CI][libsycl] Add libsycl precommit testing job (PR #184174)   Nick Sarnie via llvm-commits
• [llvm] [CI][libsycl] Add libsycl precommit testing job (PR #184174)   Nick Sarnie via llvm-commits
• [llvm] [CI][libsycl] Add libsycl precommit testing job (PR #184174)   Nick Sarnie via llvm-commits
• [llvm] [SPIRV] Don't emit service function basic block names (PR #184206)   Nick Sarnie via llvm-commits
• [llvm] [CI][SPIRV][NFC] Remove unneccessary mkdir from workflow (PR #184353)   Nick Sarnie via llvm-commits
• [llvm] [CI][SPIRV][NFC] Remove unneccessary mkdir from workflow (PR #184353)   Nick Sarnie via llvm-commits
• [llvm] [CI][SPIRV][NFC] Remove unneccessary mkdir from workflow (PR #184353)   Nick Sarnie via llvm-commits
• [llvm] [SPIRV] Fix global emission for modules with no functions (PR #183833)   Nick Sarnie via llvm-commits
• [llvm] Reapply "[SPIRV][NFCI] Use unordered data structures for SPIR-V extensions (PR #184162)   Nick Sarnie via llvm-commits
• [llvm] [SPIRV] Fix global emission for modules with no functions (PR #183833)   Nick Sarnie via llvm-commits
• [llvm] [SPIRV] Fix global emission for modules with no functions (PR #183833)   Nick Sarnie via llvm-commits
• [llvm] [SPIRV] Fix global emission for modules with no functions (PR #183833)   Nick Sarnie via llvm-commits
• [llvm] [SPIRV] Fix global emission for modules with no functions (PR #183833)   Nick Sarnie via llvm-commits
• [llvm] [SPIRV] Fix global emission for modules with no functions (PR #183833)   Nick Sarnie via llvm-commits
• [llvm] [SPIRV] Fix global emission for modules with no functions (PR #183833)   Nick Sarnie via llvm-commits
• [llvm] [CI][SPIRV][NFC] Remove unneccessary mkdir from workflow (PR #184353)   Nick Sarnie via llvm-commits
• [llvm] [SPIRV] Fix global emission for modules with no functions (PR #183833)   Nick Sarnie via llvm-commits
• [clang] [llvm] Revert "[OpenMP][clang] Indirect and Virtual function call mapping from host to device" (PR #184378)   Nick Sarnie via llvm-commits
• [clang] [llvm] Revert "[OpenMP][clang] Indirect and Virtual function call mapping from host to device" (PR #184378)   Nick Sarnie via llvm-commits
• [llvm] [SPIRV] Fix global emission for modules with no functions (PR #183833)   Nick Sarnie via llvm-commits
• [llvm] [SPIRV] Fix global emission for modules with no functions (PR #183833)   Nick Sarnie via llvm-commits
• [llvm] [SPIRV] Fix global emission for modules with no functions (PR #183833)   Nick Sarnie via llvm-commits
• [llvm] [SPIRV] Fix return value of runOnModule for SPIRVPrepareFunctions (PR #184636)   Nick Sarnie via llvm-commits
• [llvm] [SPIRV] Fix global emission for modules with no functions (PR #183833)   Nick Sarnie via llvm-commits
• [llvm] [SPIRV] Fix return value of runOnModule for SPIRVPrepareFunctions (PR #184636)   Nick Sarnie via llvm-commits
• [llvm] [SPIRV] Fix return value of runOnModule for SPIRVPrepareFunctions (PR #184636)   Nick Sarnie via llvm-commits
• [llvm] [SPIRV] Fix return value of runOnModule for SPIRVPrepareFunctions (PR #184636)   Nick Sarnie via llvm-commits
• [llvm] [CI][libsycl] Add libsycl precommit testing job (PR #184174)   Nick Sarnie via llvm-commits
• [llvm] [SPIR-V] Add lowering of ptrtoaddr (PR #184577)   Nick Sarnie via llvm-commits
• [llvm] [CI][libsycl] Add libsycl precommit testing job (PR #184174)   Nick Sarnie via llvm-commits
• [clang] [llvm] [ARM] Add support for Windows SEH (PR #184953)   Nico Weber via llvm-commits
• [llvm] bc55e5e - [gn] port 3da28bfbce4d7a (DiagnosticStableIDs)   Nico Weber via llvm-commits
• [llvm] [CodeGen] Add listener support to the rematerializer (NFC) (PR #184338)   Nicolai Hähnle via llvm-commits
• [llvm] [CodeGen] Add listener support to the rematerializer (NFC) (PR #184338)   Nicolai Hähnle via llvm-commits
• [llvm] [CodeGen] Add listener support to the rematerializer (NFC) (PR #184338)   Nicolai Hähnle via llvm-commits
• [llvm] [CodeGen] Add listener support to the rematerializer (NFC) (PR #184338)   Nicolai Hähnle via llvm-commits
• [llvm] [CodeGen] Add listener support to the rematerializer (NFC) (PR #184338)   Nicolai Hähnle via llvm-commits
• [llvm] [CodeGen] Treat hasOrderedMemoryRef as implying arbitrary loads or stores (PR #182000)   Nicolai Hähnle via llvm-commits
• [llvm] [MC,CodeGen] Update .prefalign for symbol-based preferred alignment (PR #184032)   Nikita Popov via llvm-commits
• [llvm] [CI] Enable gold tests (PR #184076)   Nikita Popov via llvm-commits
• [llvm] 0704b68 - [gold] Fix test   Nikita Popov via llvm-commits
• [clang] [llvm] [SSP] Add llvm.ssp.protected intrinsic for QualType-based stack protection (PR #183623)   Nikita Popov via llvm-commits
• [llvm] [DSE] Introduce `eliminateRedundantStoresViaDominatingConditions` (PR #181709)   Nikita Popov via llvm-commits
• [llvm] [CI] Enable gold tests (PR #184076)   Nikita Popov via llvm-commits
• [llvm] [LangRef] Clarify nsz semantics (PR #180906)   Nikita Popov via llvm-commits
• [clang] [flang] [llvm] [InstCombine] Canonicalize GEP source element types (PR #180745)   Nikita Popov via llvm-commits
• [llvm] [LangRef] Specify semantics for non-byte-sized loads and stores (PR #180739)   Nikita Popov via llvm-commits
• [clang] [flang] [llvm] [InstCombine] Canonicalize GEP source element types (PR #180745)   Nikita Popov via llvm-commits
• [llvm] InstCombine: Pass SimplifyQuery through SimplifyDemandedFPClass (PR #184096)   Nikita Popov via llvm-commits
• [llvm] InstCombine: Pass SimplifyQuery through SimplifyDemandedFPClass (PR #184096)   Nikita Popov via llvm-commits
• [llvm] InstCombine: Pass SimplifyQuery through SimplifyDemandedFPClass (PR #184096)   Nikita Popov via llvm-commits
• [llvm] [LangRef] Mention allocation elision (PR #177592)   Nikita Popov via llvm-commits
• [llvm] [LangRef] Mention allocation elision (PR #177592)   Nikita Popov via llvm-commits
• [llvm] [CMake] Add LLVM_ENABLE_WARNING_SUPPRESSIONS to toggle warning suppressions (PR #183439)   Nikita Popov via llvm-commits
• [llvm] [InstCombine] fold commutative binop with const into select (PR #183692)   Nikita Popov via llvm-commits
• [llvm] [InstCombine] fold commutative binop with const into select (PR #183692)   Nikita Popov via llvm-commits
• [llvm] [InstCombine] fold commutative binop with const into select (PR #183692)   Nikita Popov via llvm-commits
• [llvm] [IR] Return bool from replaceUsesWithIf() (PR #184107)   Nikita Popov via llvm-commits
• [llvm] [polly] [SCEV] Introduce SCEVUse, use it instead of const SCEV * (NFCI) (WIP). (PR #91961)   Nikita Popov via llvm-commits
• [llvm] [polly] [SCEV] Introduce SCEVUse, use it instead of const SCEV * (NFCI) (WIP). (PR #91961)   Nikita Popov via llvm-commits
• [llvm] [polly] [SCEV] Introduce SCEVUse, use it instead of const SCEV * (NFCI) (WIP). (PR #91961)   Nikita Popov via llvm-commits
• [llvm] [polly] [SCEV] Introduce SCEVUse, use it instead of const SCEV * (NFCI) (WIP). (PR #91961)   Nikita Popov via llvm-commits
• [llvm] [polly] [SCEV] Introduce SCEVUse, use it instead of const SCEV * (NFCI) (WIP). (PR #91961)   Nikita Popov via llvm-commits
• [llvm] [InstCombine] Always fold nonnull assumptions into operand bundles (PR #169923)   Nikita Popov via llvm-commits
• [llvm] [CMake] Add LLVM_ENABLE_WARNING_SUPPRESSIONS to toggle warning suppressions (PR #183439)   Nikita Popov via llvm-commits
• [llvm] [IR] Return bool from replaceUsesWithIf() (PR #184107)   Nikita Popov via llvm-commits
• [llvm] [CVP] Stop CVP constant propagation from destroying `llvm.assume` (PR #183688)   Nikita Popov via llvm-commits
• [llvm] [CVP] Stop CVP constant propagation from destroying `llvm.assume` (PR #183688)   Nikita Popov via llvm-commits
• [llvm] [CVP] Stop CVP constant propagation from destroying `llvm.assume` (PR #183688)   Nikita Popov via llvm-commits
• [clang] [llvm] [OpenMP] Use CreatePtrDiff() (PR #184127)   Nikita Popov via llvm-commits
• [lldb] [llvm] [mlir] [IR] Split Br into UncondBr and CondBr (PR #184027)   Nikita Popov via llvm-commits
• [clang] [llvm] [OpenMP] Use CreatePtrDiff() (PR #184127)   Nikita Popov via llvm-commits
• [llvm] [CVP] Stop CVP constant propagation from destroying `llvm.assume` (PR #183688)   Nikita Popov via llvm-commits
• [clang] [llvm] [OpenMP] Use CreatePtrDiff() (PR #184127)   Nikita Popov via llvm-commits
• [llvm] [DA] Add tests that represent edge cases for the Weak Zero SIV tests (NFC) (PR #183735)   Nikita Popov via llvm-commits
• [llvm] [CVP] Stop CVP constant propagation from destroying `llvm.assume` (PR #183688)   Nikita Popov via llvm-commits
• [llvm] [InstCombine] Canonicalize gep scaling factor (PR #180216)   Nikita Popov via llvm-commits
• [llvm] [InstCombine] Canonicalize gep scaling factor (PR #180216)   Nikita Popov via llvm-commits
• [llvm] [InstCombine] Canonicalize gep scaling factor (PR #180216)   Nikita Popov via llvm-commits
• [llvm] [InstCombine] Canonicalize gep scaling factor (PR #180216)   Nikita Popov via llvm-commits
• [llvm] [InstCombine] Canonicalize gep scaling factor (PR #180216)   Nikita Popov via llvm-commits
• [llvm] [InstCombine] Canonicalize gep scaling factor (PR #180216)   Nikita Popov via llvm-commits
• [llvm] [InstCombine] Canonicalize gep scaling factor (PR #180216)   Nikita Popov via llvm-commits
• [llvm] [InstCombine] Canonicalize gep scaling factor (PR #180216)   Nikita Popov via llvm-commits
• [llvm] [InstCombine] Canonicalize gep scaling factor (PR #180216)   Nikita Popov via llvm-commits
• [llvm] [InstCombine] Canonicalize gep scaling factor (PR #180216)   Nikita Popov via llvm-commits
• [llvm] [InstCombine] Canonicalize gep scaling factor (PR #180216)   Nikita Popov via llvm-commits
• [llvm] [InstCombine] Canonicalize gep scaling factor (PR #180216)   Nikita Popov via llvm-commits
• [llvm] [InstCombine] Canonicalize gep scaling factor (PR #180216)   Nikita Popov via llvm-commits
• [llvm] [InstCombine] Canonicalize gep scaling factor (PR #180216)   Nikita Popov via llvm-commits
• [llvm] [ValueTracking] Int vector reductions propagate noundef (PR #184173)   Nikita Popov via llvm-commits
• [llvm] [LLVM] Add flatten function attribute to LLVM IR and implement recursive inlining in AlwaysInliner (PR #174899)   Nikita Popov via llvm-commits
• [llvm] [LLVM] Add flatten function attribute to LLVM IR and implement recursive inlining in AlwaysInliner (PR #174899)   Nikita Popov via llvm-commits
• [llvm] [LLVM] Add flatten function attribute to LLVM IR and implement recursive inlining in AlwaysInliner (PR #174899)   Nikita Popov via llvm-commits
• [llvm] [LLVM] Add flatten function attribute to LLVM IR and implement recursive inlining in AlwaysInliner (PR #174899)   Nikita Popov via llvm-commits
• [llvm] [LLVM] Add flatten function attribute to LLVM IR and implement recursive inlining in AlwaysInliner (PR #174899)   Nikita Popov via llvm-commits
• [llvm] [LLVM] Add flatten function attribute to LLVM IR and implement recursive inlining in AlwaysInliner (PR #174899)   Nikita Popov via llvm-commits
• [llvm] [ValueTracking] Int vector reductions propagate noundef (PR #184173)   Nikita Popov via llvm-commits
• [llvm] [ValueTracking] Int vector reductions propagate noundef (PR #184173)   Nikita Popov via llvm-commits
• [llvm] [IR] LangRef: document behavior of double-lifetime.start (PR #184296)   Nikita Popov via llvm-commits
• [clang] [llvm] [Coroutines] Replace struct alloca frame with byte array and ptradd (PR #178359)   Nikita Popov via llvm-commits
• [clang] [lld] [llvm] [llvm][lld][clang] Delay initializing TargetOptions in LTO builds until a Triple is available (PR #179509)   Nikita Popov via llvm-commits
• [llvm] [SCEV] Batch common-factor folding in getAddExpr (NFC) (PR #184258)   Nikita Popov via llvm-commits
• [llvm] [IR] Mark reduction intrinsics as nocreateundeforpoison (PR #184173)   Nikita Popov via llvm-commits
• [llvm] [IR] Mark reduction intrinsics as nocreateundeforpoison (PR #184173)   Nikita Popov via llvm-commits
• [llvm] [AggressiveInstCombine] trunc to i1 in any or all bits set check (PR #184246)   Nikita Popov via llvm-commits
• [llvm] [LangRef] Mention allocation elision (PR #177592)   Nikita Popov via llvm-commits
• [llvm] [IR] LangRef: document behavior of double-lifetime.start (PR #184296)   Nikita Popov via llvm-commits
• [llvm] [IR] LangRef: document behavior of double-lifetime.start (PR #184296)   Nikita Popov via llvm-commits
• [llvm] [IR] LangRef: document behavior of double-lifetime.start (PR #184296)   Nikita Popov via llvm-commits
• [llvm] [IR] LangRef: document behavior of double-lifetime.start (PR #184296)   Nikita Popov via llvm-commits
• [llvm] [IR] LangRef: document behavior of double-lifetime.start (PR #184296)   Nikita Popov via llvm-commits
• [llvm] [Analysis][NFC] Store CallbackVH in vector, not in map (PR #184323)   Nikita Popov via llvm-commits
• [llvm] [Analysis][NFC] Store CallbackVH in vector, not in map (PR #184323)   Nikita Popov via llvm-commits
• [llvm] [DSE] Handle provenance when eliminating tautological assignments (PR #184311)   Nikita Popov via llvm-commits
• [llvm] [IR] LangRef: document behavior of double-lifetime.start (PR #184296)   Nikita Popov via llvm-commits
• [llvm] [IR] LangRef: document behavior of double-lifetime.start (PR #184296)   Nikita Popov via llvm-commits
• [llvm] [IR] LangRef: document behavior of double-lifetime.start (PR #184296)   Nikita Popov via llvm-commits
• [llvm] [IR] LangRef: document behavior of double-lifetime.start (PR #184296)   Nikita Popov via llvm-commits
• [llvm] [GVN] Fix crash when svcount is used with globals-aa (PR #184347)   Nikita Popov via llvm-commits
• [llvm] [GVN] Fix crash when svcount is used with globals-aa (PR #184347)   Nikita Popov via llvm-commits
• [llvm] [Loads] Allow replacement of null with ptr in `canReplacePointersIfEqual` (PR #184348)   Nikita Popov via llvm-commits
• [llvm] [Loads] Allow replacement of null with ptr in `canReplacePointersIfEqual` (PR #184348)   Nikita Popov via llvm-commits
• [llvm] [Loads] Allow replacement of null with ptr in `canReplacePointersIfEqual` (PR #184348)   Nikita Popov via llvm-commits
• [llvm] [Loads] Allow replacement of null with ptr in `canReplacePointersIfEqual` (PR #184348)   Nikita Popov via llvm-commits
• [llvm] [InstCombine] make `foldBinOpIntoSelectOrPhi` fold on all operands (PR #183692)   Nikita Popov via llvm-commits
• [llvm] [LoopUnroll] Enable allowexpensivetripcounts when user provides pragma (PR #181267)   Nikita Popov via llvm-commits
• [llvm] [InstCombine] Don't strip leading zero index for overaligned vector GEP (PR #184364)   Nikita Popov via llvm-commits
• [clang] [flang] [llvm] [InstCombine] Canonicalize GEP source element types (PR #180745)   Nikita Popov via llvm-commits
• [llvm] [SelectionDAG] Preserver poison for abs INT_MIN lowering (PR #183851)   Nikita Popov via llvm-commits
• [llvm] [SelectionDAG] Preserver poison for abs INT_MIN lowering (PR #183851)   Nikita Popov via llvm-commits
• [llvm] [SelectionDAG] Preserver poison for abs INT_MIN lowering (PR #183851)   Nikita Popov via llvm-commits
• [llvm] Revert "[IndVarsSimplify] sinkUnusedInvariants is skipping instructio… (PR #184436)   Nikita Popov via llvm-commits
• [llvm] [InstCombine] Don't strip leading zero index for overaligned vector GEP (PR #184364)   Nikita Popov via llvm-commits
• [llvm] [ConstantFolding] Respect AllowNonDeterministic when flushing denormals (PR #183031)   Nikita Popov via llvm-commits
• [llvm] [DSE] Handle provenance when eliminating tautological assignments (PR #184311)   Nikita Popov via llvm-commits
• [llvm] [DSE] Handle provenance when eliminating tautological assignments (PR #184311)   Nikita Popov via llvm-commits
• [llvm] [DSE] Handle provenance when eliminating tautological assignments (PR #184311)   Nikita Popov via llvm-commits
• [llvm] [InstCombine] make `foldBinOpIntoSelectOrPhi` fold on all operands (PR #183692)   Nikita Popov via llvm-commits
• [llvm] [InstCombine] make `foldBinOpIntoSelectOrPhi` fold on all operands (PR #183692)   Nikita Popov via llvm-commits
• [llvm] [LoopUnroll] Ensure we can accept both `llvm.loop.unroll.full` and `llvm.loop.unroll.enable` metadata on the same loop (NFC) (PR #182381)   Nikita Popov via llvm-commits
• [llvm] [LoopUnroll] Ensure we can accept both `llvm.loop.unroll.full` and `llvm.loop.unroll.enable` metadata on the same loop (NFC) (PR #182381)   Nikita Popov via llvm-commits
• [llvm] [IR] Add BooleanMap matcher (PR #184463)   Nikita Popov via llvm-commits
• [llvm] [IR] Add BooleanMap matcher (PR #184463)   Nikita Popov via llvm-commits
• [llvm] [IR] Add BooleanMap matcher (PR #184463)   Nikita Popov via llvm-commits
• [llvm] [IR] Add BooleanMap matcher (PR #184463)   Nikita Popov via llvm-commits
• [llvm] [InstCombine] make `foldBinOpIntoSelectOrPhi` fold on all operands (PR #183692)   Nikita Popov via llvm-commits
• [llvm] [InstCombine] make `foldBinOpIntoSelectOrPhi` fold on all operands (PR #183692)   Nikita Popov via llvm-commits
• [llvm] [ARM] Generate test checks (NFC) (PR #184574)   Nikita Popov via llvm-commits
• [llvm] [ARM] Generate test checks (NFC) (PR #184574)   Nikita Popov via llvm-commits
• [llvm] [AArch64] Generate test checks (NFC) (PR #184582)   Nikita Popov via llvm-commits
• [llvm] [AArch64] Generate test checks (NFC) (PR #184582)   Nikita Popov via llvm-commits
• [llvm] [SDAGBuilder] Fix incorrect fcmp+select to minnum/maxnum transform (PR #184590)   Nikita Popov via llvm-commits
• [llvm] [SDAGBuilder] Fix incorrect fcmp+select to minnum/maxnum transform (PR #184590)   Nikita Popov via llvm-commits
• [llvm] [SystemZ] Mark fminimumnum/fmaximumnum as legal (PR #184595)   Nikita Popov via llvm-commits
• [llvm] [SDAGBuilder] Fix incorrect fcmp+select to minnum/maxnum transform (PR #184590)   Nikita Popov via llvm-commits
• [llvm] [CI] Install binutils-dev in pre-merge container (PR #184608)   Nikita Popov via llvm-commits
• [llvm] [CI] Install binutils-dev in pre-merge container (PR #184608)   Nikita Popov via llvm-commits
• [llvm] [CI] Install binutils-dev in pre-merge container (PR #184608)   Nikita Popov via llvm-commits
• [llvm] [CI] Install binutils-dev in pre-merge container (PR #184608)   Nikita Popov via llvm-commits
• [llvm] [CI] Install binutils-dev in pre-merge container (PR #184608)   Nikita Popov via llvm-commits
• [clang] [llvm] [WIP] ABI Lowering Library (PR #140112)   Nikita Popov via llvm-commits
• [llvm] [CI] Enable gold tests (PR #184076)   Nikita Popov via llvm-commits
• [llvm] [SystemZ] Mark fminimumnum/fmaximumnum as legal (PR #184595)   Nikita Popov via llvm-commits
• [llvm] [CI] Enable gold tests (PR #184076)   Nikita Popov via llvm-commits
• [llvm] [CI] Enable gold tests (PR #184076)   Nikita Popov via llvm-commits
• [llvm] [CI] Enable LTO linker plugin tests (PR #184076)   Nikita Popov via llvm-commits
• [llvm] [CI] Enable LTO linker plugin tests (PR #184076)   Nikita Popov via llvm-commits
• [llvm] [SystemZ] Mark fminimumnum/fmaximumnum as legal (PR #184595)   Nikita Popov via llvm-commits
• [llvm] [InstCombine] Fix #163110: Fold icmp (shl X, L), (add (shl Y, L), 1<<L) to icmp X, (Y + 1) (PR #165975)   Nikita Popov via llvm-commits
• [llvm] [LoopUnroll] Ensure we can accept both `llvm.loop.unroll.full` and `llvm.loop.unroll.enable` metadata on the same loop (NFC) (PR #182381)   Nikita Popov via llvm-commits
• [llvm] [SystemZ] Mark fminimumnum/fmaximumnum as legal (PR #184595)   Nikita Popov via llvm-commits
• [llvm] [SystemZ] Mark fminimumnum/fmaximumnum as legal (PR #184595)   Nikita Popov via llvm-commits
• [llvm] [CI] Enable LTO linker plugin tests (PR #184076)   Nikita Popov via llvm-commits
• [llvm] [SDAGBuilder] Fix incorrect fcmp+select to minnum/maxnum transform (PR #184590)   Nikita Popov via llvm-commits
• [llvm] [SDAGBuilder] Fix incorrect fcmp+select to minnum/maxnum transform (PR #184590)   Nikita Popov via llvm-commits
• [llvm] [SDAGBuilder] Fix incorrect fcmp+select to minnum/maxnum transform (PR #184590)   Nikita Popov via llvm-commits
• [llvm] [SDAGBuilder] Fix incorrect fcmp+select to minnum/maxnum transform (PR #184590)   Nikita Popov via llvm-commits
• [llvm] [WebAssembly] Do not form minnum/maxnum (PR #184796)   Nikita Popov via llvm-commits
• [llvm] [WebAssembly] Do not form minnum/maxnum (PR #184796)   Nikita Popov via llvm-commits
• [clang] [llvm] [DebugInfo] Emit DW_AT_const_value for constexpr array static members (PR #182442)   Nikita Popov via llvm-commits
• [clang] [llvm] Revert "[DebugInfo] Emit DW_AT_const_value for constexpr array static members" (PR #184798)   Nikita Popov via llvm-commits
• [clang] [llvm] Revert "[DebugInfo] Emit DW_AT_const_value for constexpr array static members" (PR #184798)   Nikita Popov via llvm-commits
• [clang] [llvm] [DebugInfo] Emit DW_AT_const_value for constexpr array static members (PR #182442)   Nikita Popov via llvm-commits
• [llvm] [CI] Enable LTO linker plugin tests (PR #184076)   Nikita Popov via llvm-commits
• [llvm] [CI] Enable LTO linker plugin tests (PR #184076)   Nikita Popov via llvm-commits
• [llvm] [Instcombine] Write Instcombine pass to strength reduce lock xadd to lock sub (PR #184715)   Nikita Popov via llvm-commits
• [llvm] [Instcombine] Write Instcombine pass to strength reduce lock xadd to lock sub (PR #184715)   Nikita Popov via llvm-commits
• [llvm] [Instcombine] Write Instcombine pass to strength reduce lock xadd to lock sub (PR #184715)   Nikita Popov via llvm-commits
• [llvm] [Instcombine] Write Instcombine pass to strength reduce lock xadd to lock sub (PR #184715)   Nikita Popov via llvm-commits
• [clang] [llvm] Revert "[DebugInfo] Emit DW_AT_const_value for constexpr array static members" (PR #184798)   Nikita Popov via llvm-commits
• [llvm] [SimplifyCFG] Simplify identical predecessors (PR #173022)   Nikita Popov via llvm-commits
• [llvm] [SimplifyCFG] Simplify identical predecessors (PR #173022)   Nikita Popov via llvm-commits
• [llvm] [SimplifyCFG] Simplify identical predecessors (PR #173022)   Nikita Popov via llvm-commits
• [llvm] [SimplifyCFG] Simplify identical predecessors (PR #173022)   Nikita Popov via llvm-commits
• [llvm] [SimplifyCFG] Simplify identical predecessors (PR #173022)   Nikita Popov via llvm-commits
• [llvm] [llubi] Add support for load/store/lifetime markers (PR #182532)   Nikita Popov via llvm-commits
• [llvm] [llubi] Add support for load/store/lifetime markers (PR #182532)   Nikita Popov via llvm-commits
• [llvm] [llubi] Add support for load/store/lifetime markers (PR #182532)   Nikita Popov via llvm-commits
• [llvm] [llubi] Add support for load/store/lifetime markers (PR #182532)   Nikita Popov via llvm-commits
• [llvm] [WebAssembly] Do not form minnum/maxnum (PR #184796)   Nikita Popov via llvm-commits
• [llvm] [DA] Remove isPeelFirst and isPeelLast (PR #183737)   Nikita Popov via llvm-commits
• [llvm] [BOLT] Retain certain local symbols (PR #184074)   Nikita Popov via llvm-commits
• [clang] [flang] [llvm] [InstCombine] Canonicalize GEP source element types (PR #180745)   Nikita Popov via llvm-commits
• [clang] [flang] [llvm] [InstCombine] Canonicalize GEP source element types (PR #180745)   Nikita Popov via llvm-commits
• [llvm] 727ace5 - [AArch64][Thumb2] Add missing select FMF in tests   Nikita Popov via llvm-commits
• [clang] [flang] [llvm] [InstCombine] Canonicalize GEP source element types (PR #180745)   Nikita Popov via llvm-commits
• [llvm] [BOLT] Retain certain local symbols (PR #184074)   Nikita Popov via llvm-commits
• [llvm] [BOLT] Fix test with -DCLANG_DEFAULT_PIE_ON_LINUX=OFF (PR #185047)   Nikita Popov via llvm-commits
• [llvm] [BOLT] Retain certain local symbols (PR #184074)   Nikita Popov via llvm-commits
• [llvm] Revert "[llubi] Add support for load/store/lifetime markers" (PR #185101)   Nikita Popov via llvm-commits
• [llvm] Revert "[llubi] Add support for load/store/lifetime markers" (PR #185101)   Nikita Popov via llvm-commits
• [clang] [flang] [llvm] [InstCombine] Canonicalize GEP source element types (PR #180745)   Nikita Popov via llvm-commits
• [llvm] [ADT] Remove deprecated variadic `StringSwitch::Cases` and `CasesLower` (PR #185191)   Nikita Popov via llvm-commits
• [llvm] [Analysis] Require explict updates to BFI (PR #185184)   Nikita Popov via llvm-commits
• [llvm] [Reland][llubi] Add support for load/store/lifetime markers (PR #185196)   Nikita Popov via llvm-commits
• [llvm] [llubi] Add support for bitcast (PR #185205)   Nikita Popov via llvm-commits
• [llvm] [llubi] Add support for bitcast (PR #185205)   Nikita Popov via llvm-commits
• [llvm] [InferAttrs] malloc-family libcalls may write `errnomem` location (PR #164382)   Nikita Popov via llvm-commits
• [clang] [llvm] [RFC] Better devirtualization for non-virtual interface (PR #185087)   Nikita Taranov via llvm-commits
• [clang] [llvm] [RFC] Better devirtualization for non-virtual interface (PR #185087)   Nikita Taranov via llvm-commits
• [clang] [llvm] [RFC] Better devirtualization for non-virtual interface (PR #185087)   Nikita Taranov via llvm-commits
• [clang] [llvm] [RFC] Better devirtualization for non-virtual interface (PR #185087)   Nikita Taranov via llvm-commits
• [llvm] [InstCombine] Always fold nonnull assumptions into operand bundles (PR #169923)   Nikolas Klauser via llvm-commits
• [llvm] [Inliner] Keep nonnull information around when inlining (PR #185080)   Nikolas Klauser via llvm-commits
• [llvm] [Inliner] Keep nonnull information around when inlining (PR #185080)   Nikolas Klauser via llvm-commits
• [llvm] [Inliner] Keep nonnull information around when inlining (PR #185080)   Nikolas Klauser via llvm-commits
• [llvm] [llvm-ir2vec][Reland] Revert Fixup - Adding Inst Embeddings Map API to ir2vec python bindings (PR #184196)   Nishant Sachdeva via llvm-commits
• [llvm] [llvm-ir2vec][Reland] Revert Fixup - Adding Inst Embeddings Map API to ir2vec python bindings (PR #184196)   Nishant Sachdeva via llvm-commits
• [llvm] [llvm-ir2vec][Reland] Revert Fixup - Adding Inst Embeddings Map API to ir2vec python bindings (PR #184196)   Nishant Sachdeva via llvm-commits
• [llvm] [llvm-ir2vec][Reland] Revert Fixup - Adding Inst Embeddings Map API to ir2vec python bindings (PR #184196)   Nishant Sachdeva via llvm-commits
• [llvm] [llvm-ir2vec][Reland] Revert Fixup - Adding Inst Embeddings Map API to ir2vec python bindings (PR #184196)   Nishant Sachdeva via llvm-commits
• [llvm] [llvm-ir2vec][Reland] Revert Fixup - Adding Inst Embeddings Map API to ir2vec python bindings (PR #184196)   Nishant Sachdeva via llvm-commits
• [llvm] [llvm-ir2vec][Reland] Revert Fixup - Adding Inst Embeddings Map API to ir2vec python bindings (PR #184196)   Nishant Sachdeva via llvm-commits
• [llvm] [llvm-ir2vec][Reland] Revert Fixup - Adding Inst Embeddings Map API to ir2vec python bindings (PR #184196)   Nishant Sachdeva via llvm-commits
• [llvm] [llvm-ir2vec][Reland] Revert Fixup - Adding Inst Embeddings Map API to ir2vec python bindings (PR #184196)   Nishant Sachdeva via llvm-commits
• [llvm] [llvm-ir2vec][Reland] Revert Fixup - Adding Inst Embeddings Map API to ir2vec python bindings (PR #184196)   Nishant Sachdeva via llvm-commits
• [llvm] [llvm-ir2vec][Reland] Revert Fixup - Adding Inst Embeddings Map API to ir2vec python bindings (PR #184196)   Nishant Sachdeva via llvm-commits
• [llvm] [llvm-ir2vec][Reland] Revert Fixup - Adding Inst Embeddings Map API to ir2vec python bindings (PR #184196)   Nishant Sachdeva via llvm-commits
• [llvm] [llvm-ir2vec][Reland] Fixup - Adding Inst Embeddings Map API to ir2vec python bindings (PR #184196)   Nishant Sachdeva via llvm-commits
• [llvm] [llvm-ir2vec][Reland] Adding Inst Embeddings Map API to ir2vec python bindings (PR #184196)   Nishant Sachdeva via llvm-commits
• [llvm] Reland "[llvm-ir2vec] Adding Inst Embeddings Map API to ir2vec python bindings (#180140)" (PR #184196)   Nishant Sachdeva via llvm-commits
• [llvm] [llvm-ir2vec] Adding getFuncNames API to ir2vec python bindings (PR #180473)   Nishant Sachdeva via llvm-commits
• [llvm] [llvm-ir2vec] Refactoring the ir2vec python bindings testing (PR #180664)   Nishant Sachdeva via llvm-commits
• [llvm] [llvm-ir2vec] Adding getFuncNames API to ir2vec python bindings (PR #180473)   Nishant Sachdeva via llvm-commits
• [llvm] [llvm-ir2vec] Adding getFuncNames API to ir2vec python bindings (PR #180473)   Nishant Sachdeva via llvm-commits
• [llvm] [llvm-ir2vec] Refactoring the ir2vec python bindings testing (PR #180664)   Nishant Sachdeva via llvm-commits
• [llvm] [llvm-ir2vec] Refactoring the ir2vec python bindings testing (PR #180664)   Nishant Sachdeva via llvm-commits
• [llvm] [llvm-ir2vec] Refactoring the ir2vec python bindings testing (PR #180664)   Nishant Sachdeva via llvm-commits
• [llvm] [llvm-ir2vec] Refactoring the ir2vec python bindings testing (PR #180664)   Nishant Sachdeva via llvm-commits
• [llvm] [IR] LangRef: document behavior of double-lifetime.start (PR #184296)   Nuno Lopes via llvm-commits
• [llvm] [IR] LangRef: document behavior of double-lifetime.start (PR #184296)   Nuno Lopes via llvm-commits
• [clang] [lld] [llvm] Support -fpass-plugin + -fthinlto-index together (PR #183525)   Nuri Amari via llvm-commits
• [clang] [lld] [llvm] Support -fpass-plugin + -fthinlto-index together (PR #183525)   Nuri Amari via llvm-commits
• [clang] [lld] [llvm] Support -fpass-plugin + -fthinlto-index together (PR #183525)   Nuri Amari via llvm-commits
• [clang] [llvm] [RFC] Better devirtualization for non-virtual interface (PR #185087)   Oliver Hunt via llvm-commits
• [llvm] [Thumb2] Use BXAUT instruction if available (PR #183056)   Oliver Stannard via llvm-commits
• [llvm] [SimplifyCFG] correct and move debug info for mergeConditionalStoreToAddress (PR #180789)   Orlando Cazalet-Hyams via llvm-commits
• [llvm] [Reassociate][DebugInfo] Salvage debug info before rewriting expression (PR #182730)   Orlando Cazalet-Hyams via llvm-commits
• [llvm] [DebugInfo][Reassociate] Use debug records instead of intrinsics in test (PR #185031)   Orlando Cazalet-Hyams via llvm-commits
• [lld] [LLD] Add support for statically resolved vendor-specific RISCV relocations. (PR #181802)   Owen Anderson via llvm-commits
• [llvm] Compute GUIDs once and store in metadata (PR #184065)   Owen Rodley via llvm-commits
• [llvm] [DemandedBits] Support non-constant shift amounts for funnel shifts (PR #180569)   Panagiotis Karouzakis via llvm-commits
• [llvm] [DemandedBits] Support non-constant shift amounts for funnel shifts (PR #180569)   Panagiotis Karouzakis via llvm-commits
• [llvm] [DemandedBits] Support non-constant shift amounts for funnel shifts (PR #180569)   Panagiotis Karouzakis via llvm-commits
• [llvm] [DemandedBits] Support non-constant shift amounts for funnel shifts (PR #180569)   Panagiotis Karouzakis via llvm-commits
• [llvm] [DemandedBits] Support non-constant shift amounts for funnel shifts (PR #180569)   Panagiotis Karouzakis via llvm-commits
• [llvm] [UniformityAnalysis] Track uniform values for conservative divergence queries (PR #180509)   Pankaj Dwivedi via llvm-commits
• [llvm] [UniformityAnalysis] Track uniform values for conservative divergence queries (PR #180509)   Pankaj Dwivedi via llvm-commits
• [llvm] [UniformityAnalysis] Track uniform values for conservative divergence queries (PR #180509)   Pankaj Dwivedi via llvm-commits
• [llvm] [UniformityAnalysis] Track uniform values for conservative divergence queries (PR #180509)   Pankaj Dwivedi via llvm-commits
• [llvm] [UniformityAnalysis] Track uniform values for conservative divergence queries (PR #180509)   Pankaj Dwivedi via llvm-commits
• [llvm] [BOLT] Retain certain local symbols (PR #184074)   Paschalis Mpeis via llvm-commits
• [llvm] [BOLT] Enable compatibility of instrumentation-file-append-pid with instrumentation-sleep-time (PR #183919)   Paschalis Mpeis via llvm-commits
• [llvm] [BOLT] Enable compatibility of instrumentation-file-append-pid with instrumentation-sleep-time (PR #183919)   Paschalis Mpeis via llvm-commits
• [llvm] [BOLT] Enable compatibility of instrumentation-file-append-pid with instrumentation-sleep-time (PR #183919)   Paschalis Mpeis via llvm-commits
• [llvm] [BOLT] Speed up dataflow analysis with RPO (PR #183704)   Paschalis Mpeis via llvm-commits
• [llvm] [BOLT] Speed up dataflow analysis with RPO (PR #183704)   Paschalis Mpeis via llvm-commits
• [llvm] [bolt][NFC] Remove unused ReorderUtils.h (PR #184642)   Paschalis Mpeis via llvm-commits
• [llvm] [BOLT] Speed up dataflow analysis with RPO (PR #183704)   Paschalis Mpeis via llvm-commits
• [clang] [llvm] [clang][LTO] Emit symbols for global inline assembly as module flags (PR #174995)   Paul Kirth via llvm-commits
• [clang] [llvm] [clang][LTO] Emit symbols for global inline assembly as module flags (PR #174995)   Paul Kirth via llvm-commits
• [clang] [llvm] [clang][LTO] Emit symbols for global inline assembly as module flags (PR #174995)   Paul Kirth via llvm-commits
• [clang] [llvm] [clang][LTO] Emit symbols for global inline assembly as module flags (PR #174995)   Paul Kirth via llvm-commits
• [clang] [llvm] [clang][LTO] Emit symbols for global inline assembly as module flags (PR #174995)   Paul Kirth via llvm-commits
• [clang] [llvm] Support -mnop-mcount and -mrecord-mcount on x86_64 elf targets. (PR #184641)   Paul Murphy via llvm-commits
• [llvm] [AArch64] Prefer `SADDLV` over `ADDV` for vector mask reductions (PR #183522)   Paul Walker via llvm-commits
• [llvm] [AArch64] Prefer `SADDLV` over `ADDV` for vector mask reductions (PR #183522)   Paul Walker via llvm-commits
• [llvm] [AArch64] Prefer `SADDLV` over `ADDV` for vector mask reductions (PR #183522)   Paul Walker via llvm-commits
• [llvm] [AArch64] Prefer `SADDLV` over `ADDV` for vector mask reductions (PR #183522)   Paul Walker via llvm-commits
• [llvm] [LICM] Improve LICM when calls only change Inaccessible memory (PR #169379)   Paul Walker via llvm-commits
• [llvm] [LLVM][CodeGen][SVE] Improve isel for split vector bfloat conversions. (PR #184357)   Paul Walker via llvm-commits
• [llvm] [LLVM][CodeGen][SVE] Improve isel for split vector bfloat conversions. (PR #184357)   Paul Walker via llvm-commits
• [llvm] [LLVM][CodeGen][SVE] Improve isel for split vector bfloat conversions. (PR #184357)   Paul Walker via llvm-commits
• [llvm] [AArch64] Prefer `SADDLV` over `ADDV` for vector mask reductions (PR #183522)   Paul Walker via llvm-commits
• [llvm] [AArch64] Fix SVE cost model for various math intrinsics (PR #184358)   Paul Walker via llvm-commits
• [llvm] [AArch64] Fix SVE cost model for various math intrinsics (PR #184358)   Paul Walker via llvm-commits
• [llvm] [AArch64] Fix SVE cost model for various math intrinsics (PR #184358)   Paul Walker via llvm-commits
• [llvm] [AArch64] Fix SVE cost model for various math intrinsics (PR #184358)   Paul Walker via llvm-commits
• [llvm] [AArch64] Fix SVE cost model for various math intrinsics (PR #184358)   Paul Walker via llvm-commits
• [llvm] [AArch64] Prefer `SADDLV` over `ADDV` for vector mask reductions (PR #183522)   Paul Walker via llvm-commits
• [llvm] [AArch64] Fix SVE cost model for various math intrinsics (PR #184358)   Paul Walker via llvm-commits
• [llvm] [AArch64] Lower bfloat FADD/SUB to BFMLAL top/bottom instructions (PR #174814)   Paul Walker via llvm-commits
• [llvm] [AArch64] Fix SVE cost model for various math intrinsics (PR #184358)   Paul Walker via llvm-commits
• [llvm] [AArch64] Fix SVE cost model for various math intrinsics (PR #184358)   Paul Walker via llvm-commits
• [llvm] [AArch64] Fix SVE cost model for various math intrinsics (PR #184358)   Paul Walker via llvm-commits
• [llvm] [AArch64] Refine reduction VT selection in CTPOP -> VECREDUCE combine (PR #183025)   Paul Walker via llvm-commits
• [llvm] [AArch64] Refine reduction VT selection in CTPOP -> VECREDUCE combine (PR #183025)   Paul Walker via llvm-commits
• [llvm] [AArch64] Refine reduction VT selection in CTPOP -> VECREDUCE combine (PR #183025)   Paul Walker via llvm-commits
• [llvm] [AArch64] Fix SVE cost model for various math intrinsics (PR #184358)   Paul Walker via llvm-commits
• [llvm] [AArch64] Refine reduction VT selection in CTPOP -> VECREDUCE combine (PR #183025)   Paul Walker via llvm-commits
• [llvm] [AArch64] Refine reduction VT selection in CTPOP -> VECREDUCE combine (PR #183025)   Paul Walker via llvm-commits
• [llvm] [AArch64] Refine reduction VT selection in CTPOP -> VECREDUCE combine (PR #183025)   Paul Walker via llvm-commits
• [llvm] [AArch64] Refine reduction VT selection in CTPOP -> VECREDUCE combine (PR #183025)   Paul Walker via llvm-commits
• [llvm] [AArch64] Add partial reduce patterns for new fdot instructions (PR #184659)   Paul Walker via llvm-commits
• [llvm] [AArch64] Add partial reduce patterns for new fdot instructions (PR #184659)   Paul Walker via llvm-commits
• [llvm] [AArch64] Add sanitazation when custom lowering fp partial reduce (PR #184811)   Paul Walker via llvm-commits
• [llvm] [AArch64] Add sanitazation when custom lowering fp partial reduce (PR #184811)   Paul Walker via llvm-commits
• [llvm] [AArch64] Add sanitazation when custom lowering fp partial reduce (PR #184811)   Paul Walker via llvm-commits
• [llvm] [AArch64] Add sanitazation when custom lowering fp partial reduce (PR #184811)   Paul Walker via llvm-commits
• [llvm] [AArch64] Add partial reduce patterns for new fdot instructions (PR #184659)   Paul Walker via llvm-commits
• [llvm] [AArch64][SVE2] Allow commuting two-input NBSL/BSL2N idioms. (PR #184847)   Paul Walker via llvm-commits
• [llvm] [AArch64][SVE2] Allow commuting two-input NBSL/BSL2N idioms. (PR #184847)   Paul Walker via llvm-commits
• [llvm] [AArch64][llvm] Update Armv9.7-A dependencies (PR #185034)   Paul Walker via llvm-commits
• [llvm] [AArch64][llvm] Update Armv9.7-A dependencies (PR #185034)   Paul Walker via llvm-commits
• [llvm] [LLVM][CodeGen][SVE] Implement isel for maximumnum/minimumnum. (PR #185074)   Paul Walker via llvm-commits
• [llvm] [LLVM][CodeGen][SVE] Implement isel for maximumnum/minimumnum. (PR #185074)   Paul Walker via llvm-commits
• [llvm] [BOLT] Check if symbol is in data area of function (PR #160143)   Pavel Iliin via llvm-commits
• [llvm] [IR] Add initial support for the byte type (PR #178666)   Pedro Lobo via llvm-commits
• [llvm] [IR] Add initial support for the byte type (PR #178666)   Pedro Lobo via llvm-commits
• [llvm] [LegalizeVectorOps][RISCV][PowerPC][AArch64][X86] Enable the clmul/clmulr/clmulh expansion code. (PR #184257)   Pengcheng Wang via llvm-commits
• [llvm] [RISCV] Promote i8/i16/i32 scalable vector CLMUL to i64 CLMUL with Zvbc. (PR #184265)   Pengcheng Wang via llvm-commits
• [llvm] [RISCV] Handle Zvabd and XRivosVizip EEWs in RISCVVLOptimizer (PR #184117)   Pengcheng Wang via llvm-commits
• [llvm] [RISCV] Handle Zvabd and XRivosVizip EEWs in RISCVVLOptimizer (PR #184117)   Pengcheng Wang via llvm-commits
• [llvm] [RISCV] Remove VL != 1 restriction in RISCVVLOptimizer (PR #184298)   Pengcheng Wang via llvm-commits
• [llvm] [RISCV] Fix type inference ambiguity in SwapSysReg pattern (PR #184305)   Pengcheng Wang via llvm-commits
• [llvm] [RISCV] Lower i8/i16/i32 scalable vector ISD::CLMUL/CLMULH with Zvbc32e. (PR #184465)   Pengcheng Wang via llvm-commits
• [llvm] [RISCV] Lower i8/i16/i32 scalable vector ISD::CLMUL/CLMULH with Zvbc32e. (PR #184465)   Pengcheng Wang via llvm-commits
• [llvm] [RISCV] Lower i8/i16/i32 scalable vector ISD::CLMUL/CLMULH with Zvbc32e. (PR #184465)   Pengcheng Wang via llvm-commits
• [llvm] [RISCV] Add findCommutedOpIndices support for Zvabd (PR #184602)   Pengcheng Wang via llvm-commits
• [llvm] [RISCV] Add findCommutedOpIndices support for Zvabd (PR #184602)   Pengcheng Wang via llvm-commits
• [llvm] [RISCV] Add findCommutedOpIndices support for Zvabd (PR #184602)   Pengcheng Wang via llvm-commits
• [llvm] [RISCV] Lower (abd[s|u] a, b) to (abs (sub a, b)) for i32/i64 element when `Zvabd` exists (PR #180494)   Pengcheng Wang via llvm-commits
• [llvm] [RISCV] Add tests for vwaddu_wv+vabd(u) combine (PR #184962)   Pengcheng Wang via llvm-commits
• [clang] [llvm] [RISCV] Support for Zvabd fast-track proposal (PR #124239)   Pengcheng Wang via llvm-commits
• [clang] [llvm] [RISCV] Support for Zvabd fast-track proposal (PR #124239)   Pengcheng Wang via llvm-commits
• [llvm] [RISCV] Add tests for vwaddu_wv+vabd(u) combine (PR #184962)   Pengcheng Wang via llvm-commits
• [llvm] [Support] Always scale InstructionCost::Value (PR #178962)   Pengcheng Wang via llvm-commits
• [llvm] [Support] Always scale InstructionCost::Value (PR #178962)   Pengcheng Wang via llvm-commits
• [llvm] [Support] Always scale InstructionCost::Value (PR #178962)   Pengcheng Wang via llvm-commits
• [lld] [llvm] [RISCV] Teach RISCVMergeBaseOffset to merge %lo into load/store folding arithmetic (PR #185353)   Pengcheng Wang via llvm-commits
• [llvm] AMDGPU/GlobalISel: Regbanklegalize rules for G_PHI (PR #179735)   Petar Avramovic via llvm-commits
• [llvm] AMDGPU/GlobalISel: Regbanklegalize rules for G_PHI (PR #179735)   Petar Avramovic via llvm-commits
• [llvm] AMDGPU/GlobalISel: Lower G_EXTRACT in legalizer (PR #181036)   Petar Avramovic via llvm-commits
• [llvm] AMDGPU/GlobalISel: Lower G_EXTRACT in legalizer (PR #181036)   Petar Avramovic via llvm-commits
• [llvm] AMDGPU/GlobalISel: Lower G_EXTRACT in legalizer (PR #181036)   Petar Avramovic via llvm-commits
• [llvm] AMDGPU/GlobalISel: RegBankLegalize rules for amdgcn_exp/exp_row (PR #181956)   Petar Avramovic via llvm-commits
• [llvm] AMDGPU/GlobalISel: RegBankLegalize rules for amdgcn_exp/exp_row (PR #181956)   Petar Avramovic via llvm-commits
• [llvm] AMDGPU/GlobalISel: Regbanklegalize rules for G_PHI (PR #179735)   Petar Avramovic via llvm-commits
• [llvm] AMDGPU/GlobalISel: Lower G_EXTRACT in legalizer (PR #181036)   Petar Avramovic via llvm-commits
• [llvm] AMDGPU/GlobalISel: Lower G_EXTRACT in legalizer (PR #181036)   Petar Avramovic via llvm-commits
• [llvm] AMDGPU/GlobalISel: Lower G_EXTRACT in legalizer (PR #181036)   Petar Avramovic via llvm-commits
• [llvm] AMDGPU/GlobalISel: Lower G_EXTRACT in legalizer (PR #181036)   Petar Avramovic via llvm-commits
• [llvm] AMDGPU/GlobalISel: Lower G_EXTRACT in legalizer (PR #181036)   Petar Avramovic via llvm-commits
• [llvm] AMDGPU/GlobalISel: RegBankLegalize rules for amdgcn_exp/exp_row (PR #181956)   Petar Avramovic via llvm-commits
• [llvm] [AMDGPU][GlobalIsel] Add register bank legalization rules for amdgcn atomic fminmax num (PR #184564)   Petar Avramovic via llvm-commits
• [llvm] [AMDGPU][GlobalIsel] Add register bank legalization rules for amdgcn atomic fminmax num (PR #184564)   Petar Avramovic via llvm-commits
• [llvm] [AMDGPU][GlobalIsel] Add register bank legalization rules for amdgcn atomic fminmax num (PR #184564)   Petar Avramovic via llvm-commits
• [llvm] [AMDGPU][GlobalIsel] Add register bank legalization rules for amdgcn atomic fminmax num (PR #184564)   Petar Avramovic via llvm-commits
• [llvm] [AMDGPU][GlobalIsel] Add register bank legalization rules for amdgcn atomic fminmax num (PR #184564)   Petar Avramovic via llvm-commits
• [llvm] AMDGPU/GlobalISel: Regbanklegalize rules for G_PHI (PR #179735)   Petar Avramovic via llvm-commits
• [clang] [flang] [llvm] [flang] Add runtime trampoline pool for W^X compliance (PR #183108)   Peter Klausler via llvm-commits
• [llvm] [flang-rt] Fixes EXECUTE_COMMAND_LINE() status management and double buffering (PR #184285)   Peter Klausler via llvm-commits
• [llvm] [flang-rt] Handle NAMELIST logical comments without preceding space (PR #183202)   Peter Klausler via llvm-commits
• [clang] [flang] [llvm] [flang] Add runtime trampoline pool for W^X compliance (PR #183108)   Peter Klausler via llvm-commits
• [llvm] [flang-rt] Fix EXECUTE_COMMAND_LINE() on Windows (PR #184875)   Peter Klausler via llvm-commits
• [clang] [flang] [llvm] [flang] Add runtime trampoline pool for W^X compliance (PR #183108)   Peter Klausler via llvm-commits
• [llvm] [SelectionDAG] Fix cycle in ReplacedValues during type legalization (PR #184697)   Peter Rong via llvm-commits
• [lld] [llvm] [lld][DebugInfo/BTF] Add BTF section merging and deduplication (PR #183915)   Peter Smith via llvm-commits
• [lld] [llvm] [lld][DebugInfo/BTF] Add BTF section merging and deduplication (PR #183915)   Peter Smith via llvm-commits
• [lld] [llvm] [lld][DebugInfo/BTF] Add BTF section merging and deduplication (PR #183915)   Peter Smith via llvm-commits
• [lld] [llvm] [lld][DebugInfo/BTF] Add BTF section merging and deduplication (PR #183915)   Peter Smith via llvm-commits
• [lld] [llvm] [lld][DebugInfo/BTF] Add BTF section merging and deduplication (PR #183915)   Peter Smith via llvm-commits
• [lld] [LLD][AArch64] Handle R_AARCH64_TLS_DTPREL64 in non-alloc sections (PR #183962)   Peter Smith via llvm-commits
• [lld] [ELF] Move target-specific synthetic sections into Arch/ files (PR #184057)   Peter Smith via llvm-commits
• [lld] [ELF] Move target-specific synthetic sections into Arch/ files (PR #184057)   Peter Smith via llvm-commits
• [lld] [ELF] Move target-specific synthetic sections into Arch/ files (PR #184057)   Peter Smith via llvm-commits
• [lld] [ELF] Add TargetInfo::initTargetSpecificSections hook (PR #184292)   Peter Smith via llvm-commits
• [lld] [LLD][AArch64] Handle R_AARCH64_TLS_DTPREL64 in non-alloc sections (PR #183962)   Peter Smith via llvm-commits
• [llvm] [CI] Test failing fast (PR #184423)   Petr Hosek via llvm-commits
• [llvm] [Tablegen] Fix condition to report when lanemask overflows (PR #181810)   Petr Vesely via llvm-commits
• [llvm] [Analysis] Extend llvm.experimental.cttz.elts to type-based-cost (PR #184578)   Philipp Rados via llvm-commits
• [llvm] [Analysis] Extend llvm.experimental.cttz.elts to type-based-cost (PR #184578)   Philipp Rados via llvm-commits
• [llvm] [Analysis] Extend llvm.experimental.cttz.elts to type-based-cost (PR #184578)   Philipp Rados via llvm-commits
• [llvm] [Analysis] Extend llvm.experimental.cttz.elts to type-based-cost (PR #184578)   Philipp Rados via llvm-commits
• [llvm] [Analysis] Extend llvm.experimental.cttz.elts to type-based-cost (PR #184578)   Philipp Rados via llvm-commits
• [llvm] [Analysis] Extend llvm.experimental.cttz.elts to type-based-cost (PR #184578)   Philipp Rados via llvm-commits
• [llvm] [Analysis] Extend llvm.experimental.cttz.elts to type-based-cost (PR #184578)   Philipp Rados via llvm-commits
• [llvm] [Analysis] Extend llvm.experimental.cttz.elts to type-based-cost (PR #184578)   Philipp Rados via llvm-commits
• [llvm] [DAG] Fold SETCC against isKnownNeverZero (PR #184010)   Phoebe Wang via llvm-commits
• [llvm] [DAG] Fold SETCC against isKnownNeverZero (PR #184010)   Phoebe Wang via llvm-commits
• [llvm] Revert "Avoid maxnum(sNaN, x) optimizations / folds (#170181)" (PR #184125)   Phoebe Wang via llvm-commits
• [clang] [llvm] [X86] Support apxf in attribute target (PR #184078)   Phoebe Wang via llvm-commits
• [clang] [llvm] [X86] Support apxf in attribute target (PR #184078)   Phoebe Wang via llvm-commits
• [clang] [llvm] [X86] Support apxf in attribute target (PR #184078)   Phoebe Wang via llvm-commits
• [clang] [llvm] [X86] Support apxf in attribute target (PR #184078)   Phoebe Wang via llvm-commits
• [clang] [llvm] [X86] Support apxf in attribute target (PR #184078)   Phoebe Wang via llvm-commits
• [llvm] [X86][APX] Add a few pseudo opcodes support EGPR (PR #184550)   Phoebe Wang via llvm-commits
• [clang] [llvm] [X86] support reserve r8~r15 on X86_64 (PR #180242)   Phoebe Wang via llvm-commits
• [llvm] [X86][APX] Add a few pseudo opcodes support EGPR (PR #184550)   Phoebe Wang via llvm-commits
• [llvm] [X86] remove unnecessary movs when %rdx is an input to mulx (PR #184462)   Phoebe Wang via llvm-commits
• [llvm] [X86] Make ISD::ROTL/ROTR vector rotates legal on XOP+AVX512 targets (PR #184587)   Phoebe Wang via llvm-commits
• [clang] [llvm] [X86] Support apxf in attribute target (PR #184078)   Phoebe Wang via llvm-commits
• [clang] [llvm] [X86] Support apxf in attribute target (PR #184078)   Phoebe Wang via llvm-commits
• [llvm] [X86] Declare 128/256-bit funnel shifts legal on VBMI2 + NOVLX targets (PR #184634)   Phoebe Wang via llvm-commits
• [llvm] [X86] Add (v)pcmpestr(m/i)q to set the W bit. (PR #184746)   Phoebe Wang via llvm-commits
• [llvm] [X86] Make ISD::ROTL/ROTR vXi16 vector rotates legal on VBMI2 targets (PR #184768)   Phoebe Wang via llvm-commits
• [llvm] [X86] Make ISD::ROTL/ROTR vXi16 vector rotates legal on VBMI2 targets (PR #184768)   Phoebe Wang via llvm-commits
• [llvm] [X86] Expand i512 shifts on AVX512 targets (PR #183198)   Phoebe Wang via llvm-commits
• [llvm] [X86] remove unnecessary movs when %rdx is an input to mulx (PR #184462)   Phoebe Wang via llvm-commits
• [llvm] [X86] remove unnecessary movs when %rdx is an input to mulx (PR #184462)   Phoebe Wang via llvm-commits
• [clang] [llvm] [X86] Reduce -ffixed-r compile-time overhead (PR #184606)   Phoebe Wang via llvm-commits
• [llvm] apply mulx optimization for two-wide mul instruction (mull, mulq) (PR #185127)   Phoebe Wang via llvm-commits
• [llvm] apply mulx optimization for two-wide mul instruction (mull, mulq) (PR #185127)   Phoebe Wang via llvm-commits
• [llvm] apply mulx optimization for two-wide mul instruction (mull, mulq) (PR #185127)   Phoebe Wang via llvm-commits
• [llvm] apply mulx optimization for two-wide mul instruction (mull, mulq) (PR #185127)   Phoebe Wang via llvm-commits
• [llvm] [X86] combineVTRUNCSAT - attempt to recognise VTRUNCS/US(CONCAT(X,Y)) -> PACKSS/US(X,Y) folds. (PR #178707)   Phoebe Wang via llvm-commits
• [llvm] [X86] fold mov dec/inc to lea +- 1 (PR #185194)   Phoebe Wang via llvm-commits
• [llvm] Fixing upper lane return source for X86 intrinsics (PR #185329)   Phoebe Wang via llvm-commits
• [llvm] Fixing upper lane return source for X86 intrinsics (PR #185329)   Phoebe Wang via llvm-commits
• [llvm] Fixing upper lane return source for X86 intrinsics (PR #185329)   Phoebe Wang via llvm-commits
• [llvm] [FastISel] Lower call instruction with illegal type returned (PR #180322)   Phoebe Wang via llvm-commits
• [llvm] [FastISel] Lower call instruction with illegal type returned (PR #180322)   Phoebe Wang via llvm-commits
• [llvm] [FastISel] Lower call instruction with illegal type returned (PR #180322)   Phoebe Wang via llvm-commits
• [llvm] [X86] Fix wrong RIP-relative relocations for AVX10.2 saturation conversions (PR #185254)   Phoebe Wang via llvm-commits
• [clang] [llvm] [X86] Reduce -ffixed-r compile-time overhead (PR #184606)   Phoebe Wang via llvm-commits
• [clang] [llvm] [AMDGPU][GFX12.5] Reimplement monitor load as an atomic operation (PR #177343)   Pierre van Houtryve via llvm-commits
• [llvm] [offload] Add properties parameter to olLaunchKernel (PR #184343)   Piotr Balcer via llvm-commits
• [llvm] [offload] Add properties parameter to olLaunchKernel (PR #184343)   Piotr Balcer via llvm-commits
• [llvm] [offload] Add properties parameter to olLaunchKernel (PR #184343)   Piotr Balcer via llvm-commits
• [llvm] [AArch64] Combine (and/or X, (dup (not Y))) -> (bic/orn X, (dup Y)) (PR #175739)   Piotr Fusik via llvm-commits
• [llvm] [AArch64] Combine (and/or X, (dup (not Y))) -> (bic/orn X, (dup Y)) (PR #175739)   Piotr Fusik via llvm-commits
• [llvm] [AArch64] Combine (and/or X, (dup (not Y))) -> (bic/orn X, (dup Y)) (PR #175739)   Piotr Fusik via llvm-commits
• [llvm] [AArch64] Combine (and/or X, (dup (not Y))) -> (bic/orn X, (dup Y)) (PR #175739)   Piotr Fusik via llvm-commits
• [llvm] [AArch64][NFC] Remove unused parameters for `performORCombine` (PR #184075)   Piotr Fusik via llvm-commits
• [llvm] [AArch64] Combine (and/or X, (dup (not Y))) -> (bic/orn X, (dup Y)) (PR #175739)   Piotr Fusik via llvm-commits
• [llvm] [AArch64][NFC] Remove unused parameters for `performORCombine` (PR #184075)   Piotr Fusik via llvm-commits
• [llvm] [AArch64][NFC] Remove unused parameters for `performORCombine` (PR #184075)   Piotr Fusik via llvm-commits
• [llvm] [AArch64] Sink NOT to be fold into BIC/ORN/EON (PR #176194)   Piotr Fusik via llvm-commits
• [llvm] [AArch64] Sink NOT to be fold into BIC/ORN/EON (PR #176194)   Piotr Fusik via llvm-commits
• [llvm] [AArch64][NFC] Remove unused parameters for `performORCombine` (PR #184075)   Piotr Fusik via llvm-commits
• [llvm] [AArch64] Sink NOT to be fold into BIC/ORN/EON (PR #176194)   Piotr Fusik via llvm-commits
• [llvm] [AArch64] Sink NOT to be fold into BIC/ORN/EON (PR #176194)   Piotr Fusik via llvm-commits
• [llvm] [AArch64] Sink NOT to be fold into BIC/ORN/EON (PR #176194)   Piotr Fusik via llvm-commits
• [llvm] [AArch64] Sink NOT to be fold into BIC/ORN/EON (PR #176194)   Piotr Fusik via llvm-commits
• [llvm] [AArch64] Sink NOT to be fold into BIC/ORN/EON (PR #176194)   Piotr Fusik via llvm-commits
• [llvm] [AArch64] Sink NOT to be fold into BIC/ORN/EON (PR #176194)   Piotr Fusik via llvm-commits
• [llvm] [AArch64] Sink NOT to be fold into BIC/ORN/EON (PR #176194)   Piotr Fusik via llvm-commits
• [llvm] [AArch64] Sink NOT to be fold into BIC/ORN/EON (PR #176194)   Piotr Fusik via llvm-commits
• [llvm] [AArch64] Sink NOT to be fold into BIC/ORN/EON (PR #176194)   Piotr Fusik via llvm-commits
• [llvm] [AArch64] Sink NOT to be fold into BIC/ORN/EON (PR #176194)   Piotr Fusik via llvm-commits
• [llvm] [AArch64] Sink NOT to be fold into BIC/ORN/EON (PR #176194)   Piotr Fusik via llvm-commits
• [llvm] [AArch64] Sink NOT to be fold into BIC/ORN/EON (PR #176194)   Piotr Fusik via llvm-commits
• [llvm] [AArch64] Sink NOT to be fold into BIC/ORN/EON (PR #176194)   Piotr Fusik via llvm-commits
• [llvm] [X86] Sink NOT to be fold into ANDN (PR #172329)   Piotr Fusik via llvm-commits
• [llvm] [AArch64][SVE2] Allow commuting two-input NBSL/BSL2N idioms. (PR #184847)   Piotr Fusik via llvm-commits
• [llvm] [X86] Sink NOT to be fold into ANDN (PR #172329)   Piotr Fusik via llvm-commits
• [llvm] [X86] Sink NOT to be fold into ANDN (PR #172329)   Piotr Fusik via llvm-commits
• [clang] [llvm] [AMDGPU] Remove DX10_CLAMP and IEEE bits from gfx1170 (PR #182107)   Piotr Sobczak via llvm-commits
• [llvm] [LLVM][NVPTX] Fix infinite legalization loop in tcgen05.st (PR #183012)   Pradeep Kumar via llvm-commits
• [llvm] [DAG] isKnownNeverZero - add ISD::SRA/SRL DemandedElts handling and tests (PR #183577)   Pranshu Goyal via llvm-commits
• [llvm] [DAG] isKnownNeverZero - add ISD::SRA/SRL DemandedElts handling and tests (PR #183577)   Pranshu Goyal via llvm-commits
• [llvm] [DAG] SelectionDAG::isKnownToBeAPowerOfTwo - add ISD::TRUNCATE handling and tests (PR #184365)   Pranshu Goyal via llvm-commits
• [llvm] [DAG] SelectionDAG::isKnownToBeAPowerOfTwo - add ISD::TRUNCATE handling and tests (PR #184365)   Pranshu Goyal via llvm-commits
• [llvm] [DAG] SelectionDAG::isKnownToBeAPowerOfTwo - add ISD::TRUNCATE handling and tests (PR #184365)   Pranshu Goyal via llvm-commits
• [llvm] [DAG] SelectionDAG::isKnownToBeAPowerOfTwo - add ISD::TRUNCATE handling and tests (PR #184365)   Pranshu Goyal via llvm-commits
• [llvm] [Analysis] isTriviallyVectorizable - add Intrinsic::clmul along with vectorisation tests (PR #180014)   Pranshu Goyal via llvm-commits
• [llvm] [LoongArch] Fold conditional branches with constant conditions (PR #185161)   Pranshu Goyal via llvm-commits
• [llvm] [LoongArch] Fold conditional branches with constant conditions (PR #185161)   Pranshu Goyal via llvm-commits
• [llvm] [LoongArch] Fold conditional branches with constant conditions (PR #185161)   Pranshu Goyal via llvm-commits
• [llvm] [LoongArch] Fold conditional branches with constant conditions (PR #185161)   Pranshu Goyal via llvm-commits
• [llvm] [LoongArch] Fold conditional branches with constant conditions (PR #185161)   Pranshu Goyal via llvm-commits
• [llvm] [RISCV] Add scalar saturating add/sub operations for i32 for RV64P (PR #184062)   Qihan Cai via llvm-commits
• [llvm] [RISCV] Add scalar saturating add/sub operations for i32 for RV64P (PR #184062)   Qihan Cai via llvm-commits
• [llvm] [AMDGPU] Add ML-oriented coexec scheduler selection and queue handling (PR #169616)   Quentin Colombet via llvm-commits
• [llvm] Centralize prefetch target storage in MachineFunction. (PR #184194)   Rahman Lavaee via llvm-commits
• [llvm] Centralize prefetch target storage in MachineFunction. (PR #184194)   Rahman Lavaee via llvm-commits
• [llvm] Centralize prefetch target storage in MachineFunction. (PR #184194)   Rahman Lavaee via llvm-commits
• [llvm] Centralize prefetch target storage in MachineFunction. (PR #184194)   Rahman Lavaee via llvm-commits
• [llvm] Centralize prefetch target storage in MachineFunction. (PR #184194)   Rahman Lavaee via llvm-commits
• [llvm] X86: Add prefetch insertion based on Propeller profile (PR #166324)   Rahman Lavaee via llvm-commits
• [llvm] [NFC][TableGen] Add deleted copy operations for RAII guard classes (PR #184168)   Rahul Joshi via llvm-commits
• [llvm] [NFC][TableGen] Add deleted copy operations for RAII guard classes (PR #184168)   Rahul Joshi via llvm-commits
• [llvm] [TableGen] Add let append/prepend syntax for field concatenation (PR #182382)   Rahul Joshi via llvm-commits
• [llvm] [TableGen] Add let append/prepend syntax for field concatenation (PR #182382)   Rahul Joshi via llvm-commits
• [llvm] [TableGen] Add let append/prepend syntax for field concatenation (PR #182382)   Rahul Joshi via llvm-commits
• [llvm] [TableGen] Add let append/prepend syntax for field concatenation (PR #182382)   Rahul Joshi via llvm-commits
• [llvm] [TableGen] Add let append/prepend syntax for field concatenation (PR #182382)   Rahul Joshi via llvm-commits
• [llvm] [TableGen] Add let append/prepend syntax for field concatenation (PR #182382)   Rahul Joshi via llvm-commits
• [llvm] [TableGen] Add let append/prepend syntax for field concatenation (PR #182382)   Rahul Joshi via llvm-commits
• [llvm] [TableGen] Add let append/prepend syntax for field concatenation (PR #182382)   Rahul Joshi via llvm-commits
• [llvm] [TableGen] Add let append/prepend syntax for field concatenation (PR #182382)   Rahul Joshi via llvm-commits
• [llvm] [TableGen] Add let append/prepend syntax for field concatenation (PR #182382)   Rahul Joshi via llvm-commits
• [llvm] [TableGen] Add let append/prepend syntax for field concatenation (PR #182382)   Rahul Joshi via llvm-commits
• [llvm] [TableGen] Add let append/prepend syntax for field concatenation (PR #182382)   Rahul Joshi via llvm-commits
• [llvm] [TableGen] Add let append/prepend syntax for field concatenation (PR #182382)   Rahul Joshi via llvm-commits
• [compiler-rt] [ubsan_minimal] Build on Solaris (PR #184976)   Rainer Orth via llvm-commits
• [compiler-rt] [ubsan_minimal] Build on Solaris (PR #184976)   Rainer Orth via llvm-commits
• [llvm] [LangRef] Mention allocation elision (PR #177592)   Ralf Jung via llvm-commits
• [llvm] [LangRef] Mention allocation elision (PR #177592)   Ralf Jung via llvm-commits
• [llvm] [LangRef] Mention allocation elision (PR #177592)   Ralf Jung via llvm-commits
• [llvm] [LangRef] Mention allocation elision (PR #177592)   Ralf Jung via llvm-commits
• [llvm] [LangRef] Mention allocation elision (PR #177592)   Ralf Jung via llvm-commits
• [llvm] [IR] LangRef: document behavior of double-lifetime.start (PR #184296)   Ralf Jung via llvm-commits
• [llvm] [IR] LangRef: document behavior of double-lifetime.start (PR #184296)   Ralf Jung via llvm-commits
• [llvm] [IR] LangRef: document behavior of double-lifetime.start (PR #184296)   Ralf Jung via llvm-commits
• [llvm] [IR] LangRef: document behavior of double-lifetime.start (PR #184296)   Ralf Jung via llvm-commits
• [llvm] [IR] LangRef: document behavior of double-lifetime.start (PR #184296)   Ralf Jung via llvm-commits
• [llvm] [IR] LangRef: document behavior of double-lifetime.start (PR #184296)   Ralf Jung via llvm-commits
• [llvm] [IR] LangRef: document behavior of double-lifetime.start (PR #184296)   Ralf Jung via llvm-commits
• [llvm] [LangRef] asm clobber constrains: '~memory' allows reads and synchronization (PR #150191)   Ralf Jung via llvm-commits
• [llvm] [IR] LangRef: document behavior of double-lifetime.start (PR #184296)   Ralf Jung via llvm-commits
• [llvm] [IR] LangRef: document behavior of double-lifetime.start (PR #184296)   Ralf Jung via llvm-commits
• [llvm] [IR] LangRef: document behavior of double-lifetime.start (PR #184296)   Ralf Jung via llvm-commits
• [llvm] [IR] LangRef: document behavior of double-lifetime.start (PR #184296)   Ralf Jung via llvm-commits
• [llvm] [IR] LangRef: document behavior of double-lifetime.start (PR #184296)   Ralf Jung via llvm-commits
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• [llvm] [IR] LangRef: document behavior of double-lifetime.start (PR #184296)   Ralf Jung via llvm-commits
• [llvm] [IR] LangRef: document behavior of double-lifetime.start (PR #184296)   Ralf Jung via llvm-commits
• [llvm] [IR] LangRef: document behavior of double-lifetime.start (PR #184296)   Ralf Jung via llvm-commits
• [llvm] [IR] LangRef: document behavior of double-lifetime.start (PR #184296)   Ralf Jung via llvm-commits
• [llvm] [IR] LangRef: document behavior of double-lifetime.start (PR #184296)   Ralf Jung via llvm-commits
• [llvm] [IR] LangRef: document behavior of double-lifetime.start (PR #184296)   Ralf Jung via llvm-commits
• [llvm] [IR] LangRef: document behavior of double-lifetime.start (PR #184296)   Ralf Jung via llvm-commits
• [llvm] [IR] LangRef: document behavior of double-lifetime.start (PR #184296)   Ralf Jung via llvm-commits
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• [llvm] [AArch64] Sink NOT to be fold into BIC/ORN/EON (PR #176194)   Ricardo Jesus via llvm-commits
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• [llvm] [OpenMP][Offload] Handle `present/to/from` when a different entry did `alloc/delete`. (PR #165494)   Robert Imschweiler via llvm-commits
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• [llvm] [BasicBlockUtils] Fixed LoopInfo update in UpdateAnalysisInformation() (PR #177147)   Robert Imschweiler via llvm-commits
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• [llvm] [dsymutil] Add option to filter debug map objects by allow/disallow-list (PR #182083)   Roy Shi via llvm-commits
• [llvm] [dsymutil] Add option to filter debug map objects by allow/disallow-list (PR #182083)   Roy Shi via llvm-commits
• [llvm] [dsymutil] Add option to filter debug map objects by allow/disallow-list (PR #182083)   Roy Shi via llvm-commits
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• [llvm] [dsymutil] Use DebugMapFilter when parsing --allow/--disallow YAML input (PR #185061)   Roy Shi via llvm-commits
• [llvm] [dsymutil] Use DebugMapFilter when parsing --allow/--disallow YAML input (PR #185061)   Roy Shi via llvm-commits
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• [llvm] [dsymutil] Use DebugMapFilter when parsing --allow/--disallow YAML input (PR #185061)   Roy Shi via llvm-commits
• [llvm] [dsymutil] Use DebugMapFilter when parsing --allow/--disallow YAML input (PR #185061)   Roy Shi via llvm-commits
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• [llvm] [SLP]Prefer copyable over alternate (PR #183777)   Ryan Buchner via llvm-commits
• [llvm] [Analysis][RISCV] More accurately estimate the cost of strided vector loads (PR #175135)   Ryan Buchner via llvm-commits
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• [llvm] [SLP]Initial compatibility support for shl v, 1 and add v, v (PR #181168)   Ryan Buchner via llvm-commits
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• [llvm] [SLP]Allow bitcast/bswap based reductions for types, larger than the total strided size (PR #184018)   Ryan Buchner via llvm-commits
• [llvm] [SLP] Fix logic for commuting copyable operands in buildInstructionsState() (PR #183773)   Ryan Buchner via llvm-commits
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• [llvm] [SLP]Initial support for ordered reductions (PR #182644)   Ryan Buchner via llvm-commits
• [llvm] [AArch64][GlobalISel] Use GPR for illegal fconstants and extend < 32 bit GPR constants to 32 bits (PR #178692)   Ryan Cowan via llvm-commits
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• [llvm] [llvm-otool] Fix -arch flag for universal binary slice selection (PR #184810)   Ryan Mansfield via llvm-commits
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• [llvm] [TableGen] Allow targets to enforce regunits assignment as intervals (PR #175823)   Ryan Mitchell via llvm-commits
• [llvm] [AMDGPU] Disable negative imm offset for async load/store instructions (PR #185078)   Ryan Mitchell via llvm-commits
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• [llvm] [DA] Add tests for the Weak Zero SIV tests return incorrect result (NFC) (PR #183735)   Ryotaro Kasuga via llvm-commits
• [llvm] [DA] Add tests for the Weak Zero SIV tests return incorrect result (NFC) (PR #183735)   Ryotaro Kasuga via llvm-commits
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• [llvm] [DA] Add tests that represent edge ecases for the Weak Zero SIV tests (NFC) (PR #183735)   Ryotaro Kasuga via llvm-commits
• [llvm] [DA] Add tests that represent edge cases for the Weak Zero SIV tests (NFC) (PR #183735)   Ryotaro Kasuga via llvm-commits
• [llvm] [DA] Add tests that represent edge cases for the Weak Zero SIV tests (NFC) (PR #183735)   Ryotaro Kasuga via llvm-commits
• [llvm] [DA] Add tests that represent edge cases for the Weak Zero SIV tests (NFC) (PR #183735)   Ryotaro Kasuga via llvm-commits
• [llvm] [DA] Add tests that represent edge cases for the Weak Zero SIV tests (NFC) (PR #183735)   Ryotaro Kasuga via llvm-commits
• [llvm] [DA] Fix the Weak Zero SIV tests when the coeff may be zero (PR #183736)   Ryotaro Kasuga via llvm-commits
• [llvm] [DA] Fix the Weak Zero SIV tests when the coeff may be zero (PR #183736)   Ryotaro Kasuga via llvm-commits
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• [llvm] [DA] Remove consistent flag from Dependence class (PR #181608)   Ryotaro Kasuga via llvm-commits
• [llvm] [DA] Remove consistent flag from Dependence class (PR #181608)   Ryotaro Kasuga via llvm-commits
• [llvm] [DA] Test AddRecs are nsw before strong SIV test (PR #183421)   Ryotaro Kasuga via llvm-commits
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• [llvm] [DA] Test AddRecs are nsw before strong SIV test (PR #183421)   Ryotaro Kasuga via llvm-commits
• [llvm] [DA] Fix the Weak Zero SIV tests when the coeff may be zero (PR #183736)   Ryotaro Kasuga via llvm-commits
• [llvm] [DA] Fix the Weak Zero SIV tests when the coeff may be zero (PR #183736)   Ryotaro Kasuga via llvm-commits
• [llvm] [DA] Fix the Weak Zero SIV tests when the coeff may be zero (PR #183736)   Ryotaro Kasuga via llvm-commits
• [llvm] [DA] Fix the Weak Zero SIV tests when the coeff may be zero (PR #183736)   Ryotaro Kasuga via llvm-commits
• [llvm] [DA] Fix the Weak Zero SIV tests when the coeff may be zero (PR #183736)   Ryotaro Kasuga via llvm-commits
• [llvm] [DA] Remove isPeelFirst and isPeelLast (PR #183737)   Ryotaro Kasuga via llvm-commits
• [llvm] [DA] Remove isPeelFirst and isPeelLast (PR #183737)   Ryotaro Kasuga via llvm-commits
• [llvm] [DA] Remove isPeelFirst and isPeelLast (PR #183737)   Ryotaro Kasuga via llvm-commits
• [llvm] [DA] Remove isPeelFirst and isPeelLast (PR #183737)   Ryotaro Kasuga via llvm-commits
• [llvm] [DA] Remove isPeelFirst and isPeelLast (PR #183737)   Ryotaro Kasuga via llvm-commits
• [llvm] [DA] Rewrite formula in the Weak Zero SIV tests (PR #183738)   Ryotaro Kasuga via llvm-commits
• [llvm] [DA] Rewrite formula in the Weak Zero SIV tests (PR #183738)   Ryotaro Kasuga via llvm-commits
• [llvm] [DA] Rewrite formula in the Weak Zero SIV tests (PR #183738)   Ryotaro Kasuga via llvm-commits
• [llvm] [DA] Rewrite formula in the Weak Zero SIV tests (PR #183738)   Ryotaro Kasuga via llvm-commits
• [llvm] [DA] Rewrite formula in the Weak Zero SIV tests (PR #183738)   Ryotaro Kasuga via llvm-commits
• [llvm] [DA] Rewrite formula in the Weak Zero SIV tests (PR #183738)   Ryotaro Kasuga via llvm-commits
• [llvm] [DA] Fix overflows when calculating Delta in the Weak Zero SIV tests (PR #184997)   Ryotaro Kasuga via llvm-commits
• [llvm] [DA] Fix overflows when calculating Delta in the Weak Zero SIV tests (PR #184997)   Ryotaro Kasuga via llvm-commits
• [llvm] [DA] Fix overflows when calculating Delta in the Weak Zero SIV tests (PR #184997)   Ryotaro Kasuga via llvm-commits
• [llvm] [DA] Fix overflows when calculating Delta in the Weak Zero SIV tests (PR #184997)   Ryotaro Kasuga via llvm-commits
• [llvm] [DA] Fix overflows when calculating Delta in the Weak Zero SIV tests (PR #184997)   Ryotaro Kasuga via llvm-commits
• [llvm] [DA] Fix overflows when calculating Delta in the Weak Zero SIV tests (PR #184997)   Ryotaro Kasuga via llvm-commits
• [llvm] [DA] Fix overflows when calculating Delta in the Weak Zero SIV tests (PR #184997)   Ryotaro Kasuga via llvm-commits
• [llvm] [DA] Test AddRecs are nsw before strong SIV test (PR #183421)   Ryotaro Kasuga via llvm-commits
• [llvm] [llvm-ir2vec] Adding Inst Embeddings Map API to ir2vec python bindings (PR #180140)   S. VenkataKeerthy via llvm-commits
• [llvm] [llvm-ir2vec] Adding Inst Embeddings Map API to ir2vec python bindings (PR #180140)   S. VenkataKeerthy via llvm-commits
• [llvm] [llvm-ir2vec][Reland] Revert Fixup - Adding Inst Embeddings Map API to ir2vec python bindings (PR #184196)   S. VenkataKeerthy via llvm-commits
• [llvm] Reland "[llvm-ir2vec] Adding Inst Embeddings Map API to ir2vec python bindings (#180140)" (PR #184196)   S. VenkataKeerthy via llvm-commits
• [llvm] [llvm-ir2vec] Adding getFuncNames API to ir2vec python bindings (PR #180473)   S. VenkataKeerthy via llvm-commits
• [llvm] [llvm-ir2vec] Adding getFuncNames API to ir2vec python bindings (PR #180473)   S. VenkataKeerthy via llvm-commits
• [llvm] [llvm-ir2vec] Adding getFuncNames API to ir2vec python bindings (PR #180473)   S. VenkataKeerthy via llvm-commits
• [llvm] [llvm-ir2vec] Adding getFuncNames API to ir2vec python bindings (PR #180473)   S. VenkataKeerthy via llvm-commits
• [llvm] [llvm-ir2vec] Adding getFuncNames API to ir2vec python bindings (PR #180473)   S. VenkataKeerthy via llvm-commits
• [clang] [flang] [llvm] [flang] Add runtime trampoline pool for W^X compliance (PR #183108)   Sairudra More via llvm-commits
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• [compiler-rt] builtins: adjust FP80 source management (PR #183871)   Saleem Abdulrasool via llvm-commits
• [llvm] [WebAssembly][FastISel] Emit signed loads for sext of i8/i16/i32 (PR #182767)   Sam Clegg via llvm-commits
• [llvm] [WebAssembly] Define `__funcref_call_table` in generated asm and objects (PR #180900)   Sam Clegg via llvm-commits
• [lld] [lld][WebAssembly] Convert more tests to assembly. NFC (PR #184418)   Sam Clegg via llvm-commits
• [lld] [lld][WebAssembly] Convert more tests to assembly. NFC (PR #184418)   Sam Clegg via llvm-commits
• [lld] [lld][WebAssembly] Convert more tests to assembly. NFC (PR #184418)   Sam Clegg via llvm-commits
• [lld] [lld][WebAssembly] Convert weak-alias tests to assembly. NFC (PR #184667)   Sam Clegg via llvm-commits
• [llvm] [RISCV] Add scalar saturating add/sub operations for i32 for RV64P (PR #184062)   Sam Elliott via llvm-commits
• [llvm] [RISCV] Add scalar saturating add/sub operations for i32 for RV64P (PR #184062)   Sam Elliott via llvm-commits
• [llvm] [RISCV][NFC] Prepare for Short Forward Branch of branches with immediates (PR #182456)   Sam Elliott via llvm-commits
• [llvm] [RISCV][NFC] Prepare for Short Forward Branch of branches with immediates (PR #182456)   Sam Elliott via llvm-commits
• [llvm] [BOLT] Retain certain local symbols (PR #184074)   Sam Elliott via llvm-commits
• [llvm] [RISCV] Extends RISCVMoveMerger to merge GPRPairs independent of even/odd pair instruction order. (PR #183657)   Sam Elliott via llvm-commits
• [llvm] [RISCV] Extends RISCVMoveMerger to merge GPRPairs independent of even/odd pair instruction order. (PR #183657)   Sam Elliott via llvm-commits
• [llvm] [LegalizeTypes] Expand 128-bit UDIV/UREM by constant via Chunk Addition (PR #146238)   Sam Elliott via llvm-commits
• [llvm] [LegalizeTypes] Expand 128-bit UDIV/UREM by constant via Chunk Addition (PR #146238)   Sam Elliott via llvm-commits
• [llvm] [LegalizeTypes] Expand 128-bit UDIV/UREM by constant via Chunk Addition (PR #146238)   Sam Elliott via llvm-commits
• [llvm] [RISCV] Fix type inference ambiguity in SwapSysReg pattern (PR #184305)   Sam Elliott via llvm-commits
• [llvm] [RISCV] Remove OperandType OPERAND_SIMM10_UNSIGNED. Rename OPERAND_SIMM8_UNSIGNED->OPERAND_SIMM8 (PR #184540)   Sam Elliott via llvm-commits
• [llvm] [RISCV] Allow unsigned immediates for pli.h, pli.dh, pli.w (PR #184554)   Sam Elliott via llvm-commits
• [llvm] [RISCV] Implement `isLoadFromStackSlotPostFE` and ... (PR #184673)   Sam Elliott via llvm-commits
• [llvm] [RISCV] Add findCommutedOpIndices support for Zvabd (PR #184602)   Sam Elliott via llvm-commits
• [clang] [llvm] [RISCV] Support 'f' Inline Assembly Constraint for bfloat16 (PR #184566)   Sam Elliott via llvm-commits
• [llvm] [llvm][RISCV] Use zilsd for callee-saved register spill/restore on RV32 (PR #184794)   Sam Elliott via llvm-commits
• [llvm] [llvm][RISCV] Use zilsd for callee-saved register spill/restore on RV32 (PR #184794)   Sam Elliott via llvm-commits
• [llvm] [RISCV] Add RISCVISD opcodes for PSHL/PSRL/PSRA and lower to them. (PR #184836)   Sam Elliott via llvm-commits
• [llvm] [RISCV] Use SSLAI for XLen saturating shift left by immediate on RV32. (PR #184848)   Sam Elliott via llvm-commits
• [llvm] [RISCV] Use SSLAI for XLen saturating shift left by immediate on RV32. (PR #184848)   Sam Elliott via llvm-commits
• [clang] [llvm] [RISCV] Support 'f' Inline Assembly Constraint for bfloat16 (PR #184566)   Sam Elliott via llvm-commits
• [llvm] [RISCV][P-ext] Recognize vector shifts with splat build_vector shift amount. (PR #184909)   Sam Elliott via llvm-commits
• [llvm] [RISCV][P-ext] Recognize vector shifts with splat build_vector shift amount. (PR #184909)   Sam Elliott via llvm-commits
• [llvm] [RISCV][P-ext] Recognize vector shifts with splat build_vector shift amount. (PR #184909)   Sam Elliott via llvm-commits
• [clang] [llvm] [Driver][RISC-V] Support YAML multilib config with selectRISCVMultilib fallback (PR #184973)   Sam Elliott via llvm-commits
• [compiler-rt] [compiler-rt][RISCV] Initialize length only when __init_riscv_feature… (PR #115449)   Sam Elliott via llvm-commits
• [llvm] [IROutliner] Correctly Replace Outlined Constants with Arguments (PR #179885)   Sam Elliott via llvm-commits
• [clang] [llvm] [Driver][RISC-V] Support YAML multilib config with selectRISCVMultilib fallback (PR #184973)   Sam Elliott via llvm-commits
• [clang] [llvm] [Driver][RISC-V] Support YAML multilib config with selectRISCVMultilib fallback (PR #184973)   Sam Elliott via llvm-commits
• [clang] [llvm] [Driver][RISC-V] Support YAML multilib config with selectRISCVMultilib fallback (PR #184973)   Sam Elliott via llvm-commits
• [llvm] [NFC] Move fusion- to start of Fusion Feature Name (PR #185146)   Sam Elliott via llvm-commits
• [llvm] [NFC] Move fusion- to start of Fusion Feature Name (PR #185146)   Sam Elliott via llvm-commits
• [llvm] [WebAssembly] Fold extended vector shifts by constant to extmul (PR #184007)   Sam Parker via llvm-commits
• [llvm] [WebAssembly] Fold extended vector shifts by constant to extmul (PR #184007)   Sam Parker via llvm-commits
• [llvm] [WebAssembly] Fold extended vector shifts by constant to extmul (PR #184007)   Sam Parker via llvm-commits
• [llvm] [WebAssembly] Fold extended vector shifts by constant to extmul (PR #184007)   Sam Parker via llvm-commits
• [llvm] [WebAssembly] Fold extended vector shifts by constant to extmul (PR #184007)   Sam Parker via llvm-commits
• [llvm] [WebAssembly] Fold extended vector shifts by constant to extmul (PR #184007)   Sam Parker via llvm-commits
• [llvm] [WebAssembly] Fold extended vector shifts by constant to extmul (PR #184007)   Sam Parker via llvm-commits
• [llvm] [WebAssembly] Fold extended vector shifts by constant to extmul (PR #184007)   Sam Parker via llvm-commits
• [llvm] [WebAssembly] Fold extended vector shifts by constant to extmul (PR #184007)   Sam Parker via llvm-commits
• [llvm] [WebAssembly] Fold extended vector shifts by constant to extmul (PR #184007)   Sam Parker via llvm-commits
• [llvm] [WebAssembly] Fold extended vector shifts by constant to extmul (PR #184007)   Sam Parker via llvm-commits
• [llvm] [WebAssembly] Fold extended vector shifts by constant to extmul (PR #184007)   Sam Parker via llvm-commits
• [llvm] [WebAssembly] Fold extended vector shifts by constant to extmul (PR #184007)   Sam Parker via llvm-commits
• [llvm] [WebAssembly] Fold extended vector shifts by constant to extmul (PR #184007)   Sam Parker via llvm-commits
• [llvm] [AMDGPU] fix asyncmark soft waitcnt bug (PR #184851)   Sameer Sahasrabuddhe via llvm-commits
• [llvm] 76cfb0b - [NFC][AMDGPU] WaitEventSet should only print events that it contains   Sameer Sahasrabuddhe via llvm-commits
• [llvm] Support CSA for floating-point & pointer types (PR #184101)   Sander de Smalen via llvm-commits
• [llvm] Support CSA for floating-point & pointer types (PR #182313)   Sander de Smalen via llvm-commits
• [llvm] Support CSA for floating-point & pointer types (PR #182313)   Sander de Smalen via llvm-commits
• [llvm] [AArch64] Fix performZExtUZPCombine() DAG combine (PR #183765)   Sander de Smalen via llvm-commits
• [llvm] [LV] Support float and pointer conditional scalar assignments (PR #184101)   Sander de Smalen via llvm-commits
• [llvm] [LV] Support float and pointer conditional scalar assignments (PR #184101)   Sander de Smalen via llvm-commits
• [llvm] [LV] Support float and pointer conditional scalar assignments (PR #184101)   Sander de Smalen via llvm-commits
• [llvm] [LV] Support float and pointer conditional scalar assignments (PR #184101)   Sander de Smalen via llvm-commits
• [llvm] [LV] Support float and pointer conditional scalar assignments (PR #184101)   Sander de Smalen via llvm-commits
• [llvm] [LV] Support float and pointer conditional scalar assignments (PR #184101)   Sander de Smalen via llvm-commits
• [llvm] [AArch64] Add partial reduce patterns for new fdot instructions (PR #184659)   Sander de Smalen via llvm-commits
• [llvm] [AArch64] Add partial reduce patterns for new fdot instructions (PR #184659)   Sander de Smalen via llvm-commits
• [llvm] [AArch64] Fix sign-extend-inreg combine for i1 types (PR #177976)   Sander de Smalen via llvm-commits
• [llvm] [AArch64] Fix sign-extend-inreg combine for i1 types (PR #177976)   Sander de Smalen via llvm-commits
• [llvm] [amdgpu-cfi: 2/9]: [MC][Dwarf] Add custom CFI pseudo-ops for use in AMDGPU (PR #183151)   Scott Linder via llvm-commits
• [llvm] [amdgpu-cfi: 2/9]: [MC][Dwarf] Add custom CFI pseudo-ops for use in AMDGPU (PR #183151)   Scott Linder via llvm-commits
• [compiler-rt] [sanitizer_common] Implement address sanitizer on AIX: process memory mapping (PR #138537)   Sean Fertile via llvm-commits
• [compiler-rt] Disable leak sanitizer test on ppc. (PR #184414)   Sean Fertile via llvm-commits
• [clang] [llvm] Enable fexec-charset option (PR #138895)   Sean Perry via llvm-commits
• [lldb] [llvm] [mlir] [IR] Split Br into UncondBr and CondBr (PR #184027)   Sergei Barannikov via llvm-commits
• [clang] [llvm] Enable fexec-charset option (PR #138895)   Sergei Barannikov via llvm-commits
• [clang] [llvm] Enable fexec-charset option (PR #138895)   Sergei Barannikov via llvm-commits
• [clang] [llvm] Enable fexec-charset option (PR #138895)   Sergei Barannikov via llvm-commits
• [clang] [llvm] Enable fexec-charset option (PR #138895)   Sergei Barannikov via llvm-commits
• [clang] [llvm] Enable fexec-charset option (PR #138895)   Sergei Barannikov via llvm-commits
• [clang] [llvm] Enable fexec-charset option (PR #138895)   Sergei Barannikov via llvm-commits
• [clang] [llvm] Enable fexec-charset option (PR #138895)   Sergei Barannikov via llvm-commits
• [clang] [llvm] Enable fexec-charset option (PR #138895)   Sergei Barannikov via llvm-commits
• [clang] [llvm] Enable fexec-charset option (PR #138895)   Sergei Barannikov via llvm-commits
• [clang] [llvm] Enable fexec-charset option (PR #138895)   Sergei Barannikov via llvm-commits
• [clang] [llvm] Enable fexec-charset option (PR #138895)   Sergei Barannikov via llvm-commits
• [clang] [llvm] Enable fexec-charset option (PR #138895)   Sergei Barannikov via llvm-commits
• [clang] [llvm] Enable fexec-charset option (PR #138895)   Sergei Barannikov via llvm-commits
• [clang] [llvm] Enable fexec-charset option (PR #138895)   Sergei Barannikov via llvm-commits
• [llvm] [X86] TableGen-erate SDNode descriptions (PR #168421)   Sergei Barannikov via llvm-commits
• [llvm] [X86] Stop emitting CFI instructions on i386-windows (PR #135648)   Sergei Barannikov via llvm-commits
• [llvm] [X86] Stop emitting CFI instructions on i386-windows (PR #135648)   Sergei Barannikov via llvm-commits
• [clang] [llvm] Enable fexec-charset option (PR #138895)   Sergei Barannikov via llvm-commits
• [clang] [llvm] Enable fexec-charset option (PR #138895)   Sergei Barannikov via llvm-commits
• [clang] [llvm] Enable fexec-charset option (PR #138895)   Sergei Barannikov via llvm-commits
• [llvm] [X86] TableGen-erate SDNode descriptions (PR #168421)   Sergei Barannikov via llvm-commits
• [llvm] [X86] TableGen-erate SDNode descriptions (PR #168421)   Sergei Barannikov via llvm-commits
• [llvm] [X86] TableGen-erate SDNode descriptions (PR #168421)   Sergei Barannikov via llvm-commits
• [llvm] [X86] TableGen-erate SDNode descriptions (PR #168421)   Sergei Barannikov via llvm-commits
• [llvm] [X86] TableGen-erate SDNode descriptions (PR #168421)   Sergei Barannikov via llvm-commits
• [llvm] [mlir] [MLIR] [Bazel] Removed the stubgen plumbing added in #179211 (PR #185292)   Sergei Lebedev via llvm-commits
• [llvm] [mlir] [MLIR] [Bazel] Removed the stubgen plumbing added in #179211 (PR #185292)   Sergei Lebedev via llvm-commits
• [llvm] [mlir] [MLIR] [Bazel] Removed the stubgen plumbing added in #179211 (PR #185292)   Sergei Lebedev via llvm-commits
• [llvm] [libsycl] Add sycl::queue stub (PR #184110)   Sergey Semenov via llvm-commits
• [llvm] [libsycl] Add sycl::queue stub (PR #184110)   Sergey Semenov via llvm-commits
• [llvm] [libsycl] Add sycl::queue stub (PR #184110)   Sergey Semenov via llvm-commits
• [llvm] [libsycl] Add sycl::queue stub (PR #184110)   Sergey Semenov via llvm-commits
• [llvm] [libsycl] Add sycl::queue stub (PR #184110)   Sergey Semenov via llvm-commits
• [llvm] [libsycl] Add sycl::queue stub (PR #184110)   Sergey Semenov via llvm-commits
• [llvm] [libsycl] Add sycl::queue stub (PR #184110)   Sergey Semenov via llvm-commits
• [llvm] [libsycl] Add sycl::queue stub (PR #184110)   Sergey Semenov via llvm-commits
• [llvm] [libsycl] Add sycl::queue stub (PR #184110)   Sergey Semenov via llvm-commits
• [llvm] [libsycl] Add sycl::queue stub (PR #184110)   Sergey Semenov via llvm-commits
• [llvm] [libsycl] Add sycl::queue stub (PR #184110)   Sergey Semenov via llvm-commits
• [llvm] [libsycl] Add sycl::queue stub (PR #184110)   Sergey Semenov via llvm-commits
• [llvm] [libsycl] Add sycl::queue stub (PR #184110)   Sergey Semenov via llvm-commits
• [llvm] [libsycl] Add sycl::queue stub (PR #184110)   Sergey Semenov via llvm-commits
• [llvm] [libsycl] Add sycl::queue stub (PR #184110)   Sergey Semenov via llvm-commits
• [llvm] [libsycl] Add sycl::queue stub (PR #184110)   Sergey Semenov via llvm-commits
• [llvm] [libsycl] Add sycl::queue stub (PR #184110)   Sergey Semenov via llvm-commits
• [llvm] [libsycl] Add sycl::queue stub (PR #184110)   Sergey Semenov via llvm-commits
• [llvm] [libsycl] Add sycl::queue stub (PR #184110)   Sergey Semenov via llvm-commits
• [llvm] [libsycl] Add sycl::queue stub (PR #184110)   Sergey Semenov via llvm-commits
• [llvm] [libsycl] Add sycl::queue stub (PR #184110)   Sergey Semenov via llvm-commits
• [llvm] [libsycl] add USM alloc/free functions (PR #184111)   Sergey Semenov via llvm-commits
• [llvm] [libsycl] add USM alloc/free functions (PR #184111)   Sergey Semenov via llvm-commits
• [llvm] [libsycl] add USM alloc/free functions (PR #184111)   Sergey Semenov via llvm-commits
• [llvm] [libsycl] add USM alloc/free functions (PR #184111)   Sergey Semenov via llvm-commits
• [llvm] [libsycl] add USM alloc/free functions (PR #184111)   Sergey Semenov via llvm-commits
• [llvm] [libsycl] add USM alloc/free functions (PR #184111)   Sergey Semenov via llvm-commits
• [llvm] [libsycl] add USM alloc/free functions (PR #184111)   Sergey Semenov via llvm-commits
• [llvm] [libsycl] add USM alloc/free functions (PR #184111)   Sergey Semenov via llvm-commits
• [llvm] [libsycl] add USM alloc/free functions (PR #184111)   Sergey Semenov via llvm-commits
• [llvm] [libsycl] add USM alloc/free functions (PR #184111)   Sergey Semenov via llvm-commits
• [llvm] [libsycl] add USM alloc/free functions (PR #184111)   Sergey Semenov via llvm-commits
• [llvm] [libsycl] add USM alloc/free functions (PR #184111)   Sergey Semenov via llvm-commits
• [clang] [llvm] [AMDGPU][GFX12.5] Reimplement monitor load as an atomic operation (PR #177343)   Shafik Yaghmour via llvm-commits
• [llvm] [CMake] Add LLVM_DISABLE_WARNING_SUPPRESSIONS to remove MSVC warning suppressions (PR #183439)   Shaojie Zhu via llvm-commits
• [llvm] [CMake] Add LLVM_ENABLE_WARNING_SUPPRESSIONS to toggle warning suppressions (PR #183439)   Shaojie Zhu via llvm-commits
• [llvm] [CMake] Add LLVM_ENABLE_WARNING_SUPPRESSIONS to toggle warning suppressions (PR #183439)   Shaojie Zhu via llvm-commits
• [llvm] [CMake] Add LLVM_ENABLE_WARNING_SUPPRESSIONS to toggle warning suppressions (PR #183439)   Shaojie Zhu via llvm-commits
• [llvm] [CMake] Add LLVM_ENABLE_WARNING_SUPPRESSIONS to toggle warning suppressions (PR #183439)   Shaojie Zhu via llvm-commits
• [libcxxabi] [llvm] [ItaniumDemangle][NFC] Rename argument to not conflict with SS from ptrace_abi.h (PR #179079)   Sharjeel Khan via llvm-commits
• [llvm] [X86][APX] Add a few pseudo opcodes support EGPR (PR #184550)   Shengchen Kan via llvm-commits
• [llvm] [X86] Fix wrong RIP-relative relocations for AVX10.2 saturation conversions (PR #185254)   Shengchen Kan via llvm-commits
• [llvm] [X86] Fix wrong RIP-relative relocations for AVX10.2 saturation conversions (PR #185254)   Shengchen Kan via llvm-commits
• [llvm] [VPlan][NFC] Extract addCurrentIterationPhi from addExplicitVectorLength (PR #182650)   Shih-Po Hung via llvm-commits
• [llvm] AMDGPU: Stop copying triple into AMDGPUSubtarget (PR #184147)   Shilei Tian via llvm-commits
• [llvm] AMDGPU: Stop copying triple into AMDGPUSubtarget (PR #184147)   Shilei Tian via llvm-commits
• [llvm] [AMDGPU] Cgscc amdgpu attributor boilerplate NFC (PR #179719)   Shilei Tian via llvm-commits
• [llvm] [AMDGPU] Disable negative imm offset for async load/store instructions (PR #185078)   Shilei Tian via llvm-commits
• [llvm] [AMDGPU] Disable negative imm offset for async load/store instructions (PR #185078)   Shilei Tian via llvm-commits
• [llvm] [AMDGPU] Disable negative imm offset for async load/store instructions (PR #185078)   Shilei Tian via llvm-commits
• [llvm] [AMDGPU] Disable negative imm offset for async load/store instructions (PR #185078)   Shilei Tian via llvm-commits
• [llvm] [AMDGPU] Disable negative imm offset for async load/store instructions (PR #185078)   Shilei Tian via llvm-commits
• [llvm] [AMDGPU] Disable negative imm offset for async load/store instructions (PR #185078)   Shilei Tian via llvm-commits
• [llvm] [AMDGPU] Disable negative imm offset for async load/store instructions (PR #185078)   Shilei Tian via llvm-commits
• [llvm] [AMDGPU] Disable negative imm offset for async load/store instructions (PR #185078)   Shilei Tian via llvm-commits
• [llvm] [AMDGPU] Disable negative imm offset for async load/store instructions (PR #185078)   Shilei Tian via llvm-commits
• [llvm] [InferAS][NFC] Improve documentation for getAddrSpaceCastPreservedPtrMask (PR #185239)   Shilei Tian via llvm-commits
• [llvm] [NFC][AMDGPU] Add debug print to `AMDGPULowerVGPREncoding.cpp` (PR #185331)   Shilei Tian via llvm-commits
• [llvm] [NFC][AMDGPU] Add debug print to `AMDGPULowerVGPREncoding.cpp` (PR #185331)   Shilei Tian via llvm-commits
• [llvm] [LegalizeTypes] Expand 128-bit UDIV/UREM by constant via Chunk Addition (PR #146238)   Shivam Gupta via llvm-commits
• [llvm] [LegalizeTypes] Expand 128-bit UDIV/UREM by constant via Chunk Addition (PR #146238)   Shivam Gupta via llvm-commits
• [lld] [LLD][AArch64] Handle R_AARCH64_TLS_DTPREL64 in non-alloc sections (PR #183962)   Shivam Gupta via llvm-commits
• [lld] [LLD][AArch64] Handle R_AARCH64_TLS_DTPREL64 in non-alloc sections (PR #183962)   Shivam Gupta via llvm-commits
• [llvm] [LegalizeTypes] Expand 128-bit UDIV/UREM by constant via Chunk Addition (PR #146238)   Shivam Gupta via llvm-commits
• [lld] [lldb] [llvm] [AArch64] Support TLS variables in debug info (PR #146572)   Shivam Gupta via llvm-commits
• [llvm] [Hexagon][test] Fix more tests on linux-musl (PR #66785)   Shivam Gupta via llvm-commits
• [llvm] [Hexagon][test] Fix more tests on linux-musl (PR #66785)   Shivam Gupta via llvm-commits
• [llvm] [Hexagon][test] Fix more tests on linux-musl (PR #66785)   Shivam Gupta via llvm-commits
• [llvm] [Hexagon][test] Fix more tests on linux-musl (PR #66785)   Shivam Gupta via llvm-commits
• [llvm] [gn build] Guard the BLAKE3 assembly sources with platform (PR #70110)   Shivam Gupta via llvm-commits
• [llvm] [gn build] Guard the BLAKE3 assembly sources with platform (PR #70110)   Shivam Gupta via llvm-commits
• [llvm] [gn build] Guard the BLAKE3 assembly sources with platform (PR #70110)   Shivam Gupta via llvm-commits
• [llvm] [gn build] Guard the BLAKE3 assembly sources with platform (PR #70110)   Shivam Gupta via llvm-commits
• [llvm] Fix IfConversion UpdatePredRedefs method documentation (PR #69918)   Shivam Gupta via llvm-commits
• [llvm] Fix IfConversion UpdatePredRedefs method documentation (PR #69918)   Shivam Gupta via llvm-commits
• [llvm] [ConstantFolding] Consider `tanh*` to always be a noop (PR #70794)   Shivam Gupta via llvm-commits
• [llvm] [ConstantFolding] Consider `tanh*` to always be a noop (PR #70794)   Shivam Gupta via llvm-commits
• [llvm] Use LLVM_DEFAULT_TARGET_TRIPLE to find target libs (PR #72498)   Shivam Gupta via llvm-commits
• [llvm] Use LLVM_DEFAULT_TARGET_TRIPLE to find target libs (PR #72498)   Shivam Gupta via llvm-commits
• [lld] [LLD][AArch64] Handle R_AARCH64_TLS_DTPREL64 in non-alloc sections (PR #183962)   Shivam Gupta via llvm-commits
• [llvm] [llvm][WebAssembly] mark BR_TABLE as isIndirectBranch (PR #73391)   Shivam Gupta via llvm-commits
• [llvm] [ConstantFolding] Consider `tanh*` to always be a noop (PR #70794)   Shivam Gupta via llvm-commits
• [llvm] [OCaml] Adding back OCaml Kaleidoscope tutorial (PR #181394)   Shivam Gupta via llvm-commits
• [llvm] Git ignore install directory (PR #77181)   Shivam Gupta via llvm-commits
• [lld] [lldb] [llvm] [AArch64] Support TLS variables in debug info (PR #146572)   Shivam Gupta via llvm-commits
• [lld] [lldb] [llvm] [AArch64] Support TLS variables in debug info (PR #146572)   Shivam Gupta via llvm-commits
• [lld] [LLD][AArch64] Handle R_AARCH64_TLS_DTPREL64 in non-alloc sections (PR #183962)   Shivam Gupta via llvm-commits
• [lld] [LLD][AArch64] Handle R_AARCH64_TLS_DTPREL64 in non-alloc sections (PR #183962)   Shivam Gupta via llvm-commits
• [lld] [lldb] [llvm] [AArch64] Support TLS variables in debug info (PR #146572)   Shivam Gupta via llvm-commits
• [lld] [LLD][AArch64] Handle R_AARCH64_TLS_DTPREL64 in non-alloc sections (PR #183962)   Shivam Gupta via llvm-commits
• [clang] [llvm] [DebugInfo] Emit DW_AT_const_value for constexpr array static members (PR #182442)   Shivam Kunwar via llvm-commits
• [llvm] [DebugInfo] Fix segfault in constructSubprogramScopeDIE with null subprogram type (PR #184299)   Shivam Kunwar via llvm-commits
• [llvm] [DebugInfo] Fix segfault in constructSubprogramScopeDIE with null subprogram type (PR #184299)   Shivam Kunwar via llvm-commits
• [llvm] [DebugInfo] Fix segfault in constructSubprogramScopeDIE with null subprogram type (PR #184299)   Shivam Kunwar via llvm-commits
• [clang] [llvm] [DebugInfo] Emit DW_AT_const_value for constexpr array static members (PR #182442)   Shivam Kunwar via llvm-commits
• [clang] [llvm] [DebugInfo] Emit DW_AT_const_value for constexpr array static members (PR #182442)   Shivam Kunwar via llvm-commits
• [llvm] [DebugInfo] Fix segfault in constructSubprogramScopeDIE with null subprogram type (PR #184299)   Shivam Kunwar via llvm-commits
• [llvm] [DebugInfo] Fix segfault in constructSubprogramScopeDIE with null subprogram type (PR #184299)   Shivam Kunwar via llvm-commits
• [llvm] [DebugInfo] Fix segfault in constructSubprogramScopeDIE with null subprogram type (PR #184299)   Shivam Kunwar via llvm-commits
• [clang] [llvm] [DebugInfo] Emit DW_AT_const_value for constexpr array static members (PR #182442)   Shivam Kunwar via llvm-commits
• [clang] [llvm] [DebugInfo] Emit DW_AT_const_value for constexpr array static members (PR #182442)   Shivam Kunwar via llvm-commits
• [clang] [llvm] [DebugInfo] Emit DW_AT_const_value for constexpr array static members (PR #182442)   Shivam Kunwar via llvm-commits
• [clang] [llvm] [DebugInfo] Emit DW_AT_const_value for constexpr array static members (PR #182442)   Shivam Kunwar via llvm-commits
• [llvm] [Reassociate][DebugInfo] Salvage debug info before rewriting expression (PR #182730)   Shivam Kunwar via llvm-commits
• [llvm] [Reassociate][DebugInfo] Salvage debug info before rewriting expression (PR #182730)   Shivam Kunwar via llvm-commits
• [clang] [llvm] [DebugInfo] Fix endianness in DW_AT_const_value for constexpr arrays (PR #184804)   Shivam Kunwar via llvm-commits
• [clang] [llvm] [DebugInfo] Emit DW_AT_const_value for constexpr array static members (PR #182442)   Shivam Kunwar via llvm-commits
• [clang] [llvm] [DebugInfo] Fix endianness in DW_AT_const_value for constexpr arrays (PR #184804)   Shivam Kunwar via llvm-commits
• [clang] [llvm] [DebugInfo] Fix endianness in DW_AT_const_value for constexpr arrays (PR #184804)   Shivam Kunwar via llvm-commits
• [clang] [llvm] [DebugInfo] Fix endianness in DW_AT_const_value for constexpr arrays (PR #184804)   Shivam Kunwar via llvm-commits
• [clang] [llvm] [DebugInfo] Fix endianness in DW_AT_const_value for constexpr arrays (PR #184804)   Shivam Kunwar via llvm-commits
• [clang] [llvm] [DebugInfo] Fix endianness in DW_AT_const_value for constexpr arrays (PR #184804)   Shivam Kunwar via llvm-commits
• [clang] [llvm] [DebugInfo] Fix endianness in DW_AT_const_value for constexpr arrays (PR #184804)   Shivam Kunwar via llvm-commits
• [clang] [llvm] [DebugInfo] Fix endianness in DW_AT_const_value for constexpr arrays (PR #184804)   Shivam Kunwar via llvm-commits
• [clang] [llvm] [DebugInfo] Fix endianness in DW_AT_const_value for constexpr arrays (PR #184804)   Shivam Kunwar via llvm-commits
• [clang] [llvm] [DebugInfo] Fix endianness in DW_AT_const_value for constexpr arrays (PR #184804)   Shivam Kunwar via llvm-commits
• [clang] [llvm] [DebugInfo] Fix endianness in DW_AT_const_value for constexpr arrays (PR #184804)   Shivam Kunwar via llvm-commits
• [clang] [llvm] [DebugInfo] Fix endianness in DW_AT_const_value for constexpr arrays (PR #184804)   Shivam Kunwar via llvm-commits
• [clang] [llvm] [DebugInfo] Fix endianness in DW_AT_const_value for constexpr arrays (PR #184804)   Shivam Kunwar via llvm-commits
• [clang] [llvm] [DebugInfo] Fix endianness in DW_AT_const_value for constexpr arrays (PR #184804)   Shivam Kunwar via llvm-commits
• [clang] [llvm] [DebugInfo] Fix endianness in DW_AT_const_value for constexpr arrays (PR #184804)   Shivam Kunwar via llvm-commits
• [llvm] [DebugInfo][Reassociate] Use debug records instead of intrinsics in test (PR #185031)   Shivam Kunwar via llvm-commits
• [llvm] [Reassociate][DebugInfo] Salvage debug info before rewriting expression (PR #182730)   Shivam Kunwar via llvm-commits
• [clang] [llvm] [DebugInfo] Fix endianness in DW_AT_const_value for constexpr arrays (PR #184804)   Shivam Kunwar via llvm-commits
• [llvm] [DebugInfo][Reassociate] Use debug records instead of intrinsics in test (PR #185031)   Shivam Kunwar via llvm-commits
• [llvm] [DebugInfo] Add Verifier check for local enums in CU's enums field (PR #185228)   Shivam Kunwar via llvm-commits
• [llvm] [DebugInfo] Add Verifier check for local enums in CU's enums field (PR #185228)   Shivam Kunwar via llvm-commits
• [clang] [llvm] [HLSL][DXIL][SPIRV] Added WaveActiveBitOr HLSL intrinsic (PR #165156)   Sietze Riemersma via llvm-commits
• [clang] [llvm] [HLSL][DXIL][SPIRV] Added WaveActiveBitOr HLSL intrinsic (PR #165156)   Sietze Riemersma via llvm-commits
• [clang] [llvm] [HLSL][DXIL][SPIRV] Added WaveActiveBitOr HLSL intrinsic (PR #165156)   Sietze Riemersma via llvm-commits
• [clang] [llvm] [HLSL][DXIL][SPIRV] Added WaveActiveBitOr HLSL intrinsic (PR #165156)   Sietze Riemersma via llvm-commits
• [clang] [llvm] [HLSL][DXIL][SPIRV] Added WaveActiveBitOr HLSL intrinsic (PR #165156)   Sietze Riemersma via llvm-commits
• [clang] [llvm] [HLSL][DXIL][SPIRV] Added WaveActiveBitOr HLSL intrinsic (PR #165156)   Sietze Riemersma via llvm-commits
• [clang] [llvm] [HLSL][DXIL][SPRIV] Added WaveActiveProduct intrinsic (PR #184645)   Sietze Riemersma via llvm-commits
• [llvm] [DAG] isKnownNeverZero - add DemandedElts for ISD::SMIN/SMAX (PR #184054)   Simon Pilgrim via llvm-commits
• [clang] [llvm] [X86] support reserve r8~r15 on X86_64 (PR #180242)   Simon Pilgrim via llvm-commits
• [llvm] [DAG] Fold SETCC against isKnownNeverZero (PR #184010)   Simon Pilgrim via llvm-commits
• [llvm] [DAG] Fold SETCC against isKnownNeverZero (PR #184010)   Simon Pilgrim via llvm-commits
• [llvm] [DAG] Fold SETCC against isKnownNeverZero (PR #184010)   Simon Pilgrim via llvm-commits
• [llvm] [DAG] Fold SETCC against isKnownNeverZero (PR #184010)   Simon Pilgrim via llvm-commits
• [llvm] [DAG] isKnownNeverZero - add DemandedElts for ISD::SMIN/SMAX (PR #184054)   Simon Pilgrim via llvm-commits
• [llvm] [DAG] isKnownNeverZero - add DemandedElts for ISD::SMIN/SMAX (PR #184054)   Simon Pilgrim via llvm-commits
• [llvm] [DAG] isKnownNeverZero - add DemandedElts for ISD::SMIN/SMAX (PR #184054)   Simon Pilgrim via llvm-commits
• [llvm] [DAG] Improved handling of ISD::ROTL and ISD::ROTR in isKnownToBeAPowerOfTwo (PR #182744)   Simon Pilgrim via llvm-commits
• [llvm] [DAG] isKnownNeverZero - add ISD::SRA/SRL DemandedElts handling and tests (PR #183577)   Simon Pilgrim via llvm-commits
• [llvm] [DAG] isKnownNeverZero - add ISD::SRA/SRL DemandedElts handling and tests (PR #183577)   Simon Pilgrim via llvm-commits
• [llvm] [DAG] isKnownNeverZero - add ISD::SRA/SRL DemandedElts handling and tests (PR #183577)   Simon Pilgrim via llvm-commits
• [llvm] [DAG] isKnownNeverZero - add ISD::SRA/SRL DemandedElts handling and tests (PR #183577)   Simon Pilgrim via llvm-commits
• [llvm] [VectorCombine] Optimize vector combine in fold binop of reduction (PR #179416)   Simon Pilgrim via llvm-commits
• [llvm] [DAG] visitCLMUL - fold (clmul x, c_pow2) -> (shl x, log2(c_pow2)) (PR #184049)   Simon Pilgrim via llvm-commits
• [llvm] [DAG] visitCLMUL - fold (clmul x, c_pow2) -> (shl x, log2(c_pow2)) (PR #184049)   Simon Pilgrim via llvm-commits
• [llvm] [DAG] visitCLMUL - fold (clmul x, c_pow2) -> (shl x, log2(c_pow2)) (PR #184049)   Simon Pilgrim via llvm-commits
• [llvm] [DAG] visitCLMUL - fold (clmul x, c_pow2) -> (shl x, log2(c_pow2)) (PR #184049)   Simon Pilgrim via llvm-commits
• [llvm] [DAG] isKnownNeverZero - add DemandedElts for ISD::SMIN/SMAX (PR #184054)   Simon Pilgrim via llvm-commits
• [llvm] [DAG] visitCLMUL - fold (clmul x, c_pow2) -> (shl x, log2(c_pow2)) (PR #184049)   Simon Pilgrim via llvm-commits
• [llvm] [DAG] Improved handling of ISD::ROTL and ISD::ROTR in isKnownToBeAPowerOfTwo (PR #182744)   Simon Pilgrim via llvm-commits
• [llvm] [DAG] Improved handling of ISD::ROTL and ISD::ROTR in isKnownToBeAPowerOfTwo (PR #182744)   Simon Pilgrim via llvm-commits
• [llvm] [DAG] Improved handling of ISD::ROTL and ISD::ROTR in isKnownToBeAPowerOfTwo (PR #182744)   Simon Pilgrim via llvm-commits
• [llvm] [DAG] Improved handling of ISD::ROTL and ISD::ROTR in isKnownToBeAPowerOfTwo (PR #182744)   Simon Pilgrim via llvm-commits
• [llvm] [DAG] Improved handling of ISD::ROTL and ISD::ROTR in isKnownToBeAPowerOfTwo (PR #182744)   Simon Pilgrim via llvm-commits
• [llvm] [DAG] Improved handling of ISD::ROTL and ISD::ROTR in isKnownToBeAPowerOfTwo (PR #182744)   Simon Pilgrim via llvm-commits
• [llvm] [DAG] isKnownToBeAPowerOfTwo - Power of 2 value is known to be power of 2 after BSWAP/BITREVERSE (PR #182207)   Simon Pilgrim via llvm-commits
• [llvm] [DAG] isKnownToBeAPowerOfTwo - Power of 2 value is known to be power of 2 after BSWAP/BITREVERSE (PR #182207)   Simon Pilgrim via llvm-commits
• [llvm] [DAG] isKnownToBeAPowerOfTwo - Power of 2 value is known to be power of 2 after BSWAP/BITREVERSE (PR #182207)   Simon Pilgrim via llvm-commits
• [llvm] [DAG] isKnownToBeAPowerOfTwo - Power of 2 value is known to be power of 2 after BSWAP/BITREVERSE (PR #182207)   Simon Pilgrim via llvm-commits
• [llvm] [DAG] isKnownToBeAPowerOfTwo - Power of 2 value is known to be power of 2 after BSWAP/BITREVERSE (PR #182207)   Simon Pilgrim via llvm-commits
• [llvm] [DAG] isKnownNeverZero: Add DemandedElts handling for ROTL/ROTR/BITREVERSE/BSWAP/CTPOP/ABS (PR #184033)   Simon Pilgrim via llvm-commits
• [llvm] [LegalizeTypes] Expand 128-bit UDIV/UREM by constant via Chunk Addition (PR #146238)   Simon Pilgrim via llvm-commits
• [llvm] [LegalizeTypes] Expand 128-bit UDIV/UREM by constant via Chunk Addition (PR #146238)   Simon Pilgrim via llvm-commits
• [llvm] [LegalizeTypes] Expand 128-bit UDIV/UREM by constant via Chunk Addition (PR #146238)   Simon Pilgrim via llvm-commits
• [llvm] [DAG] Fold SETCC against isKnownNeverZero (PR #184010)   Simon Pilgrim via llvm-commits
• [llvm] [X86] known-never-zero.ll - add shift right vector test coverage for #183577 (PR #184140)   Simon Pilgrim via llvm-commits
• [llvm] [X86] known-never-zero.ll - add shift right vector test coverage for #183577 (PR #184140)   Simon Pilgrim via llvm-commits
• [llvm] [X86] known-never-zero.ll - remove unnecessary declarations (PR #184142)   Simon Pilgrim via llvm-commits
• [llvm] [X86] known-never-zero.ll - remove unnecessary declarations (PR #184142)   Simon Pilgrim via llvm-commits
• [llvm] [DAG] isKnownNeverZero - add ISD::SRA/SRL DemandedElts handling and tests (PR #183577)   Simon Pilgrim via llvm-commits
• [llvm] [DAG] ISD::matchUnaryPredicate / matchUnaryFpPredicate / matchBinaryPredicate - add DemandedElts variant (PR #183013)   Simon Pilgrim via llvm-commits
• [llvm] [DAG] ISD::matchUnaryPredicate / matchUnaryFpPredicate / matchBinaryPredicate - add DemandedElts variant (PR #183013)   Simon Pilgrim via llvm-commits
• [llvm] [X86] known-never-zero.ll - add shift right vector test coverage for #183577 (PR #184140)   Simon Pilgrim via llvm-commits
• [llvm] [DAG] visitCLMUL - fold (clmul x, c_pow2) -> (shl x, log2(c_pow2)) (PR #184049)   Simon Pilgrim via llvm-commits
• [llvm] [X86] known-never-zero.ll - remove unnecessary declarations (PR #184142)   Simon Pilgrim via llvm-commits
• [llvm] [X86] known-never-zero.ll - add additional demanded elts vector test coverage (PR #184159)   Simon Pilgrim via llvm-commits
• [llvm] [X86] known-never-zero.ll - add additional demanded elts vector test coverage (PR #184159)   Simon Pilgrim via llvm-commits
• [llvm] [ValueTracking] Int vector reductions propagate noundef (PR #184173)   Simon Pilgrim via llvm-commits
• [llvm] [DAG] isKnownNeverZero - add ISD::UADDSAT/UMAX/UMIN DemandedElts handling and tests (PR #183992)   Simon Pilgrim via llvm-commits
• [llvm] [X86] Support X86ISD::VBROADCAST for v4X32/v2X64 types on AVX1 (PR #184188)   Simon Pilgrim via llvm-commits
• [llvm] [WIP][X86] Support X86ISD::VBROADCAST for v4X32/v2X64 types on AVX1 (PR #184188)   Simon Pilgrim via llvm-commits
• [llvm] [DAG] isKnownNeverZero - add ISD::SRA/SRL DemandedElts handling and tests (PR #183577)   Simon Pilgrim via llvm-commits
• [llvm] [TargetLowering][PowerPC] Don't unroll vector CLMUL when MUL is not supported. (PR #184238)   Simon Pilgrim via llvm-commits
• [llvm] [DAG] isKnownNeverZero - add ISD::OR DemandedElts handling (PR #183228)   Simon Pilgrim via llvm-commits
• [llvm] [DAG] isKnownNeverZero - add ISD::UADDSAT/UMAX/UMIN DemandedElts handling and tests (PR #183992)   Simon Pilgrim via llvm-commits
• [llvm] [DAG] isKnownNeverZero - add ISD::UADDSAT/UMAX/UMIN DemandedElts handling and tests (PR #183992)   Simon Pilgrim via llvm-commits
• [llvm] [DAG] isKnownNeverZero - add ISD::UADDSAT/UMAX/UMIN DemandedElts handling and tests (PR #183992)   Simon Pilgrim via llvm-commits
• [llvm] [X86] Added sincos vector lib codegen test coverage (PR #183702)   Simon Pilgrim via llvm-commits
• [llvm] [X86] Added sincos vector lib codegen test coverage (PR #183702)   Simon Pilgrim via llvm-commits
• [llvm] [X86] Added sincos vector lib codegen test coverage (PR #183702)   Simon Pilgrim via llvm-commits
• [llvm] [DAG] isKnownNeverZero - add ISD::UDIV/SDIV DemandedElts handling and tests (PR #183227)   Simon Pilgrim via llvm-commits
• [llvm] [DAG] Improved handling of ISD::ROTL and ISD::ROTR in isKnownToBeAPowerOfTwo (PR #182744)   Simon Pilgrim via llvm-commits
• [llvm] [DAG] Improved handling of ISD::ROTL and ISD::ROTR in isKnownToBeAPowerOfTwo (PR #182744)   Simon Pilgrim via llvm-commits
• [llvm] [DAG] Improved handling of ISD::ROTL and ISD::ROTR in isKnownToBeAPowerOfTwo (PR #182744)   Simon Pilgrim via llvm-commits
• [llvm] [DAG] Improved handling of ISD::ROTL and ISD::ROTR in isKnownToBeAPowerOfTwo (PR #182744)   Simon Pilgrim via llvm-commits
• [llvm] [DAG] isKnownNeverZero - add ISD::UADDSAT/UMAX/UMIN DemandedElts handling and tests (PR #183992)   Simon Pilgrim via llvm-commits
• [llvm] [X86] Added sincos vector lib codegen test coverage (PR #183702)   Simon Pilgrim via llvm-commits
• [llvm] [X86] Added sincos vector lib codegen test coverage (PR #183702)   Simon Pilgrim via llvm-commits
• [llvm] [DAG] isKnownNeverZero - add ISD::OR DemandedElts handling (PR #183228)   Simon Pilgrim via llvm-commits
• [llvm] [DAG] isKnownNeverZero - add ISD::OR DemandedElts handling (PR #183228)   Simon Pilgrim via llvm-commits
• [llvm] [DAG] isKnownNeverZero - add ISD::OR DemandedElts handling (PR #183228)   Simon Pilgrim via llvm-commits
• [llvm] [RISCV] Promote i8/i16/i32 scalable vector CLMUL to i64 CLMUL with Zvbc. (PR #184265)   Simon Pilgrim via llvm-commits
• [llvm] [DAG] isKnownToBeAPowerOfTwo - Power of 2 value is known to be power of 2 after BSWAP/BITREVERSE (PR #182207)   Simon Pilgrim via llvm-commits
• [llvm] [DAG] isKnownToBeAPowerOfTwo - Power of 2 value is known to be power of 2 after BSWAP/BITREVERSE (PR #182207)   Simon Pilgrim via llvm-commits
• [llvm] [DAG] isKnownToBeAPowerOfTwo - Power of 2 value is known to be power of 2 after BSWAP/BITREVERSE (PR #182207)   Simon Pilgrim via llvm-commits
• [llvm] [DAG] isKnownToBeAPowerOfTwo - Power of 2 value is known to be power of 2 after BSWAP/BITREVERSE (PR #182207)   Simon Pilgrim via llvm-commits
• [llvm] [X86] Added sincos vector lib codegen test coverage (PR #183702)   Simon Pilgrim via llvm-commits
• [llvm] [DAG] isKnownNeverZero - add ISD::OR DemandedElts handling (PR #183228)   Simon Pilgrim via llvm-commits
• [llvm] Fold patterns which uses v4i32 type for equality comparison on v2i64 type (PR #184328)   Simon Pilgrim via llvm-commits
• [llvm] [X86] Add i256 shift / funnel shift coverage to match i512 tests (PR #184346)   Simon Pilgrim via llvm-commits
• [llvm] [X86] Add i256 shift / funnel shift coverage to match i512 tests (PR #184346)   Simon Pilgrim via llvm-commits
• [llvm] [X86] known-never-zero.ll - add sdiv/udiv vector test coverage for #183047 (PR #184350)   Simon Pilgrim via llvm-commits
• [llvm] [X86] known-never-zero.ll - add sdiv/udiv vector test coverage for #183047 (PR #184350)   Simon Pilgrim via llvm-commits
• [llvm] [X86] Add i256 shift / funnel shift coverage to match i512 tests (PR #184346)   Simon Pilgrim via llvm-commits
• [llvm] [X86] Fix definition of VCVTNE2PS2BF16, make it SchedWriteCvtPS2BF (PR #177792)   Simon Pilgrim via llvm-commits
• [llvm] [X86] Fix definition of VCVTNE2PS2BF16, make it SchedWriteCvtPS2BF (PR #177792)   Simon Pilgrim via llvm-commits
• [llvm] [X86] known-never-zero.ll - add sdiv/udiv vector test coverage for #183047 (PR #184350)   Simon Pilgrim via llvm-commits
• [llvm] [X86] Expand i512 shifts on AVX512 targets (PR #183198)   Simon Pilgrim via llvm-commits
• [llvm] [DAG] isKnownNeverZero - add ISD::UDIV/SDIV DemandedElts handling and tests (PR #183227)   Simon Pilgrim via llvm-commits
• [llvm] [X86] vector-shuffle-combining-xop.ll - tests showing failure to combine shuffles with non-uniform rotates (PR #184397)   Simon Pilgrim via llvm-commits
• [llvm] [X86] vector-shuffle-combining-xop.ll - tests showing failure to combine shuffles with non-uniform rotates (PR #184397)   Simon Pilgrim via llvm-commits
• [llvm] Fold patterns which uses v4i32 type for equality comparison on v2i64 type (PR #184328)   Simon Pilgrim via llvm-commits
• [llvm] [DAG] SelectionDAG::isKnownToBeAPowerOfTwo - add ISD::TRUNCATE handling and tests (PR #184365)   Simon Pilgrim via llvm-commits
• [llvm] [X86] getFauxShuffleMask - add ISD::ROTL/ROTR handling (PR #184417)   Simon Pilgrim via llvm-commits
• [llvm] [X86] getFauxShuffleMask - add ISD::ROTL/ROTR handling (PR #184417)   Simon Pilgrim via llvm-commits
• [llvm] [X86] getFauxShuffleMask - add ISD::ROTL/ROTR handling (PR #184417)   Simon Pilgrim via llvm-commits
• [llvm] [X86] getFauxShuffleMask - add ISD::ROTL/ROTR handling (PR #184417)   Simon Pilgrim via llvm-commits
• [clang] [llvm] [X86] support reserve r8~r15 on X86_64 (PR #180242)   Simon Pilgrim via llvm-commits
• [clang] [llvm] [X86] support reserve r8~r15 on X86_64 (PR #180242)   Simon Pilgrim via llvm-commits
• [llvm] [X86][test] Add i256 codegen baseline tests (PR #183586)   Simon Pilgrim via llvm-commits
• [llvm] [X86][test] Add i256 codegen baseline tests (PR #183586)   Simon Pilgrim via llvm-commits
• [llvm] [X86] combine-fcopysign.ll - extend test coverage to all x86-64/x86-64-v2/x86-64-v3/x86-64-v4 levels (PR #184579)   Simon Pilgrim via llvm-commits
• [llvm] [X86] combine-fcopysign.ll - extend test coverage to all x86-64/x86-64-v2/x86-64-v3/x86-64-v4 levels (PR #184579)   Simon Pilgrim via llvm-commits
• [llvm] [X86] combine-fcopysign.ll - extend test coverage to all x86-64/x86-64-v2/x86-64-v3/x86-64-v4 levels (PR #184579)   Simon Pilgrim via llvm-commits
• [llvm] [X86] Make ISD::ROTL/ROTR vector rotates legal on XOP+AVX512 targets (PR #184587)   Simon Pilgrim via llvm-commits
• [llvm] [SelectionDAG] Use Karatsuba decomposition to expand vector CLMUL via narrower legal types (PR #184468)   Simon Pilgrim via llvm-commits
• [llvm] [SelectionDAG] Use Karatsuba decomposition to expand vector CLMUL via narrower legal types (PR #184468)   Simon Pilgrim via llvm-commits
• [llvm] [SelectionDAG] Use Karatsuba decomposition to expand vector CLMUL via narrower legal types (PR #184468)   Simon Pilgrim via llvm-commits
• [llvm] [SelectionDAG] Use Karatsuba decomposition to expand vector CLMUL via narrower legal types (PR #184468)   Simon Pilgrim via llvm-commits
• [llvm] [SDAGBuilder] Fix incorrect fcmp+select to minnum/maxnum transform (PR #184590)   Simon Pilgrim via llvm-commits
• [llvm] [X86] Make ISD::ROTL/ROTR vector rotates legal on XOP+AVX512 targets (PR #184587)   Simon Pilgrim via llvm-commits
• [llvm] [X86] Declare 128/256-bit funnel shifts legal on VBMI2 + NOVLX targets (PR #184634)   Simon Pilgrim via llvm-commits
• [llvm] [DAG] Improved handling of ISD::ROTL and ISD::ROTR in isKnownToBeAPowerOfTwo (PR #182744)   Simon Pilgrim via llvm-commits
• [llvm] [DAG] Improved handling of ISD::ROTL and ISD::ROTR in isKnownToBeAPowerOfTwo (PR #182744)   Simon Pilgrim via llvm-commits
• [llvm] [DAG] Improved handling of ISD::ROTL and ISD::ROTR in isKnownToBeAPowerOfTwo (PR #182744)   Simon Pilgrim via llvm-commits
• [llvm] [X86] Make ISD::ROTL/ROTR vector rotates legal on XOP+AVX512 targets (PR #184587)   Simon Pilgrim via llvm-commits
• [llvm] [DAG] Improved handling of ISD::ROTL and ISD::ROTR in isKnownToBeAPowerOfTwo (PR #182744)   Simon Pilgrim via llvm-commits
• [llvm] [SelectionDAG] Use ExpandIntRes_CLMUL to expand vector CLMUL via narrower legal types (PR #184468)   Simon Pilgrim via llvm-commits
• [llvm] [DAG] isKnownNeverZero - add ISD::ADD/SUB DemandedElts handling and tests (PR #183958)   Simon Pilgrim via llvm-commits
• [llvm] [DAG] isKnownNeverZero - add ISD::ADD/SUB DemandedElts handling and tests (PR #183958)   Simon Pilgrim via llvm-commits
• [llvm] [DAG] isKnownToBeAPowerOfTwo - Power of 2 value is known to be power of 2 after BSWAP/BITREVERSE (PR #182207)   Simon Pilgrim via llvm-commits
• [llvm] [DAG] isKnownToBeAPowerOfTwo - Power of 2 value is known to be power of 2 after BSWAP/BITREVERSE (PR #182207)   Simon Pilgrim via llvm-commits
• [llvm] Add EVT::changeVectorElementCount and MVT:changeVectorElementCount (PR #182266)   Simon Pilgrim via llvm-commits
• [llvm] [DAG] isKnownToBeAPowerOfTwo - Power of 2 value is known to be power of 2 after BSWAP/BITREVERSE (PR #182207)   Simon Pilgrim via llvm-commits
• [llvm] [DAG] isKnownToBeAPowerOfTwo - Power of 2 value is known to be power of 2 after BSWAP/BITREVERSE (PR #182207)   Simon Pilgrim via llvm-commits
• [llvm] [DAG] isKnownToBeAPowerOfTwo - Power of 2 value is known to be power of 2 after BSWAP/BITREVERSE (PR #182207)   Simon Pilgrim via llvm-commits
• [llvm] [DAG] SelectionDAG::isKnownToBeAPowerOfTwo - add ISD::TRUNCATE handling and tests (PR #184365)   Simon Pilgrim via llvm-commits
• [llvm] [DAG] isKnownNeverZero - add ISD::ADD/SUB DemandedElts handling and tests (PR #183958)   Simon Pilgrim via llvm-commits
• [llvm] [X86] Make ISD::ROTL/ROTR vector rotates legal on XOP+AVX512 targets (PR #184587)   Simon Pilgrim via llvm-commits
• [llvm] [X86] Make ISD::ROTL/ROTR vector rotates legal on XOP+AVX512 targets (PR #184587)   Simon Pilgrim via llvm-commits
• [llvm] [X86] Make ISD::ROTL/ROTR vector rotates legal on XOP+AVX512 targets (PR #184587)   Simon Pilgrim via llvm-commits
• [llvm] [X86] Declare 128/256-bit funnel shifts legal on VBMI2 + NOVLX targets (PR #184634)   Simon Pilgrim via llvm-commits
• [llvm] [X86] Declare 128/256-bit funnel shifts legal on VBMI2 + NOVLX targets (PR #184634)   Simon Pilgrim via llvm-commits
• [llvm] [X86] Declare 128/256-bit funnel shifts legal on VBMI2 + NOVLX targets (PR #184634)   Simon Pilgrim via llvm-commits
• [llvm] DAG: Replace legal type check in EmitCopyFromReg (PR #177788)   Simon Pilgrim via llvm-commits
• [llvm] [X86] Make ISD::ROTL/ROTR vXi16 vector rotates legal on VBMI2 targets (PR #184768)   Simon Pilgrim via llvm-commits
• [llvm] [X86] Expand i512 shifts on AVX512 targets (PR #183198)   Simon Pilgrim via llvm-commits
• [llvm] [X86] known-pow2.ll - add zext vector test for #182226 (PR #184772)   Simon Pilgrim via llvm-commits
• [llvm] [X86] known-pow2.ll - add zext vector test for #182226 (PR #184772)   Simon Pilgrim via llvm-commits
• [llvm] [DAG] Simplify isKnownToBeAPowerOfTwo for ZERO_EXTEND (PR #182226)   Simon Pilgrim via llvm-commits
• [llvm] [DAG] isKnownNeverZero - add ISD::SHL DemandedElts handling and tests (PR #183772)   Simon Pilgrim via llvm-commits
• [llvm] [DAGCombiner] Combine (fshl A, B, S) | (fshr C, D, BW-S) --> (fshl (A|C), (B|D), S) (PR #180889)   Simon Pilgrim via llvm-commits
• [llvm] [DAGCombiner] Combine (fshl A, B, S) | (fshr C, D, BW-S) --> (fshl (A|C), (B|D), S) (PR #180889)   Simon Pilgrim via llvm-commits
• [llvm] [DAGCombiner] Combine (fshl A, B, S) | (fshr C, D, BW-S) --> (fshl (A|C), (B|D), S) (PR #180889)   Simon Pilgrim via llvm-commits
• [llvm] DAG: Replace legal type check in EmitCopyFromReg (PR #177788)   Simon Pilgrim via llvm-commits
• [llvm] [X86] known-pow2.ll - add zext vector test for #182226 (PR #184772)   Simon Pilgrim via llvm-commits
• [llvm] [X86] Expand i512 shifts on AVX512 targets (PR #183198)   Simon Pilgrim via llvm-commits
• [llvm] Add EVT::changeVectorElementCount and MVT:changeVectorElementCount (PR #182266)   Simon Pilgrim via llvm-commits
• [llvm] [CodeGen] Simplify EVT::operator!=. NFCI. (PR #184792)   Simon Pilgrim via llvm-commits
• [llvm] [X86] add i256/i512 bit manipulation tests suggested by #132601 (PR #184813)   Simon Pilgrim via llvm-commits
• [llvm] [X86] add i256/i512 bit manipulation tests suggested by #132601 (PR #184813)   Simon Pilgrim via llvm-commits
• [llvm] [X86] add i256/i512 bit manipulation tests suggested by #132601 (PR #184813)   Simon Pilgrim via llvm-commits
• [llvm] [X86] Expand i512 shifts on AVX512 targets (PR #183198)   Simon Pilgrim via llvm-commits
• [llvm] [DAG] isKnownNeverZero - add ISD::SHL DemandedElts handling and tests (PR #183772)   Simon Pilgrim via llvm-commits
• [llvm] [X86] Make ISD::ROTL/ROTR vXi16 vector rotates legal on VBMI2 targets (PR #184768)   Simon Pilgrim via llvm-commits
• [llvm] [X86] Make ISD::ROTL/ROTR vXi16 vector rotates legal on VBMI2 targets (PR #184768)   Simon Pilgrim via llvm-commits
• [llvm] [X86] Make ISD::ROTL/ROTR vXi16 vector rotates legal on VBMI2 targets (PR #184768)   Simon Pilgrim via llvm-commits
• [llvm] [X86] Expand i512 shifts on AVX512 targets (PR #183198)   Simon Pilgrim via llvm-commits
• [llvm] [CodeGen][TTI] Reduce funnel shift cost for constant shift amounts (PR #184942)   Simon Pilgrim via llvm-commits
• [llvm] [DAG] isKnownNeverZero - add ISD::SHL DemandedElts handling and tests (PR #183772)   Simon Pilgrim via llvm-commits
• [llvm] [X86] Expand i512 shifts on AVX512 targets (PR #183198)   Simon Pilgrim via llvm-commits
• [llvm] [X86] Expand i512 shifts on AVX512 targets (PR #183198)   Simon Pilgrim via llvm-commits
• [llvm] [X86] [AArch64] fuse constant addition after sbb (PR #184541)   Simon Pilgrim via llvm-commits
• [llvm] [X86] Expand i512 shifts on AVX512 targets (PR #183198)   Simon Pilgrim via llvm-commits
• [llvm] [DAG] isKnownNeverZero - add ISD::SHL DemandedElts handling and tests (PR #183772)   Simon Pilgrim via llvm-commits
• [llvm] [DAG] isKnownNeverZero - add ISD::SHL DemandedElts handling and tests (PR #183772)   Simon Pilgrim via llvm-commits
• [llvm] [DAG] isKnownNeverZero - add ISD::SHL DemandedElts handling and tests (PR #183772)   Simon Pilgrim via llvm-commits
• [llvm] [DAG] isKnownNeverZero - add ISD::SHL DemandedElts handling and tests (PR #183772)   Simon Pilgrim via llvm-commits
• [llvm] [X86] Add baseline andnot tests for #172329 (PR #184991)   Simon Pilgrim via llvm-commits
• [llvm] [X86] Add baseline andnot tests for #172329 (PR #184991)   Simon Pilgrim via llvm-commits
• [llvm] [X86] Sink NOT to be fold into ANDN (PR #172329)   Simon Pilgrim via llvm-commits
• [llvm] [X86] Expand i512 shifts on AVX512 targets (PR #183198)   Simon Pilgrim via llvm-commits
• [llvm] [X86] Add baseline andnot tests for #172329 (PR #184991)   Simon Pilgrim via llvm-commits
• [llvm] [X86] Sink NOT to be fold into ANDN (PR #172329)   Simon Pilgrim via llvm-commits
• [llvm] [DAG] isKnownNeverZero - add ISD::SHL DemandedElts handling and tests (PR #183772)   Simon Pilgrim via llvm-commits
• [llvm] [DAG] isKnownNeverZero - add ISD::SHL DemandedElts handling and tests (PR #183772)   Simon Pilgrim via llvm-commits
• [llvm] [DAG] isKnownNeverZero - add ISD::SHL DemandedElts handling and tests (PR #183772)   Simon Pilgrim via llvm-commits
• [llvm] [DAG] isKnownNeverZero - add ISD::UDIV/SDIV DemandedElts handling and tests (PR #183227)   Simon Pilgrim via llvm-commits
• [llvm] [DAG] isKnownNeverZero - add ISD::UDIV/SDIV DemandedElts handling and tests (PR #183227)   Simon Pilgrim via llvm-commits
• [llvm] [X86] Sink NOT to be fold into ANDN (PR #172329)   Simon Pilgrim via llvm-commits
• [llvm] [X86] Sink NOT to be fold into ANDN (PR #172329)   Simon Pilgrim via llvm-commits
• [llvm] [X86] Sink NOT to be fold into ANDN (PR #172329)   Simon Pilgrim via llvm-commits
• [llvm] [X86] Sink NOT to be fold into ANDN (PR #172329)   Simon Pilgrim via llvm-commits
• [llvm] [DAG] isKnownNeverZero - add ISD::SHL DemandedElts handling and tests (PR #183772)   Simon Pilgrim via llvm-commits
• [llvm] [DAG] isKnownNeverZero - add ISD::SHL DemandedElts handling and tests (PR #183772)   Simon Pilgrim via llvm-commits
• [llvm] [DAG] isKnownNeverZero - add ISD::SHL DemandedElts handling and tests (PR #183772)   Simon Pilgrim via llvm-commits
• [llvm] [DAG] isKnownNeverZero - add ISD::SHL DemandedElts handling and tests (PR #183772)   Simon Pilgrim via llvm-commits
• [llvm] [DAG] isKnownNeverZero - add ISD::SHL DemandedElts handling and tests (PR #183772)   Simon Pilgrim via llvm-commits
• [llvm] [Analysis] isTriviallyVectorizable - add Intrinsic::clmul along with vectorisation tests (PR #180014)   Simon Pilgrim via llvm-commits
• [llvm] [X86] known-never-zero.ll - add ROTL/ROTR/BITREVERSE/BSWAP/CTPOP/ABS test coverage for #184033 (PR #185128)   Simon Pilgrim via llvm-commits
• [llvm] [X86] known-never-zero.ll - add ROTL/ROTR/BITREVERSE/BSWAP/CTPOP/ABS test coverage for #184033 (PR #185128)   Simon Pilgrim via llvm-commits
• [llvm] [DAG] isKnownNeverZero: Add DemandedElts handling for ROTL/ROTR/BITREVERSE/BSWAP/CTPOP/ABS (PR #184033)   Simon Pilgrim via llvm-commits
• [llvm] [Analysis] isTriviallyVectorizable - add Intrinsic::clmul along with vectorisation tests (PR #180014)   Simon Pilgrim via llvm-commits
• [llvm] [X86] fuse constant addition after sbb (PR #184541)   Simon Pilgrim via llvm-commits
• [llvm] [X86] known-never-zero.ll - add ROTL/ROTR/BITREVERSE/BSWAP/CTPOP/ABS test coverage for #184033 (PR #185128)   Simon Pilgrim via llvm-commits
• [llvm] [Analysis] isTriviallyVectorizable - add Intrinsic::clmul along with vectorisation tests (PR #180014)   Simon Pilgrim via llvm-commits
• [llvm] [Analysis] isTriviallyVectorizable - add Intrinsic::clmul along with vectorisation tests (PR #180014)   Simon Pilgrim via llvm-commits
• [llvm] [Analysis] isTriviallyVectorizable - add Intrinsic::clmul along with vectorisation tests (PR #180014)   Simon Pilgrim via llvm-commits
• [llvm] [Analysis] isTriviallyVectorizable - add Intrinsic::clmul along with vectorisation tests (PR #180014)   Simon Pilgrim via llvm-commits
• [llvm] [LoongArch] Fold conditional branches with constant conditions (PR #185161)   Simon Pilgrim via llvm-commits
• [llvm] [DAG] isKnownNeverZero: Add DemandedElts handling for ROTL/ROTR/BITREVERSE/BSWAP/CTPOP/ABS (PR #184033)   Simon Pilgrim via llvm-commits
• [llvm] [DAG] isKnownNeverZero: Add DemandedElts handling for ROTL/ROTR/BITREVERSE/BSWAP/CTPOP/ABS (PR #184033)   Simon Pilgrim via llvm-commits
• [llvm] [DAG] isKnownNeverZero: Add DemandedElts handling for ROTL/ROTR/BITREVERSE/BSWAP/CTPOP/ABS (PR #184033)   Simon Pilgrim via llvm-commits
• [llvm] [X86] combineVTRUNCSAT - attempt to recognise VTRUNCS/US(CONCAT(X,Y)) -> PACKSS/US(X,Y) folds. (PR #178707)   Simon Pilgrim via llvm-commits
• [llvm] [DAG] isKnownNeverZero: Add DemandedElts handling for ROTL/ROTR/BITREVERSE/BSWAP/CTPOP/ABS (PR #184033)   Simon Pilgrim via llvm-commits
• [clang] [compiler-rt] [llvm] [X86] Add AVX512BMM support for AMD Zen 6 (znver6) (PR #182556)   Simon Pilgrim via llvm-commits
• [clang] [compiler-rt] [llvm] [X86] Add AVX512BMM support for AMD Zen 6 (znver6) (PR #182556)   Simon Pilgrim via llvm-commits
• [llvm] [X86] TableGen-erate SDNode descriptions (PR #168421)   Simon Pilgrim via llvm-commits
• [llvm] [WIP][X86] Add addlike PatFrags for AVX-512 disjoint OR folding (PR #166015)   Simon Pilgrim via llvm-commits
• [llvm] [X86] combineVTRUNCSAT - attempt to recognise VTRUNCS/US(CONCAT(X,Y)) -> PACKSS/US(X,Y) folds. (PR #178707)   Simon Pilgrim via llvm-commits
• [llvm] [LoongArch] Fold conditional branches with constant conditions (PR #185161)   Simon Pilgrim via llvm-commits
• [llvm] [DAG] Fold build_vector(build_pair()) patterns. (PR #88261)   Simon Pilgrim via llvm-commits
• [llvm] [X86] narrow-shl-load.ll - regenerate test checks (PR #185211)   Simon Pilgrim via llvm-commits
• [llvm] [X86] narrow-shl-load.ll - regenerate test checks (PR #185211)   Simon Pilgrim via llvm-commits
• [llvm] [X86] narrow-shl-load.ll - regenerate test checks (PR #185211)   Simon Pilgrim via llvm-commits
• [clang] [llvm] [X86] Reduce -ffixed-r compile-time overhead (PR #184606)   Simon Pilgrim via llvm-commits
• [llvm] [LoongArch] Fold conditional branches with constant conditions (PR #185161)   Simon Pilgrim via llvm-commits
• [llvm] Fold patterns which uses v4i32 type for comparisons on v2i64 type (PR #184328)   Simon Pilgrim via llvm-commits
• [llvm] [DAG] isKnownToBeAPowerOfTwo - add ISD::VECTOR_SHUFFLE handling (PR #185203)   Simon Pilgrim via llvm-commits
• [llvm] [DAG] isKnownToBeAPowerOfTwo - add ISD::VECTOR_SHUFFLE handling (PR #185203)   Simon Pilgrim via llvm-commits
• [llvm] [SLP]Initial compatibility support for shl v, 1 and add v, v (PR #181168)   Simon Pilgrim via llvm-commits
• [llvm] [SLP]Initial compatibility support for shl v, 1 and add v, v (PR #181168)   Simon Pilgrim via llvm-commits
• [llvm] [SLP]Initial compatibility support for shl v, 1 and add v, v (PR #181168)   Simon Pilgrim via llvm-commits
• [llvm] [SLP]Initial compatibility support for shl v, 1 and add v, v (PR #181168)   Simon Pilgrim via llvm-commits
• [llvm] [SLP]Initial compatibility support for shl v, 1 and add v, v (PR #181168)   Simon Pilgrim via llvm-commits
• [llvm] [SLP]Initial compatibility support for shl v, 1 and add v, v (PR #181168)   Simon Pilgrim via llvm-commits
• [llvm] [X86] TableGen-erate SDNode descriptions (PR #168421)   Simon Pilgrim via llvm-commits
• [llvm] fold mov dec/inc to lea +- 1 (PR #185194)   Simon Pilgrim via llvm-commits
• [llvm] fold mov dec/inc to lea +- 1 (PR #185194)   Simon Pilgrim via llvm-commits
• [llvm] [X86] Remove redundant and-not pattern code in X86 (PR #157687)   Simon Pilgrim via llvm-commits
• [llvm] apply mulx optimization for two-wide mul instruction (mull, mulq) (PR #185127)   Simon Pilgrim via llvm-commits
• [llvm] [DAG] isKnownToBeAPowerOfTwo - add ISD::VECTOR_SHUFFLE handling (PR #185203)   Simon Pilgrim via llvm-commits
• [llvm] [DAG] isKnownToBeAPowerOfTwo - add ISD::VECTOR_SHUFFLE handling (PR #185203)   Simon Pilgrim via llvm-commits
• [llvm] [DAG] isKnownToBeAPowerOfTwo - add ISD::VECTOR_SHUFFLE handling (PR #185203)   Simon Pilgrim via llvm-commits
• [llvm] [DAG] ISD::matchUnaryPredicate / matchUnaryFpPredicate / matchBinaryPredicate - add DemandedElts variant (PR #183013)   Simon Pilgrim via llvm-commits
• [llvm] [DAG] ISD::matchUnaryPredicate / matchUnaryFpPredicate / matchBinaryPredicate - add DemandedElts variant (PR #183013)   Simon Pilgrim via llvm-commits
• [llvm] [DAG] ISD::matchUnaryPredicate / matchUnaryFpPredicate / matchBinaryPredicate - add DemandedElts variant (PR #183013)   Simon Pilgrim via llvm-commits
• [llvm] [DAG] ISD::matchUnaryPredicate / matchUnaryFpPredicate / matchBinaryPredicate - add DemandedElts variant (PR #183013)   Simon Pilgrim via llvm-commits
• [llvm] [SelectionDAG] Preserver poison for abs INT_MIN lowering (PR #183851)   Simon Pilgrim via llvm-commits
• [llvm] [SLP]Remove Alternate early profitability checks in favor of throttling (PR #182760)   Simon Pilgrim via llvm-commits
• [llvm] [X86] Stop emitting CFI instructions on i386-windows (PR #135648)   Simon Pilgrim via llvm-commits
• [llvm] [X86] fuse constant addition after sbb (PR #184541)   Simon Pilgrim via llvm-commits
• [llvm] [DAG] isKnownToBeAPowerOfTwo - add ISD::VECTOR_SHUFFLE handling (PR #185203)   Simon Pilgrim via llvm-commits
• [llvm] [DAG] isKnownToBeAPowerOfTwo - add ISD::VECTOR_SHUFFLE handling (PR #185203)   Simon Pilgrim via llvm-commits
• [llvm] [DAG] isKnownToBeAPowerOfTwo - add ISD::VECTOR_SHUFFLE handling (PR #185203)   Simon Pilgrim via llvm-commits
• [llvm] [CodeGenPrepare] Failure to hoist bitcast to legal type causes register splitting (PR #183067)   Simon Pilgrim via llvm-commits
• [llvm] [SLP]Allow bitcast/bswap based reductions for types, larger than the total strided size (PR #184018)   Simon Pilgrim via llvm-commits
• [clang] [llvm] Implement `preserve_none` for 32-bit x86 (PR #150106)   Simon Pilgrim via llvm-commits
• [llvm] [X86] combineVTRUNCSAT - attempt to recognise VTRUNCS/US(CONCAT(X,Y)) -> PACKSS/US(X,Y) folds. (PR #178707)   Simon Pilgrim via llvm-commits
• [llvm] [X86] combineVTRUNCSAT - attempt to recognise VTRUNCS/US(CONCAT(X,Y)) -> PACKSS/US(X,Y) folds. (PR #178707)   Simon Pilgrim via llvm-commits
• [llvm] [DAG] isKnownToBeAPowerOfTwo - add ISD::VECTOR_SHUFFLE handling (PR #185203)   Simon Pilgrim via llvm-commits
• [llvm] [X86][GlobalISel] Added support for FNEG (PR #167919)   Simon Pilgrim via llvm-commits
• [llvm] [LIBM][AMDLIBM] - Add new vector call support for fveclib=AMDLIBM (PR #180896)   Simon Pilgrim via llvm-commits
• [llvm] [SLP] Check the Operands of Copyable elements as well in getBestOperand() (PR #182443)   Simon Pilgrim via llvm-commits
• [llvm] [SLP] Check the Operands of Copyable elements as well in getBestOperand() (PR #182443)   Simon Pilgrim via llvm-commits
• [llvm] [VectorCombine] Compact shuffle operands by eliminating unused elements (PR #176074)   Simon Pilgrim via llvm-commits
• [llvm] [X86] Honor rewrite semantics of `contract` in X86ISel combines (PR #174440)   Simon Pilgrim via llvm-commits
• [llvm] [X86] Honor rewrite semantics of `contract` in X86ISel combines (PR #174440)   Simon Pilgrim via llvm-commits
• [llvm] [X86] Honor rewrite semantics of `contract` in X86ISel combines (PR #174440)   Simon Pilgrim via llvm-commits
• [llvm] [X86] Honor rewrite semantics of `contract` in X86ISel combines (PR #174440)   Simon Pilgrim via llvm-commits
• [llvm] [X86] Honor rewrite semantics of `contract` in X86ISel combines (PR #174440)   Simon Pilgrim via llvm-commits
• [llvm] [X86] combineVTRUNCSAT - attempt to recognise VTRUNCS/US(CONCAT(X,Y)) -> PACKSS/US(X,Y) folds. (PR #178707)   Simon Pilgrim via llvm-commits
• [llvm] fold mov dec/inc to lea +- 1 (PR #185194)   Simon Pilgrim via llvm-commits
• [llvm] fold mov dec/inc to lea +- 1 (PR #185194)   Simon Pilgrim via llvm-commits
• [llvm] [X86] setcc-logic.ll - add i128 cmpeq(or(X,Y),X) --> cmpeq(and(~X,Y),0) test (PR #185289)   Simon Pilgrim via llvm-commits
• [llvm] [X86] setcc-logic.ll - add i128 cmpeq(or(X,Y),X) --> cmpeq(and(~X,Y),0) test (PR #185289)   Simon Pilgrim via llvm-commits
• [llvm] [X86] Remove redundant and-not pattern code in X86 (PR #157687)   Simon Pilgrim via llvm-commits
• [llvm] [X86] Remove redundant and-not pattern code in X86 (PR #157687)   Simon Pilgrim via llvm-commits
• [llvm] [X86] Remove redundant and-not pattern code in X86 (PR #157687)   Simon Pilgrim via llvm-commits
• [llvm] [X86] setcc-logic.ll - add i128 cmpeq(or(X,Y),X) --> cmpeq(and(~X,Y),0) test (PR #185289)   Simon Pilgrim via llvm-commits
• [llvm] [InstCombine] Simplify zext(sub(0, trunc(x))) -> and(sub(0, x), mask) (PR #167101)   Simon Pilgrim via llvm-commits
• [llvm] [X86] Remove redundant and-not pattern code in X86 (PR #157687)   Simon Pilgrim via llvm-commits
• [llvm] [X86] Remove redundant and-not pattern code in X86 (PR #157687)   Simon Pilgrim via llvm-commits
• [llvm] [X86] Remove redundant and-not pattern code in X86 (PR #157687)   Simon Pilgrim via llvm-commits
• [llvm] [X86] Remove redundant and-not pattern code in X86 (PR #157687)   Simon Pilgrim via llvm-commits
• [compiler-rt] [compiler-rt][ARM] Fix conditions for strict-mode FP testing (PR #183507)   Simon Tatham via llvm-commits
• [compiler-rt] [compiler-rt][ARM] Fix conditions for strict-mode FP testing (PR #183507)   Simon Tatham via llvm-commits
• [compiler-rt] [compiler-rt][ARM] Fix conditions for strict-mode FP testing (PR #183507)   Simon Tatham via llvm-commits
• [llvm] [ARM] Use FPRegs for fastcc calling convention detection. (PR #184593)   Simon Tatham via llvm-commits
• [llvm] [ARM] Use FPRegs for fastcc calling convention detection. (PR #184593)   Simon Tatham via llvm-commits
• [llvm] [DA] Fix the Weak Zero SIV tests when the coeff may be zero (PR #183736)   Sjoerd Meijer via llvm-commits
• [llvm] [flang-rt] Fix NVPTX builds erroneously using backtrace support (PR #184415)   Slava Zakharin via llvm-commits
• [clang] [flang] [llvm] [flang] Add runtime trampoline pool for W^X compliance (PR #183108)   Slava Zakharin via llvm-commits
• [llvm] [MemProf] Add stack IDs to MemProfUse optimization remarks (PR #184670)   Snehasish Kumar via llvm-commits
• [llvm] [MemProf] Enhance thin link optimization remarks (PR #184829)   Snehasish Kumar via llvm-commits
• [llvm] Fix profile metadata propagation in InstCombine select folding (PR #179743)   Snehasish Kumar via llvm-commits
• [llvm] Fix profile metadata propagation in InstCombine select folding (PR #179743)   Snehasish Kumar via llvm-commits
• [llvm] Fix profile metadata propagation in InstCombine select folding (PR #179743)   Snehasish Kumar via llvm-commits
• [llvm] Fix profile metadata propagation in InstCombine select folding (PR #179743)   Snehasish Kumar via llvm-commits
• [llvm] Add a flag to disable salvage-unused-profile for large modules. (PR #185354)   Snehasish Kumar via llvm-commits
• [llvm] Add a flag to disable salvage-unused-profile for large modules. (PR #185354)   Snehasish Kumar via llvm-commits
• [llvm] Add a flag to disable salvage-unused-profile for large modules. (PR #185354)   Snehasish Kumar via llvm-commits
• [llvm] Add a flag to disable salvage-unused-profile for large modules. (PR #185354)   Snehasish Kumar via llvm-commits
• [llvm] Add a flag to disable salvage-unused-profile for large modules. (PR #185354)   Snehasish Kumar via llvm-commits
• [llvm] Add a flag to disable salvage-unused-profile for large modules. (PR #185354)   Snehasish Kumar via llvm-commits
• [llvm] Add a flag to disable salvage-unused-profile for large modules. (PR #185354)   Snehasish Kumar via llvm-commits
• [llvm] [SamplePGO] Add a flag to disable salvage-unused-profile for large modules. (PR #185354)   Snehasish Kumar via llvm-commits
• [llvm] [NFC][Docs] Add documentation for NVPTX conversion intrinsics (PR #175536)   Srinivasa Ravi via llvm-commits
• [llvm] [NFC][Docs] Add documentation for NVPTX conversion intrinsics (PR #175536)   Srinivasa Ravi via llvm-commits
• [llvm] [AMDGPU] Fix GFX1250 hazard: S_SET_VGPR_MSB dropped (PR #184904)   Stanislav Mekhanoshin via llvm-commits
• [llvm] [AMDGPU] Fix GFX1250 hazard: S_SET_VGPR_MSB dropped (PR #184904)   Stanislav Mekhanoshin via llvm-commits
• [llvm] [AMDGPU] Fix GFX1250 hazard: S_SET_VGPR_MSB dropped (PR #184904)   Stanislav Mekhanoshin via llvm-commits
• [llvm] [AMDGPU] Fix GFX1250 hazard: S_SET_VGPR_MSB dropped (PR #184904)   Stanislav Mekhanoshin via llvm-commits
• [llvm] [AMDGPU] Fix GFX1250 hazard: S_SET_VGPR_MSB dropped (PR #184904)   Stanislav Mekhanoshin via llvm-commits
• [llvm] [AMDGPU] Disable negative imm offset for async load/store instructions (PR #185078)   Stanislav Mekhanoshin via llvm-commits
• [llvm] [AMDGPU] Disable negative imm offset for async load/store instructions (PR #185078)   Stanislav Mekhanoshin via llvm-commits
• [llvm] [AMDGPU] Disable negative imm offset for async load/store instructions (PR #185078)   Stanislav Mekhanoshin via llvm-commits
• [llvm] [AMDGPU] Disable negative imm offset for async load/store instructions (PR #185078)   Stanislav Mekhanoshin via llvm-commits
• [llvm] [AMDGPU] Disable negative imm offset for async load/store instructions (PR #185078)   Stanislav Mekhanoshin via llvm-commits
• [llvm] [Support] Move HTTP client/server to new LLVMSupportHTTP lib (NFC) (PR #184572)   Stefan Gränitz via llvm-commits
• [llvm] [Support] Move HTTP client/server to new LLVMSupportHTTP lib (NFC) (PR #184572)   Stefan Gränitz via llvm-commits
• [llvm] [Support] Move HTTP client/server to new LLVMSupportHTTP lib (NFC) (PR #184572)   Stefan Gränitz via llvm-commits
• [lldb] [llvm] [Support] Move HTTP client/server to new LLVMSupportHTTP lib (NFC) (PR #184572)   Stefan Gränitz via llvm-commits
• [lldb] [llvm] [Support] Move HTTP client/server to new LLVMSupportHTTP lib (NFC) (PR #184572)   Stefan Gränitz via llvm-commits
• [lldb] [llvm] [Support] Move HTTP client/server to new LLVMSupportHTTP lib (NFC) (PR #184572)   Stefan Gränitz via llvm-commits
• [lldb] [llvm] [Support] Move HTTP client/server to new LLVMSupportHTTP lib (NFC) (PR #184572)   Stefan Gränitz via llvm-commits
• [lldb] [llvm] [Support] Move HTTP client/server to new LLVMSupportHTTP lib (NFC) (PR #184572)   Stefan Gränitz via llvm-commits
• [clang] [llvm] [LLVM][Support][NFCI] Register OptionCategory as const (PR #184352)   Steffen Larsen via llvm-commits
• [clang] [llvm] [LLVM][Support][NFCI] Register OptionCategory as const (PR #184352)   Steffen Larsen via llvm-commits
• [llvm] [LLVM][Support][NFCI] Move default values out of the storage (PR #184581)   Steffen Larsen via llvm-commits
• [llvm] [LLVM][Support] Move default values out of the storage (PR #184581)   Steffen Larsen via llvm-commits
• [llvm] [LLVM][Support] Move default values out of the storage (PR #184581)   Steffen Larsen via llvm-commits
• [clang-tools-extra] [llvm] [LLVM][Support] Move default values out of the storage (PR #184581)   Steffen Larsen via llvm-commits
• [clang-tools-extra] [llvm] [LLVM][Support] Move default values out of the storage (PR #184581)   Steffen Larsen via llvm-commits
• [clang-tools-extra] [llvm] [LLVM][Support] Move default values out of the storage (PR #184581)   Steffen Larsen via llvm-commits
• [clang-tools-extra] [llvm] [LLVM][Support] Move default values out of the storage (PR #184581)   Steffen Larsen via llvm-commits
• [clang-tools-extra] [llvm] [LLVM][Support] Move default values out of the storage (PR #184581)   Steffen Larsen via llvm-commits
• [clang-tools-extra] [llvm] [LLVM][Support] Move default values out of the storage (PR #184581)   Steffen Larsen via llvm-commits
• [llvm] [llvm-dwarfdump][LineCov 2/3] Add coverage baseline comparison and line table coverage in isolation (PR #183790)   Stephen Tozer via llvm-commits
• [llvm] [llvm-dwarfdump][LineCov 2/3] Add coverage baseline comparison and line table coverage in isolation (PR #183790)   Stephen Tozer via llvm-commits
• [llvm] [llvm-dwarfdump][LineCov 2/3] Add coverage baseline comparison and line table coverage in isolation (PR #183790)   Stephen Tozer via llvm-commits
• [llvm] [llvm-dwarfdump][LineCov 2/3] Add coverage baseline comparison and line table coverage in isolation (PR #183790)   Stephen Tozer via llvm-commits
• [llvm] [llvm-dwarfdump][LineCov 2/3] Add coverage baseline comparison and line table coverage in isolation (PR #183790)   Stephen Tozer via llvm-commits
• [llvm] [SPIRV] Update the global registry when expanding function pointer (PR #183873)   Steven Perron via llvm-commits
• [llvm] [SPIRV] Update the global registry when expanding function pointer (PR #183873)   Steven Perron via llvm-commits
• [llvm] [SPIRV] Update the global registry when expanding function pointer (PR #183873)   Steven Perron via llvm-commits
• [clang] [llvm] [HLSL] Implement Texture2D default template (PR #184207)   Steven Perron via llvm-commits
• [llvm] [SPIRV] Update the global registry when expanding function pointer (PR #183873)   Steven Perron via llvm-commits
• [llvm] [SPIRV] Update the global registry when expanding function pointer (PR #183873)   Steven Perron via llvm-commits
• [llvm] [SPIRV] Update the global registry when expanding function pointer (PR #183873)   Steven Perron via llvm-commits
• [clang] [llvm] [HLSL] Implement Texture2D default template (PR #184207)   Steven Perron via llvm-commits
• [llvm] [SPIRV] Update the global registry when expanding function pointer (PR #183873)   Steven Perron via llvm-commits
• [llvm] [SPIRV] Update the global registry when expanding function pointer (PR #183873)   Steven Perron via llvm-commits
• [llvm] [SPIRV] Update the global registry when expanding function pointer (PR #183873)   Steven Perron via llvm-commits
• [llvm] [SPIR-V] Add lowering of ptrtoaddr (PR #184577)   Steven Perron via llvm-commits
• [llvm] [SPIRV] Update the global registry when expanding function pointer (PR #183873)   Steven Perron via llvm-commits
• [llvm] [SPIRV] Update the global registry when expanding function pointer (PR #183873)   Steven Perron via llvm-commits
• [clang] [llvm] [HLSL] Implement Texture2D::Gather and Texture2D::GatherCmp (PR #183323)   Steven Perron via llvm-commits
• [clang] [llvm] [HLSL] Implement Texture2D::Gather and Texture2D::GatherCmp (PR #183323)   Steven Perron via llvm-commits
• [clang] [llvm] [HLSL][DirectX] Implement HLSL `mul` function and DXIL lowering of `llvm.matrix.multiply` (PR #184882)   Steven Perron via llvm-commits
• [clang] [llvm] [HLSL][DirectX] Implement HLSL `mul` function and DXIL lowering of `llvm.matrix.multiply` (PR #184882)   Steven Perron via llvm-commits
• [clang] [llvm] [HLSL][DirectX] Implement HLSL `mul` function and DXIL lowering of `llvm.matrix.multiply` (PR #184882)   Steven Perron via llvm-commits
• [clang] [llvm] [HLSL][DirectX] Implement HLSL `mul` function and DXIL lowering of `llvm.matrix.multiply` (PR #184882)   Steven Perron via llvm-commits
• [clang] [llvm] [HLSL][DirectX] Implement HLSL `mul` function and DXIL lowering of `llvm.matrix.multiply` (PR #184882)   Steven Perron via llvm-commits
• [clang] [llvm] [HLSL][DirectX] Implement HLSL `mul` function and DXIL lowering of `llvm.matrix.multiply` (PR #184882)   Steven Perron via llvm-commits
• [llvm] [llvm][support] Refactor symlink handling and add readlink (PR #184256)   Steven Wu via llvm-commits
• [llvm] [llvm][support] Refactor symlink handling and add readlink (PR #184256)   Steven Wu via llvm-commits
• [llvm] [llvm][support] Refactor symlink handling and add readlink (PR #184256)   Steven Wu via llvm-commits
• [lld] [llvm] [MC][WebAssembly] Allow strings for import modules and names in asm (PR #182896)   Sy Brand via llvm-commits
• [clang] [lld] [llvm] [WebAssembly] WASIP3 and component model threading support (PR #175800)   Sy Brand via llvm-commits
• [clang] [lld] [llvm] [WebAssembly] WASIP3 and component model threading support (PR #175800)   Sy Brand via llvm-commits
• [llvm] [AMDGPU][GlobalIsel] Add register bank legalization rules for amdgcn atomic fminmax num (PR #184564)   Syadus Sefat via llvm-commits
• [llvm] [AMDGPU][GlobalIsel] Add register bank legalization rules for amdgcn atomic fminmax num (PR #184564)   Syadus Sefat via llvm-commits
• [llvm] [AMDGPU][GlobalIsel] Add register bank legalization rules for amdgcn atomic fminmax num (PR #184564)   Syadus Sefat via llvm-commits
• [llvm] [X86] remove unnecessary movs when %rdx is an input to mulx (PR #184462)   Takashi Idobe via llvm-commits
• [llvm] [Instcombine] Write Instcombine pass to strength reduce lock xadd to lock sub (PR #184715)   Takashi Idobe via llvm-commits
• [llvm] [X86] [AArch64] fuse constant addition after sbb (PR #184541)   Takashi Idobe via llvm-commits
• [llvm] [X86] [AArch64] fuse constant addition after sbb (PR #184541)   Takashi Idobe via llvm-commits
• [llvm] [X86] [AArch64] fuse constant addition after sbb (PR #184541)   Takashi Idobe via llvm-commits
• [llvm] [X86] [AArch64] fuse constant addition after sbb (PR #184541)   Takashi Idobe via llvm-commits
• [llvm] [X86] [AArch64] fuse constant addition after sbb (PR #184541)   Takashi Idobe via llvm-commits
• [llvm] [X86] [AArch64] fuse constant addition after sbb (PR #184541)   Takashi Idobe via llvm-commits
• [llvm] [X86] [AArch64] fuse constant addition after sbb (PR #184541)   Takashi Idobe via llvm-commits
• [llvm] [X86] [AArch64] fuse constant addition after sbb (PR #184541)   Takashi Idobe via llvm-commits
• [llvm] [X86] [AArch64] fuse constant addition after sbb (PR #184541)   Takashi Idobe via llvm-commits
• [llvm] [Instcombine] Write Instcombine pass to strength reduce lock xadd to lock sub (PR #184715)   Takashi Idobe via llvm-commits
• [llvm] [Instcombine] Write Instcombine pass to strength reduce lock xadd to lock sub (PR #184715)   Takashi Idobe via llvm-commits
• [llvm] [AArch64] fuse constant addition after sbb (PR #185117)   Takashi Idobe via llvm-commits
• [llvm] [X86] [AArch64] fuse constant addition after sbb (PR #184541)   Takashi Idobe via llvm-commits
• [llvm] [X86] [AArch64] fuse constant addition after sbb (PR #184541)   Takashi Idobe via llvm-commits
• [llvm] [AArch64] fuse constant addition after sbb (PR #185117)   Takashi Idobe via llvm-commits
• [llvm] [X86] [AArch64] fuse constant addition after sbb (PR #184541)   Takashi Idobe via llvm-commits
• [llvm] [X86] fuse constant addition after sbb (PR #184541)   Takashi Idobe via llvm-commits
• [llvm] apply mulx optimization for two-wide mul instruction (mull, mulq) (PR #185127)   Takashi Idobe via llvm-commits
• [llvm] apply mulx optimization for two-wide mul instruction (mull, mulq) (PR #185127)   Takashi Idobe via llvm-commits
• [llvm] [AArch64] fuse constant addition after sbb (PR #185117)   Takashi Idobe via llvm-commits
• [llvm] fold mov dec/inc to lea +- 1 (PR #185194)   Takashi Idobe via llvm-commits
• [llvm] lock opt ptr const inconsistencies x86 only (PR #185195)   Takashi Idobe via llvm-commits
• [llvm] [X86] fuse constant addition after sbb (PR #184541)   Takashi Idobe via llvm-commits
• [llvm] fold mov dec/inc to lea +- 1 (PR #185194)   Takashi Idobe via llvm-commits
• [llvm] [AArch64] fuse constant addition after sbb (PR #185117)   Takashi Idobe via llvm-commits
• [llvm] [AArch64] fuse constant addition after sbb (PR #185117)   Takashi Idobe via llvm-commits
• [llvm] fold mov dec/inc to lea +- 1 (PR #185194)   Takashi Idobe via llvm-commits
• [llvm] fold mov dec/inc to lea +- 1 (PR #185194)   Takashi Idobe via llvm-commits
• [llvm] fold mov dec/inc to lea +- 1 (PR #185194)   Takashi Idobe via llvm-commits
• [llvm] fold mov dec/inc to lea +- 1 (PR #185194)   Takashi Idobe via llvm-commits
• [llvm] [X86] fuse constant addition after sbb (PR #184541)   Takashi Idobe via llvm-commits
• [llvm] fold mov dec/inc to lea +- 1 (PR #185194)   Takashi Idobe via llvm-commits
• [llvm] fold mov dec/inc to lea +- 1 (PR #185194)   Takashi Idobe via llvm-commits
• [llvm] fold mov dec/inc to lea +- 1 (PR #185194)   Takashi Idobe via llvm-commits
• [llvm] fold mov dec/inc to lea +- 1 (PR #185194)   Takashi Idobe via llvm-commits
• [llvm] fold mov dec/inc to lea +- 1 (PR #185194)   Takashi Idobe via llvm-commits
• [llvm] fold mov dec/inc to lea +- 1 (PR #185194)   Takashi Idobe via llvm-commits
• [llvm] [X86] apply mulx optimization for two-wide mul instruction (mull, mulq) (PR #185127)   Takashi Idobe via llvm-commits
• [llvm] [X86] fold mov dec/inc to lea +- 1 (PR #185194)   Takashi Idobe via llvm-commits
• [llvm] [X86] lock opt ptr const inconsistencies (PR #185195)   Takashi Idobe via llvm-commits
• [clang] [flang] [llvm] [flang] Add runtime trampoline pool for W^X compliance (PR #183108)   Tarun Prabhu via llvm-commits
• [clang] [flang] [llvm] [flang] Add runtime trampoline pool for W^X compliance (PR #183108)   Tarun Prabhu via llvm-commits
• [clang] [flang] [llvm] [flang] Add runtime trampoline pool for W^X compliance (PR #183108)   Tarun Prabhu via llvm-commits
• [llvm] [flang] [flang-rt] Subscript overrun could occur in namelists during a READ command. (PR #176959)   Tarun Prabhu via llvm-commits
• [llvm] [flang] [flang-rt] Subscript overrun could occur in namelists during a READ command. (PR #176959)   Tarun Prabhu via llvm-commits
• [clang] [lld] [llvm] [llvm][lld][clang] Delay initializing TargetOptions in LTO builds until a Triple is available (PR #179509)   Teresa Johnson via llvm-commits
• [llvm] [MemProf] Add stack IDs to MemProfUse optimization remarks (PR #184670)   Teresa Johnson via llvm-commits
• [llvm] [MemProf] Add stack IDs to MemProfUse optimization remarks (PR #184670)   Teresa Johnson via llvm-commits
• [llvm] [MemProf] Enhance thin link optimization remarks (PR #184829)   Teresa Johnson via llvm-commits
• [llvm] [MemProf] Enhance thin link optimization remarks (PR #184829)   Teresa Johnson via llvm-commits
• [llvm] [Analysis][DXILResource] Correct bound computation (PR #184198)   Tex Riddell via llvm-commits
• [llvm] [Analysis][DXILResource] Correct bound computation (PR #184198)   Tex Riddell via llvm-commits
• [llvm] [NFC] [HWASan] more meaningful BB names in use-after-scope test (PR #183867)   Thurston Dang via llvm-commits
• [llvm] [VPlan] Use bitfield to store Cmp predicates and GEP wrap flags. (NFC) (PR #181571)   Thurston Dang via llvm-commits
• [llvm] [ASan][Windows] Fixing Windows shadow memory address for arm64 (PR #184902)   Thurston Dang via llvm-commits
• [llvm] [ASan][Windows] Fixing Windows shadow memory address for arm64 (PR #184902)   Thurston Dang via llvm-commits
• [llvm] [ASan][Windows] Fixing Windows shadow memory address for arm64 (PR #184902)   Thurston Dang via llvm-commits
• [llvm] [ASan][Windows] Fixing Windows shadow memory address for arm64 (PR #184902)   Thurston Dang via llvm-commits
• [llvm] [ASan][Windows] Fixing Windows shadow memory address for arm64 (PR #184902)   Thurston Dang via llvm-commits
• [llvm] [ASan][Windows] Fixing Windows shadow memory address for arm64 (PR #184902)   Thurston Dang via llvm-commits
• [llvm] [AArch64][GlobalISel] FP Info implementation for AArch64. (PR #177158)   Tim Gymnich via llvm-commits
• [llvm] [AArch64][GlobalISel] FP Info implementation for AArch64. (PR #177158)   Tim Gymnich via llvm-commits
• [llvm] [AArch64][GlobalISel] FP Info implementation for AArch64. (PR #177158)   Tim Gymnich via llvm-commits
• [llvm] [AArch64][GlobalISel] FP Info implementation for AArch64. (PR #177158)   Tim Gymnich via llvm-commits
• [llvm] [AArch64][GlobalISel] FP Info implementation for AArch64. (PR #177158)   Tim Gymnich via llvm-commits
• [llvm] [AArch64][GlobalISel] FP Info implementation for AArch64. (PR #177158)   Tim Gymnich via llvm-commits
• [llvm] [AArch64][GlobalISel] FP Info implementation for AArch64. (PR #177158)   Tim Gymnich via llvm-commits
• [clang] [clang-tools-extra] [lldb] [llvm] [mlir] [openmp] [polly] [clang][docs] Remove "referenced by" output (PR #182876)   Timm Baeder via llvm-commits
• [clang] [clang-tools-extra] [lldb] [llvm] [mlir] [openmp] [polly] [docs] Remove "referenced by" output (PR #182876)   Timm Baeder via llvm-commits
• [clang] [clang-tools-extra] [lldb] [llvm] [mlir] [openmp] [polly] [docs] Remove "referenced by" output (PR #182876)   Timm Baeder via llvm-commits
• [llvm] Allow DWARF expressions to refer to variable values (PR #181028)   Tom Tromey via llvm-commits
• [llvm] Allow DWARF expressions to refer to variable values (PR #181028)   Tom Tromey via llvm-commits
• [llvm] Allow DWARF expressions to refer to variable values (PR #181028)   Tom Tromey via llvm-commits
• [llvm] [LV] Add debug print for TTI.MaxInterleaveFactor (NFC) (PR #183309)   Tomer Shafir via llvm-commits
• [llvm] [CMake] Align CMAKE_EXPORT_COMPILE_COMMANDS from 1 to ON (PR #184971)   Tomer Shafir via llvm-commits
• [llvm] [CMake] Align CMAKE_EXPORT_COMPILE_COMMANDS from 1 to ON (PR #184971)   Tomer Shafir via llvm-commits
• [llvm] [CMake] Align CMAKE_EXPORT_COMPILE_COMMANDS from 1 to ON (PR #184971)   Tomer Shafir via llvm-commits
• [llvm] [CMake][LLVM] Align CMAKE_EXPORT_COMPILE_COMMANDS from 1 to ON (PR #184971)   Tomer Shafir via llvm-commits
• [llvm] [CMake][LLVM] Align CMAKE_EXPORT_COMPILE_COMMANDS from 1 to ON (PR #184971)   Tomer Shafir via llvm-commits
• [llvm] [X86][GlobalISel] Ignore non-vregs in regbank mapping (PR #182880)   Tommy Chiang via llvm-commits
• [llvm] [X86][GlobalISel] Ignore non-vregs in regbank mapping (PR #182880)   Tommy Chiang via llvm-commits
• [llvm] [X86][GlobalISel] Ignore non-vregs in regbank mapping (PR #182880)   Tommy Chiang via llvm-commits
• [llvm] [X86][GlobalISel] Ignore non-vregs in regbank mapping (PR #182880)   Tommy Chiang via llvm-commits
• [llvm] [X86][GlobalISel] Ignore non-vregs in regbank mapping (PR #182880)   Tommy Chiang via llvm-commits
• [llvm] [X86][GlobalISel] Ignore non-vregs in regbank mapping (PR #182880)   Tommy Chiang via llvm-commits
• [llvm] [X86][GlobalISel] Ignore non-vregs in regbank mapping (PR #182880)   Tommy Chiang via llvm-commits
• [llvm] [X86][GlobalISel] Ignore non-vregs in regbank mapping (PR #182880)   Tommy Chiang via llvm-commits
• [llvm] [SystemZ][z/OS] Remove use of subsections. (PR #184167)   Tony Tao via llvm-commits
• [clang] [llvm] [ARM] Add support for Windows SEH (PR #184953)   Trung Nguyen via llvm-commits
• [clang] [llvm] [ARM] Add support for Windows SEH (PR #184953)   Trung Nguyen via llvm-commits
• [clang] [llvm] [ARM] Add support for Windows SEH (PR #184953)   Trung Nguyen via llvm-commits
• [clang] [llvm] [ARM] Add support for Windows SEH (PR #184953)   Trung Nguyen via llvm-commits
• [clang] [llvm] [ARM] Add support for Windows SEH (PR #184953)   Trung Nguyen via llvm-commits
• [clang] [llvm] [ARM] Add support for Windows SEH (PR #184953)   Trung Nguyen via llvm-commits
• [clang] [llvm] [ARM] Add support for Windows SEH (PR #184953)   Trung Nguyen via llvm-commits
• [clang] [llvm] [ARM] Add support for Windows SEH (PR #184953)   Trung Nguyen via llvm-commits
• [llvm] [SystemZ] Mark fminimumnum/fmaximumnum as legal (PR #184595)   Ulrich Weigand via llvm-commits
• [llvm] [SystemZ] Mark fminimumnum/fmaximumnum as legal (PR #184595)   Ulrich Weigand via llvm-commits
• [llvm] [SystemZ] Mark fminimumnum/fmaximumnum as legal (PR #184595)   Ulrich Weigand via llvm-commits
• [llvm] [SystemZ] Mark fminimumnum/fmaximumnum as legal (PR #184595)   Ulrich Weigand via llvm-commits
• [llvm] [SystemZ][z/OS] Add a parameter Align to emitIncrement() and use 32 for XPLINK stack on z/OS. (PR #182348)   Ulrich Weigand via llvm-commits
• [llvm] [SystemZ][z/OS] Remove use of subsections. (PR #184167)   Ulrich Weigand via llvm-commits
• [llvm] [SystemZ][z/OS] Remove use of subsections. (PR #184167)   Ulrich Weigand via llvm-commits
• [llvm] [SystemZ][z/OS] Emit prolog size (PR #181850)   Ulrich Weigand via llvm-commits
• [llvm] [SystemZ][z/OS] Emit prolog size (PR #181850)   Ulrich Weigand via llvm-commits
• [clang] [llvm] [SystemZ] Global Stackprotector and associated location section (PR #169317)   Ulrich Weigand via llvm-commits
• [clang] [llvm] [SystemZ] Global Stackprotector and associated location section (PR #169317)   Ulrich Weigand via llvm-commits
• [clang] [llvm] [SystemZ] Global Stackprotector and associated location section (PR #169317)   Ulrich Weigand via llvm-commits
• [clang] [llvm] [SystemZ] Global Stackprotector and associated location section (PR #169317)   Ulrich Weigand via llvm-commits
• [llvm] [AArch64] Limit support to f32 and f64 in performSelectCombine (PR #184315)   Usha Gupta via llvm-commits
• [llvm] [LICM] Reassociate add/sub expressions to hoist invariant computations (PR #183082)   Valeriy Savchenko via llvm-commits
• [llvm] [BOLT] Enable compatibility of instrumentation-file-append-pid with instrumentation-sleep-time (PR #183919)   Vasily Leonenko via llvm-commits
• [llvm] [BOLT] Enable compatibility of instrumentation-file-append-pid with instrumentation-sleep-time (PR #183919)   Vasily Leonenko via llvm-commits
• [llvm] [libc] Build fuzzing tests in pre-merge CI tests (PR #185016)   Victor Campos via llvm-commits
• [llvm] [libc] Build fuzzing tests in pre-merge CI tests (PR #185016)   Victor Campos via llvm-commits
• [llvm] [AMDGPU] Select v_bfe_u32 for i8/i16 (and (srl x, c), mask) (PR #182446)   Vigneshwar Jayakumar via llvm-commits
• [llvm] Revert "[IndVarsSimplify] sinkUnusedInvariants is skipping instructio… (PR #184436)   Vigneshwar Jayakumar via llvm-commits
• [llvm] Revert "[IndVarsSimplify] sinkUnusedInvariants is skipping instructio… (PR #184436)   Vigneshwar Jayakumar via llvm-commits
• [llvm] Revert "[IndVarsSimplify] sinkUnusedInvariants is skipping instructio… (PR #184436)   Vigneshwar Jayakumar via llvm-commits
• [llvm] [AMDGPU] Select v_bfe_u32 for i8/i16 (and (srl x, c), mask) (PR #182446)   Vigneshwar Jayakumar via llvm-commits
• [llvm] [AMDGPU] Add readfirstlane for inline asm SGPR with VGPR input (PR #176330)   Vigneshwar Jayakumar via llvm-commits
• [llvm] [AMDGPU] Add readfirstlane for inline asm SGPR with VGPR input (PR #176330)   Vigneshwar Jayakumar via llvm-commits
• [llvm] [AMDGPU] Add readfirstlane for inline asm SGPR with VGPR input (PR #176330)   Vigneshwar Jayakumar via llvm-commits
• [llvm] [SPIR-V] Complete SPV_INTEL_16bit_atomics extension support (PR #184312)   Viktoria Maximova via llvm-commits
• [llvm] [SPIR-V] Complete SPV_INTEL_16bit_atomics extension support (PR #184312)   Viktoria Maximova via llvm-commits
• [llvm] [SPIR-V] Complete SPV_INTEL_16bit_atomics extension support (PR #184312)   Viktoria Maximova via llvm-commits
• [clang] [compiler-rt] [CFI] Expand test to include minimal runtime (PR #183646)   Vitaly Buka via llvm-commits
• [clang] [compiler-rt] [llvm] [TSan] Add escape analysis for redundant instrumentation elimination (PR #169896)   Vitaly Buka via llvm-commits
• [clang] [compiler-rt] [llvm] [TSan] Add escape analysis for redundant instrumentation elimination (PR #169896)   Vitaly Buka via llvm-commits
• [clang] [compiler-rt] [llvm] [TSan] Add escape analysis for redundant instrumentation elimination (PR #169896)   Vitaly Buka via llvm-commits
• [clang] [compiler-rt] [llvm] [TSan] Add escape analysis for redundant instrumentation elimination (PR #169896)   Vitaly Buka via llvm-commits
• [compiler-rt] [ASan] Fix overflow and last byte handling in __asan_region_is_poisoned (PR #183900)   Vitaly Buka via llvm-commits
• [compiler-rt] [ASan] Fix overflow and last byte handling in __asan_region_is_poisoned (PR #183900)   Vitaly Buka via llvm-commits
• [compiler-rt] [ASan] Fix overflow and last byte handling in __asan_region_is_poisoned (PR #183900)   Vitaly Buka via llvm-commits
• [compiler-rt] [ASan] Fix overflow and last byte handling in __asan_region_is_poisoned (PR #183900)   Vitaly Buka via llvm-commits
• [clang] [compiler-rt] halt_on_error flag for TySan and docs (PR #182479)   Vitaly Buka via llvm-commits
• [clang] [compiler-rt] halt_on_error flag for TySan and docs (PR #182479)   Vitaly Buka via llvm-commits
• [compiler-rt] [sanitizer_common] Fix SIGPIPE when symbolizer started by StartSubprocess dies (PR #171511)   Vitaly Buka via llvm-commits
• [llvm] [JSON] Do not reset type of moved-from object (PR #185125)   Vitaly Buka via llvm-commits
• [llvm] [JSON] Do not reset type of moved-from object (PR #185125)   Vitaly Buka via llvm-commits
• [clang] [llvm] [clang] Add `-verify-directives` cc1 flag (PR #179835)   Vlad Serebrennikov via llvm-commits
• [clang] [llvm] [clang] Add `-verify-directives` cc1 flag (PR #179835)   Vlad Serebrennikov via llvm-commits
• [clang] [llvm] [clang] Add `-verify-directives` cc1 flag (PR #179835)   Vlad Serebrennikov via llvm-commits
• [clang] [llvm] [DebugInfo] Emit DW_AT_const_value for constexpr array static members (PR #182442)   Vladislav Dzhidzhoev via llvm-commits
• [clang] [llvm] [DebugInfo] Emit DW_AT_const_value for constexpr array static members (PR #182442)   Vladislav Dzhidzhoev via llvm-commits
• [clang] [llvm] [DebugInfo] Emit DW_AT_const_value for constexpr array static members (PR #182442)   Vladislav Dzhidzhoev via llvm-commits
• [clang] [llvm] [DebugInfo] Emit DW_AT_const_value for constexpr array static members (PR #182442)   Vladislav Dzhidzhoev via llvm-commits
• [clang] [llvm] [DebugInfo] Emit DW_AT_const_value for constexpr array static members (PR #182442)   Vladislav Dzhidzhoev via llvm-commits
• [lld] [llvm] [DebugInfo][DwarfDebug] Move emission of globals from beginModule() to endModule() (5/7) (PR #184219)   Vladislav Dzhidzhoev via llvm-commits
• [lld] [llvm] [DebugInfo][DwarfDebug] Move emission of globals from beginModule() to endModule() (5/7) (PR #184219)   Vladislav Dzhidzhoev via llvm-commits
• [lld] [llvm] [DebugInfo][DwarfDebug] Move emission of globals from beginModule() to endModule() (5/7) (PR #184219)   Vladislav Dzhidzhoev via llvm-commits
• [lld] [llvm] [DebugInfo][DwarfDebug] Move emission of globals from beginModule() to endModule() (5/7) (PR #184219)   Vladislav Dzhidzhoev via llvm-commits
• [lld] [llvm] [DebugInfo][DwarfDebug] Move emission of globals from beginModule() to endModule() (5/7) (PR #184219)   Vladislav Dzhidzhoev via llvm-commits
• [lld] [llvm] [DebugInfo][DwarfDebug] Move emission of globals from beginModule() to endModule() (5/7) (PR #184219)   Vladislav Dzhidzhoev via llvm-commits
• [lld] [llvm] [DebugInfo][DwarfDebug] Move emission of globals from beginModule() to endModule() (5/7) (PR #184219)   Vladislav Dzhidzhoev via llvm-commits
• [lld] [llvm] [DebugInfo][DwarfDebug] Move emission of globals from beginModule() to endModule() (5/7) (PR #184219)   Vladislav Dzhidzhoev via llvm-commits
• [lld] [llvm] [DebugInfo][DwarfDebug] Move emission of globals from beginModule() to endModule() (5/7) (PR #184219)   Vladislav Dzhidzhoev via llvm-commits
• [lld] [llvm] [DebugInfo][DwarfDebug] Move emission of globals from beginModule() to endModule() (5/7) (PR #184219)   Vladislav Dzhidzhoev via llvm-commits
• [lld] [llvm] [DebugInfo][DwarfDebug] Move emission of globals from beginModule() to endModule() (5/7) (PR #184219)   Vladislav Dzhidzhoev via llvm-commits
• [llvm] Allow DWARF expressions to refer to variable values (PR #181028)   Vladislav Dzhidzhoev via llvm-commits
• [llvm] [DebugInfo] Add Verifier check for local enums in CU's enums field (PR #185228)   Vladislav Dzhidzhoev via llvm-commits
• [clang] [llvm] [RFC][Coroutines] Implement HALO for coroutines that flow off final suspend (PR #185336)   Weibo He via llvm-commits
• [llvm] [CoroCleanup] Fix stale unwind predecessor when erase noop coro (PR #185337)   Weibo He via llvm-commits
• [llvm] [CoroCleanup] Fix stale unwind predecessor when erase noop coro (PR #185337)   Weibo He via llvm-commits
• [llvm] [CoroCleanup] Fix stale unwind predecessor when erase noop coro (PR #185337)   Weibo He via llvm-commits
• [llvm] [DAG] isKnownNeverZero - add ISD::ADD/SUB DemandedElts handling and tests (PR #183958)   Weiwen He via llvm-commits
• [llvm] [ValueTracking] Prove single-index inbounds GEP into known-size alloc… (PR #185301)   Weiwen He via llvm-commits
• [clang] [compiler-rt] [flang] [libc] [libcxx] [lldb] [llvm] [RFC][Clang] Add __int256/__uint256 builtin types (PR #182733)   Xavier Roche via llvm-commits
• [clang] [compiler-rt] [flang] [libc] [libcxx] [lldb] [llvm] [RFC][Clang] Add __int256/__uint256 builtin types (PR #182733)   Xavier Roche via llvm-commits
• [clang] [compiler-rt] [flang] [libc] [libcxx] [lldb] [llvm] [RFC][Clang] Add __int256/__uint256 builtin types (PR #182733)   Xavier Roche via llvm-commits
• [clang] [compiler-rt] [flang] [libc] [libcxx] [lldb] [llvm] [RFC][Clang] Add __int256/__uint256 builtin types (PR #182733)   Xavier Roche via llvm-commits
• [clang] [compiler-rt] [flang] [libc] [libcxx] [lldb] [llvm] [RFC][Clang] Add __int256/__uint256 builtin types (PR #182733)   Xavier Roche via llvm-commits
• [clang] [compiler-rt] [flang] [libc] [libcxx] [lldb] [llvm] [RFC][Clang] Add __int256/__uint256 builtin types (PR #182733)   Xavier Roche via llvm-commits
• [clang] [compiler-rt] [flang] [libc] [libcxx] [lldb] [llvm] [RFC][Clang] Add __int256/__uint256 builtin types (PR #182733)   Xavier Roche via llvm-commits
• [clang] [compiler-rt] [flang] [libc] [libcxx] [lldb] [llvm] [RFC][Clang] Add __int256/__uint256 builtin types (PR #182733)   Xavier Roche via llvm-commits
• [llvm] [X86][test] Add i256 codegen baseline tests (PR #183586)   Xavier Roche via llvm-commits
• [llvm] [RISCV][test] Add i256 codegen baseline test (PR #183588)   Xavier Roche via llvm-commits
• [clang] [compiler-rt] [flang] [libc] [libcxx] [lldb] [llvm] [RFC][Clang] Add __int256/__uint256 builtin types (PR #182733)   Xavier Roche via llvm-commits
• [clang] [compiler-rt] [flang] [libc] [libcxx] [lldb] [llvm] [RFC][Clang] Add __int256/__uint256 builtin types (PR #182733)   Xavier Roche via llvm-commits
• [clang] [compiler-rt] [flang] [libc] [libcxx] [lldb] [llvm] [RFC][Clang] Add __int256/__uint256 builtin types (PR #182733)   Xavier Roche via llvm-commits
• [llvm] [X86][test] Add i256 codegen baseline tests (PR #183586)   Xavier Roche via llvm-commits
• [llvm] [RISCV][test] Add i256 codegen baseline test (PR #183588)   Xavier Roche via llvm-commits
• [clang] [compiler-rt] [flang] [libc] [libcxx] [lldb] [llvm] [RFC][Clang] Add __int256/__uint256 builtin types (PR #182733)   Xavier Roche via llvm-commits
• [clang] [compiler-rt] [flang] [libc] [libcxx] [lldb] [llvm] [RFC][Clang] Add __int256/__uint256 builtin types (PR #182733)   Xavier Roche via llvm-commits
• [llvm] [RISCV][test] Add i256 codegen baseline test (PR #183588)   Xavier Roche via llvm-commits
• [llvm] [RISCV] Do not tail call optimize if arguments are passed indirectly (PR #184972)   Xavier Roche via llvm-commits
• [llvm] [RISCV] Fix musttail with indirect arguments by forwarding incoming pointers (PR #185094)   Xavier Roche via llvm-commits
• [llvm] [RISCV] Fix musttail with indirect arguments by forwarding incoming pointers (PR #185094)   Xavier Roche via llvm-commits
• [llvm] [RISCV] Fix musttail with indirect arguments by forwarding incoming pointers (PR #185094)   Xavier Roche via llvm-commits
• [llvm] [RISCV] Fix musttail with indirect arguments by forwarding incoming pointers (PR #185094)   Xavier Roche via llvm-commits
• [llvm] [RISCV] Fix musttail with indirect arguments by forwarding incoming pointers (PR #185094)   Xavier Roche via llvm-commits
• [llvm] [RISCV] Fix musttail with indirect arguments by forwarding incoming pointers (PR #185094)   Xavier Roche via llvm-commits
• [llvm] [RISCV] Fix musttail with indirect arguments by forwarding incoming pointers (PR #185094)   Xavier Roche via llvm-commits
• [libc] [llvm] [libc][math][c23] Add atan2f16 function (PR #183531)   Xinlong Chen via llvm-commits
• [libc] [llvm] [libc][math][c23] Add atan2f16 function (PR #183531)   Xinlong Chen via llvm-commits
• [libc] [llvm] [libc][math][c23] Add atan2f16 function (PR #183531)   Xinlong Chen via llvm-commits
• [llvm] [RISCV] Implement `isLoadFromStackSlotPostFE` and `isStoreToStackSlotPostFE` (PR #184673)   Yanzuo Liu via llvm-commits
• [llvm] [RISCV] Implement `isLoadFromStackSlotPostFE` and `isStoreToStackSlotPostFE` (PR #184673)   Yanzuo Liu via llvm-commits
• [clang] [llvm] [SROA] Canonicalize homogeneous structs into fixed vectors (PR #165159)   Yaxun Liu via llvm-commits
• [llvm] [AMDGPU] Fix GFX1250 hazard: S_SET_VGPR_MSB dropped (PR #184904)   Yaxun Liu via llvm-commits
• [llvm] [AMDGPU] Fix GFX1250 hazard: S_SET_VGPR_MSB dropped (PR #184904)   Yaxun Liu via llvm-commits
• [llvm] [AMDGPU] Fix GFX1250 hazard: S_SET_VGPR_MSB dropped (PR #184904)   Yaxun Liu via llvm-commits
• [llvm] [AMDGPU] Fix GFX1250 hazard: S_SET_VGPR_MSB dropped (PR #184904)   Yaxun Liu via llvm-commits
• [clang] [compiler-rt] [llvm] [PGO][AMDGPU] Add offload profiling with uniformity-aware optimization (PR #177665)   Yaxun Liu via llvm-commits
• [clang] [llvm] [SROA] Canonicalize homogeneous structs into fixed vectors (PR #165159)   Yaxun Liu via llvm-commits
• [llvm] [AMDGPU] Fix GFX1250 hazard: S_SET_VGPR_MSB dropped (PR #184904)   Yaxun Liu via llvm-commits
• [llvm] [AMDGPU] Fix GFX1250 hazard: S_SET_VGPR_MSB dropped (PR #184904)   Yaxun Liu via llvm-commits
• [llvm] [StructurizeCFG] Fix incorrect zero-cost hoisting in nested control flow (PR #183792)   Yaxun Liu via llvm-commits
• [llvm] [BasicBlockUtils] Fixed LoopInfo update in UpdateAnalysisInformation() (PR #177147)   Yevgeny Rouban via llvm-commits
• [llvm] [BasicBlockUtils] Fixed LoopInfo update in UpdateAnalysisInformation() (PR #177147)   Yevgeny Rouban via llvm-commits
• [llvm] [BasicBlockUtils] Fixed LoopInfo update in UpdateAnalysisInformation() (PR #177147)   Yevgeny Rouban via llvm-commits
• [llvm] [BasicBlockUtils] Fixed LoopInfo update in UpdateAnalysisInformation() (PR #177147)   Yevgeny Rouban via llvm-commits
• [clang-tools-extra] [llvm] [LLVM][Support] Move default values out of the storage (PR #184581)   Yevgeny Rouban via llvm-commits
• [clang-tools-extra] [llvm] [LLVM][Support] Move default values out of the storage (PR #184581)   Yevgeny Rouban via llvm-commits
• [clang-tools-extra] [llvm] [LLVM][Support] Move default values out of the storage (PR #184581)   Yevgeny Rouban via llvm-commits
• [clang-tools-extra] [llvm] [LLVM][Support] Move default values out of the storage (PR #184581)   Yevgeny Rouban via llvm-commits
• [llvm] [BasicBlockUtils] Fixed LoopInfo update in UpdateAnalysisInformation() (PR #177147)   Yevgeny Rouban via llvm-commits
• [llvm] [flang-rt] Fixes EXECUTE_COMMAND_LINE() status management and double buffering (PR #184285)   Yi Wu via llvm-commits
• [llvm] [IR] Return bool from replaceUsesWithIf() (PR #184107)   Yingwei Zheng via llvm-commits
• [llvm] [Loads] Allow replacement of null with ptr in `canReplacePointersIfEqual` (PR #184348)   Yingwei Zheng via llvm-commits
• [llvm] [Loads] Allow replacement of null with ptr in `canReplacePointersIfEqual` (PR #184348)   Yingwei Zheng via llvm-commits
• [llvm] [SDAGBuilder] Fix incorrect fcmp+select to minnum/maxnum transform (PR #184590)   Yingwei Zheng via llvm-commits
• [llvm] [InstCombine] Fix #163110: Fold icmp (shl X, L), (add (shl Y, L), 1<<L) to icmp X, (Y + 1) (PR #165975)   Yingwei Zheng via llvm-commits
• [llvm] InstCombine: Support extractvalue in SimplifyDemandedFPClass (PR #184171)   Yingwei Zheng via llvm-commits
• [llvm] InstCombine: Support extractvalue in SimplifyDemandedFPClass (PR #184171)   Yingwei Zheng via llvm-commits
• [llvm] ValueTracking: Handle ConstantDataSequential in computeKnownFPClass (PR #184191)   Yingwei Zheng via llvm-commits
• [llvm] ValueTracking: Handle ConstantDataSequential in computeKnownFPClass (PR #184191)   Yingwei Zheng via llvm-commits
• [llvm] ValueTracking: Handle ConstantDataSequential in computeKnownFPClass (PR #184191)   Yingwei Zheng via llvm-commits
• [llvm] ValueTracking: Teach computeKnownFPClass to look at bitcast + integer max (PR #184073)   Yingwei Zheng via llvm-commits
• [llvm] [SimplifyCFG] Simplify identical predecessors (PR #173022)   Yingwei Zheng via llvm-commits
• [llvm] [SimplifyCFG] Simplify identical predecessors (PR #173022)   Yingwei Zheng via llvm-commits
• [llvm] [llubi] Add support for load/store/lifetime markers (PR #182532)   Yingwei Zheng via llvm-commits
• [clang] [flang] [llvm] [InstCombine] Canonicalize GEP source element types (PR #180745)   Yingwei Zheng via llvm-commits
• [llvm] [llubi] Add support for load/store/lifetime markers (PR #182532)   Yingwei Zheng via llvm-commits
• [llvm] [llubi] Add support for load/store/lifetime markers (PR #182532)   Yingwei Zheng via llvm-commits
• [llvm] [llubi] Add support for load/store/lifetime markers (PR #182532)   Yingwei Zheng via llvm-commits
• [llvm] [Reland][llubi] Add support for load/store/lifetime markers (PR #185196)   Yingwei Zheng via llvm-commits
• [llvm] [Reland][llubi] Add support for load/store/lifetime markers (PR #185196)   Yingwei Zheng via llvm-commits
• [llvm] [llubi] Add support for bitcast (PR #185205)   Yingwei Zheng via llvm-commits
• [llvm] [llubi] Add support for bitcast (PR #185205)   Yingwei Zheng via llvm-commits
• [llvm] [llubi] Add support for bitcast (PR #185205)   Yingwei Zheng via llvm-commits
• [llvm] [llubi] Add support for bitcast (PR #185205)   Yingwei Zheng via llvm-commits
• [llvm] [llubi] Add support for bitcast (PR #185205)   Yingwei Zheng via llvm-commits
• [llvm] [llubi] Add support for bitcast (PR #185205)   Yingwei Zheng via llvm-commits
• [llvm] [llubi] Add support for bitcast (PR #185205)   Yingwei Zheng via llvm-commits
• [llvm] [llubi] Add support for bitcast (PR #185205)   Yingwei Zheng via llvm-commits
• [llvm] [llubi] Add support for bitcast (PR #185205)   Yingwei Zheng via llvm-commits
• [llvm] [llubi] Add support for bitcast (PR #185205)   Yingwei Zheng via llvm-commits
• [llvm] [BOLT] Retain certain local symbols (PR #184074)   YongKang Zhu via llvm-commits
• [llvm] [BOLT] Retain certain local symbols (PR #184074)   YongKang Zhu via llvm-commits
• [llvm] [BOLT] Retain certain local symbols (PR #184074)   YongKang Zhu via llvm-commits
• [llvm] [BOLT] Retain certain local symbols (PR #184074)   YongKang Zhu via llvm-commits
• [llvm] [BOLT] Retain certain local symbols (PR #184074)   YongKang Zhu via llvm-commits
• [llvm] [AMDGPU] Cgscc amdgpu attributor (PR #179719)   Yoonseo Choi via llvm-commits
• [llvm] [AMDGPU] Cgscc amdgpu attributor (PR #179719)   Yoonseo Choi via llvm-commits
• [llvm] [AMDGPU] Add dereferenceable retAttr to a call to llvm.amdgcn.implicitarg.ptr (PR #182206)   Yoonseo Choi via llvm-commits
• [llvm] [AMDGPU] Add dereferenceable retAttr to a call to llvm.amdgcn.implicitarg.ptr (PR #182206)   Yoonseo Choi via llvm-commits
• [llvm] [AMDGPU] Cgscc amdgpu attributor boilerplate NFC (PR #179719)   Yoonseo Choi via llvm-commits
• [llvm] [AMDGPU] Cgscc amdgpu attributor boilerplate NFC (PR #179719)   Yoonseo Choi via llvm-commits
• [llvm] [AMDGPU] Cgscc amdgpu attributor boilerplate NFC (PR #179719)   Yoonseo Choi via llvm-commits
• [llvm] SelectionDAG: Support FMINIMUMNUM and FMINIMUM in combineMinNumMaxNumImpl (PR #137449)   YunQiang Su via llvm-commits
• [llvm] SelectionDAG: Support FMINIMUMNUM and FMINIMUM in combineMinNumMaxNumImpl (PR #137449)   YunQiang Su via llvm-commits
• [llvm] SelectionDAG: Support FMINIMUMNUM and FMINIMUM in combineMinNumMaxNumImpl (PR #137449)   YunQiang Su via llvm-commits
• [llvm] SelectionDAG: Support FMINIMUMNUM and FMINIMUM in combineMinNumMaxNumImpl (PR #137449)   YunQiang Su via llvm-commits
• [llvm] SelectionDAG: Support FMINIMUMNUM and FMINIMUM in combineMinNumMaxNumImpl (PR #137449)   YunQiang Su via llvm-commits
• [llvm] SelectionDAG: Support FMINIMUMNUM and FMINIMUM in combineMinNumMaxNumImpl (PR #137449)   YunQiang Su via llvm-commits
• [llvm] expandIS_FPCLASS: Support fcNegative and fcPositive (PR #184788)   YunQiang Su via llvm-commits
• [llvm] expandFMINIMUM_FMAXIMUM: Use FMINIMUMNUM and FMAXIMUMNUM if possible (PR #180487)   YunQiang Su via llvm-commits
• [llvm] expandIS_FPCLASS: Support fcNegative and fcPositive (PR #184788)   YunQiang Su via llvm-commits
• [llvm] expandIS_FPCLASS: Support fcNegative and fcPositive (PR #184788)   YunQiang Su via llvm-commits
• [llvm] expandIS_FPCLASS: Support fcNegative and fcPositive (PR #184788)   YunQiang Su via llvm-commits
• [llvm] DAGCombiner::visitBITCAST: CastLoad strip AssertNoFPClass (PR #184952)   YunQiang Su via llvm-commits
• [llvm] DAGCombiner::visitBITCAST: CastLoad strip AssertNoFPClass (PR #184952)   YunQiang Su via llvm-commits
• [llvm] DAGCombiner::visitBITCAST: CastLoad strip AssertNoFPClass (PR #184952)   YunQiang Su via llvm-commits
• [llvm] expandIS_FPCLASS: Support fcNegative and fcPositive (PR #184788)   YunQiang Su via llvm-commits
• [llvm] expandIS_FPCLASS: Support fcNegative and fcPositive (PR #184788)   YunQiang Su via llvm-commits
• [llvm] DAGCombiner::visitBITCAST: CastLoad strip AssertNoFPClass (PR #184952)   YunQiang Su via llvm-commits
• [llvm] DAGCombiner::visitBITCAST: CastLoad strip AssertNoFPClass (PR #184952)   YunQiang Su via llvm-commits
• [llvm] expandIS_FPCLASS: Support fcNegative and fcPositive (PR #184788)   YunQiang Su via llvm-commits
• [llvm] Fix to generalize the canSkipClobberingStore (PR #174137)   Yunbo Ni via llvm-commits
• [llvm] [Delinearization] Extract outer array dimensions using global object size (PR #175158)   Yunbo Ni via llvm-commits
• [llvm] [VectorCombine] Compact shuffle operands by eliminating unused elements (PR #176074)   Yunbo Ni via llvm-commits
• [llvm] [LICM] Relax overflow flag requirements for eq/ne in hoistAdd/hoistSub (PR #183145)   Yunbo Ni via llvm-commits
• [llvm] [VectorCombine] Merge duplicate shuffle instruction nodes (PR #182768)   Yunbo Ni via llvm-commits
• [llvm] [VectorCombine] Consolidate fragmented loads from shuffle chains into wide loads (PR #177571)   Yunbo Ni via llvm-commits
• [llvm] [Reassociate] Distribute multiply over add to enable factorization (PR #178201)   Yunbo Ni via llvm-commits
• [llvm] [SimplifyCFG] Optimize select over pointers to eliminate no-op load/store (PR #179277)   Yunbo Ni via llvm-commits
• [llvm] [StructurizeCFG] Fix incorrect zero-cost hoisting in nested control flow (PR #183792)   Yunbo Ni via llvm-commits
• [llvm] [IROutliner] Correctly Replace Outlined Constants with Arguments (PR #179885)   Yunbo Ni via llvm-commits
• [llvm] [StructurizeCFG] Fix incorrect zero-cost hoisting in nested control flow (PR #183792)   Yunbo Ni via llvm-commits
• [llvm] [SimplifyLibCalls] Avoid simplifying pow(x, 2.0) -> x * x with math-errno. (PR #183099)   Yunbo Ni via llvm-commits
• [libunwind] [llvm] [LFI][AArch64] Add AArch64 LFI rewriter (PR #184277)   Zachary Yedidia via llvm-commits
• [llvm] [ASan][Windows] Fixing Windows shadow memory address for arm64 (PR #184902)   Zack Johnson via llvm-commits
• [llvm] [ASan][Windows] Fixing Windows shadow memory address for arm64 (PR #184902)   Zack Johnson via llvm-commits
• [llvm] [ASan][Windows] Fixing Windows shadow memory address for arm64 (PR #184902)   Zack Johnson via llvm-commits
• [llvm] [ASan][Windows] Fixing Windows shadow memory address for arm64 (PR #184902)   Zack Johnson via llvm-commits
• [llvm] [ASan][Windows] Fixing Windows shadow memory address for arm64 (PR #184902)   Zack Johnson via llvm-commits
• [llvm] [ASan][Windows] Fixing Windows shadow memory address for arm64 (PR #184902)   Zack Johnson via llvm-commits
• [llvm] [AMDGPU] using divergent/uniform information in ISel of zext (PR #174539)   Zeng Wu via llvm-commits
• [llvm] [AMDGPU] using divergent/uniform information in ISel of zext (PR #174539)   Zeng Wu via llvm-commits
• [llvm] [AMDGPU] using divergent/uniform information in ISel of zext (PR #174539)   Zeng Wu via llvm-commits
• [llvm] [AMDGPU] propagate unifor/diverent in DAG combine (PR #184940)   Zeng Wu via llvm-commits
• [lld] [lld][MachO] Add N_COLD_FUNC support (PR #183909)   Zhaoxuan Jiang via llvm-commits
• [lld] [lld][MachO] Add N_COLD_FUNC support (PR #183909)   Zhaoxuan Jiang via llvm-commits
• [lld] [lld][MachO] Add N_COLD_FUNC support (PR #183909)   Zhaoxuan Jiang via llvm-commits
• [lld] [lld][MachO] Add N_COLD_FUNC support (PR #183909)   Zhaoxuan Jiang via llvm-commits
• [lld] [lld][MachO] Add N_COLD_FUNC support (PR #183909)   Zhaoxuan Jiang via llvm-commits
• [lld] [lld][MachO] Add N_COLD_FUNC support (PR #183909)   Zhaoxuan Jiang via llvm-commits
• [lld] [lld][MachO] Add N_COLD_FUNC support (PR #183909)   Zhaoxuan Jiang via llvm-commits
• [llvm] [BOLT][Perf2bolt] Add support to generate pre-parsed perf data (PR #171144)   Ádám Kallai via llvm-commits
• [llvm] [offload] Add properties parameter to olLaunchKernel (PR #184343)   Łukasz Plewa via llvm-commits
• [llvm] [offload] add properties to the olLaunchKernel (PR #176742)   Łukasz Plewa via llvm-commits
• [llvm] [offload] add properties to the olLaunchKernel (PR #176742)   Łukasz Plewa via llvm-commits
• [llvm] [offload] Change olLaunchKernel to accept argument arrays (PR #173263)   Łukasz Plewa via llvm-commits
• [llvm] [offload] Change olLaunchKernel to accept argument arrays (PR #173263)   Łukasz Plewa via llvm-commits
• [llvm] [offload] Add properties parameter to olLaunchKernel (PR #184343)   Łukasz Plewa via llvm-commits
• [llvm] [offload] Add properties parameter to olLaunchKernel (PR #184343)   Łukasz Plewa via llvm-commits
• [llvm] [offload] Add properties parameter to olLaunchKernel (PR #184343)   Łukasz Plewa via llvm-commits
• [llvm] [offload] Add properties parameter to olLaunchKernel (PR #184343)   Łukasz Plewa via llvm-commits
• [llvm] [offload] Add properties parameter to olLaunchKernel (PR #184343)   Łukasz Plewa via llvm-commits
• [llvm] [offload] Add properties parameter to olLaunchKernel (PR #184343)   Łukasz Plewa via llvm-commits
• [llvm] [offload] Add properties parameter to olLaunchKernel (PR #184343)   Łukasz Plewa via llvm-commits
• [llvm] [offload] Add properties parameter to olLaunchKernel (PR #184343)   Łukasz Plewa via llvm-commits
• [llvm] [offload] Add properties parameter to olLaunchKernel (PR #184343)   Łukasz Plewa via llvm-commits
• [llvm] [offload] Add properties parameter to olLaunchKernel (PR #184343)   Łukasz Plewa via llvm-commits
• [llvm] [offload] Add properties parameter to olLaunchKernel (PR #184343)   Łukasz Plewa via llvm-commits
• [llvm] [offload] Add properties parameter to olLaunchKernel (PR #184343)   Łukasz Plewa via llvm-commits
• [llvm] [offload] Add properties parameter to olLaunchKernel (PR #184343)   Łukasz Plewa via llvm-commits
• [llvm] [offload] Add properties parameter to olLaunchKernel (PR #184343)   Łukasz Plewa via llvm-commits
• [llvm] [offload] Add properties parameter to olLaunchKernel (PR #184343)   Łukasz Plewa via llvm-commits
• [llvm] [offload] Add properties parameter to olLaunchKernel (PR #184343)   Łukasz Plewa via llvm-commits
• [llvm] [offload] Add properties parameter to olLaunchKernel (PR #184343)   Łukasz Plewa via llvm-commits
• [llvm] [offload] Add properties parameter to olLaunchKernel (PR #184343)   Łukasz Plewa via llvm-commits
• [llvm] [offload] Add properties parameter to olLaunchKernel (PR #184343)   Łukasz Plewa via llvm-commits
• [llvm] [offload] Add properties parameter to olLaunchKernel (PR #184343)   Łukasz Plewa via llvm-commits
• [llvm] [offload] Add properties parameter to olLaunchKernel (PR #184343)   Łukasz Plewa via llvm-commits
• [llvm] [offload] Add properties parameter to olLaunchKernel (PR #184343)   Łukasz Plewa via llvm-commits
• [llvm] [offload] Add properties parameter to olLaunchKernel (PR #184343)   Łukasz Plewa via llvm-commits
• [llvm] [offload] Add properties parameter to olLaunchKernel (PR #184343)   Łukasz Plewa via llvm-commits
• [llvm] [offload] Add properties parameter to olLaunchKernel (PR #184343)   Łukasz Plewa via llvm-commits
• [llvm] [offload] Add properties parameter to olLaunchKernel (PR #184343)   Łukasz Plewa via llvm-commits
• [llvm] [offload] Add properties parameter to olLaunchKernel (PR #184343)   Łukasz Plewa via llvm-commits
• [llvm] [offload] Add properties parameter to olLaunchKernel (PR #184343)   Łukasz Plewa via llvm-commits
• [llvm] [offload] Add properties parameter to olLaunchKernel (PR #184343)   Łukasz Plewa via llvm-commits
• [llvm] [offload] Add properties parameter to olLaunchKernel (PR #184343)   Łukasz Plewa via llvm-commits
• [llvm] [offload] Add properties parameter to olLaunchKernel (PR #184343)   Łukasz Plewa via llvm-commits
• [llvm] [OFFLOAD] Replace C-style casts with C++ style casts in obtainInfoImpl (PR #185023)   Łukasz Plewa via llvm-commits
• [llvm] [offload] Add properties parameter to olLaunchKernel (PR #184343)   Łukasz Plewa via llvm-commits
• [llvm] [DA] Add tests for the Weak Zero SIV tests return incorrect result (NFC) (PR #183735)   via llvm-commits
• [llvm] [DAG] ISD::matchUnaryPredicate / matchUnaryFpPredicate / matchBinaryPredicate - add DemandedElts variant (PR #183013)   via llvm-commits
• [llvm] ValueTracking: Teach computeKnownFPClass to look at bitcast + integer max (PR #184073)   via llvm-commits
• [llvm] [BOLT] Retain certain local symbols (PR #184074)   via llvm-commits
• [llvm] [BOLT] Retain certain local symbols (PR #184074)   via llvm-commits
• [llvm] 265c1f4 - [LV] Add debug print for TTI.MaxInterleaveFactor (NFC) (#183309)   via llvm-commits
• [llvm] f7b1107 - [IVDescriptors] Remove function FMF attribute check for FP min/max reduction (#183523)   via llvm-commits
• [llvm] [AArch64][NFC] Remove unused parameters for `performORCombine` (PR #184075)   via llvm-commits
• [llvm] ValueTracking: Teach computeKnownFPClass to look at bitcast + integer max (PR #184073)   via llvm-commits
• [llvm] ValueTracking: Teach computeKnownFPClass to look at bitcast + integer max (PR #184073)   via llvm-commits
• [llvm] [AArch64][NFC] Remove unused parameters for `performORCombine` (PR #184075)   via llvm-commits
• [llvm] c62c00c - [VPlan] Remove unused VPExpandSCEVRecipe before expansion (#181329)   via llvm-commits
• [llvm] [mlir] [IR] Split Br into UncondBr and CondBr (PR #184027)   via llvm-commits
• [llvm] 4922ab9 - [RISCV] Relax codegen predicates for HINT-based instructions (#179872)   via llvm-commits
• [compiler-rt] 36c6c68 - [compiler-rt][ARM] Fix conditions for strict-mode FP testing (#183507)   via llvm-commits
• [llvm] [CI] Enable gold tests (PR #184076)   via llvm-commits
• [llvm] [mlir] [IR] Split Br into UncondBr and CondBr (PR #184027)   via llvm-commits
• [llvm] [LIT] Fix env without subcommand causing early return in pipeline (PR #184028)   via llvm-commits
• [llvm] [AMDGPU] Detect VALU-after-MFMA hazard in post-RA scheduler's getHazardType (PR #184084)   via llvm-commits
• [llvm] 037fd6e - [AMDGPU] Add VINTERP encoding to gfx13 (#182481)   via llvm-commits
• [llvm] [VPlan] Introduce VPlan::get(Zero|AllOnes) (NFC) (PR #184085)   via llvm-commits
• [llvm] [VPlan] Introduce VPlan::get(Zero|AllOnes) (NFC) (PR #184085)   via llvm-commits
• [llvm] 3ad43f2 - [LangRef] Clarify nsz semantics (#180906)   via llvm-commits
• [clang] [llvm] [X86] support reserve r8~r15 on X86_64 (PR #180242)   via llvm-commits
• [clang] [llvm] [X86] support reserve r8~r15 on X86_64 (PR #180242)   via llvm-commits
• [llvm] f46aca9 - [AArch64] Combine (and/or X, (dup (not Y))) -> (bic/orn X, (dup Y)) (#175739)   via llvm-commits
• [clang] [llvm] [RISCV][llvm] Use [u]int32 vector for input arguments for zvdot4a8i (PR #184089)   via llvm-commits
• [llvm] 0c89071 - github-automation.py: Fix mis-indented statement (#149653)   via llvm-commits
• [llvm] github-automation.py: Fix mis-indented statement (PR #149653)   via llvm-commits
• [clang] [llvm] [X86] support reserve r8~r15 on X86_64 (PR #180242)   via llvm-commits
• [llvm] 61faf7d - [AArch64][GlobalISel] Use GPR for illegal fconstants and extend < 32 bit GPR constants to 32 bits (#178692)   via llvm-commits
• [llvm] [AArch64] Add basic NPM support for LoadStoreOptimizer. (PR #184090)   via llvm-commits
• [llvm] 730587d - [DAG] isKnownNeverZero - add DemandedElts for ISD::SMIN/SMAX (#184054)   via llvm-commits
• [llvm] [DAG] isKnownNeverZero - add DemandedElts for ISD::SMIN/SMAX (PR #184054)   via llvm-commits
• [llvm] [InstCombine] fold commutative binop with const into select (PR #183692)   via llvm-commits
• [llvm] 13751c8 - [AArch64] Vectorise llvm.pow using vector intrinsic for ArmPL library (#183319)   via llvm-commits
• [llvm] [InstCombine] fold commutative binop with const into select (PR #183692)   via llvm-commits
• [llvm] [InstCombine] fold commutative binop with const into select (PR #183692)   via llvm-commits
• [llvm] [InstCombine] fold commutative binop with const into select (PR #183692)   via llvm-commits
• [llvm] 482a771 - [DAG] visitCLMUL - fold (clmul x, c_pow2) -> (shl x, log2(c_pow2)) (#184049)   via llvm-commits
• [llvm] InstCombine: Pass SimplifyQuery through SimplifyDemandedFPClass (PR #184096)   via llvm-commits
• [llvm] 6cce18b - [LoopIdiomVectorize] Avoid wrapping in find_first_of loops. (#180570)   via llvm-commits
• [llvm] [InstCombine] fold commutative binop with const into select (PR #183692)   via llvm-commits
• [llvm] [LV] Support interleaving with conditional scalar assignments (PR #184099)   via llvm-commits
• [llvm] [LV] Support interleaving with conditional scalar assignments (PR #184099)   via llvm-commits
• [llvm] [WebAssembly] Fold extended vector shifts by constant to extmul (PR #184007)   via llvm-commits
• [llvm] Support CSA for floating-point & pointer types (PR #184101)   via llvm-commits
• [llvm] Support CSA for floating-point & pointer types (PR #184101)   via llvm-commits
• [llvm] Support CSA for floating-point & pointer types (PR #184101)   via llvm-commits
• [llvm] Support CSA for floating-point & pointer types (PR #184101)   via llvm-commits
• [llvm] [WebAssembly] Fold extended vector shifts by constant to extmul (PR #184007)   via llvm-commits
• [llvm] 4738391 - [AArch64][NFC] Remove unused parameters for `performORCombine` (#184075)   via llvm-commits
• [llvm] [VPlan] Replicate VPScalarIVStepsRecipe by VF outside replicate regions. (PR #170053)   via llvm-commits
• [llvm] [VPlan] Replicate VPScalarIVStepsRecipe by VF outside replicate regions. (PR #170053)   via llvm-commits
• [llvm] [VPlan] Replicate VPScalarIVStepsRecipe by VF outside replicate regions. (PR #170053)   via llvm-commits
• [llvm] [VPlan] Replicate VPScalarIVStepsRecipe by VF outside replicate regions. (PR #170053)   via llvm-commits
• [llvm] [VPlan] Replicate VPScalarIVStepsRecipe by VF outside replicate regions. (PR #170053)   via llvm-commits
• [llvm] [VPlan] Replicate VPScalarIVStepsRecipe by VF outside replicate regions. (PR #170053)   via llvm-commits
• [llvm] [VPlan] Replicate VPScalarIVStepsRecipe by VF outside replicate regions. (PR #170053)   via llvm-commits
• [llvm] [VPlan] Replicate VPScalarIVStepsRecipe by VF outside replicate regions. (PR #170053)   via llvm-commits
• [llvm] [VPlan] Replicate VPScalarIVStepsRecipe by VF outside replicate regions. (PR #170053)   via llvm-commits
• [llvm] [VPlan] Replicate VPScalarIVStepsRecipe by VF outside replicate regions. (PR #170053)   via llvm-commits
• [llvm] [VPlan] Replicate VPScalarIVStepsRecipe by VF outside replicate regions. (PR #170053)   via llvm-commits
• [llvm] [LV] Support interleaving with conditional scalar assignments (PR #184099)   via llvm-commits
• [llvm] [LV] Support interleaving with conditional scalar assignments (PR #184099)   via llvm-commits
• [llvm] [WebAssembly] Fold extended vector shifts by constant to extmul (PR #184007)   via llvm-commits
• [llvm] [WebAssembly] Fold extended vector shifts by constant to extmul (PR #184007)   via llvm-commits
• [llvm] 82a1905 - InstCombine: Pass SimplifyQuery through SimplifyDemandedFPClass (#184096)   via llvm-commits
• [llvm] [VectorCombine] Optimize vector combine in fold binop of reduction (PR #179416)   via llvm-commits
• [llvm] d2b6a5a - [LLVM][NVPTX] Fix infinite legalization loop in tcgen05.st (#183012)   via llvm-commits
• [llvm] [IR] Return bool from replaceUsesWithIf() (PR #184107)   via llvm-commits
• [llvm] Revert "[VPlan] Remove unused VPExpandSCEVRecipe before expansion" (PR #184108)   via llvm-commits
• [llvm] [VectorCombine] Optimize vector combine in fold binop of reduction (PR #179416)   via llvm-commits
• [llvm] Revert "[VPlan] Remove unused VPExpandSCEVRecipe before expansion" (PR #184108)   via llvm-commits
• [llvm] [WebAssembly] Fold extended vector shifts by constant to extmul (PR #184007)   via llvm-commits
• [llvm] [WebAssembly] Fold extended vector shifts by constant to extmul (PR #184007)   via llvm-commits
• [llvm] b39247c - [AMDGPU] Fix typo "PGRM" in variable name. NFC. (#184104)   via llvm-commits
• [llvm] [WebAssembly] Fold extended vector shifts by constant to extmul (PR #184007)   via llvm-commits
• [llvm] [WebAssembly] Fold extended vector shifts by constant to extmul (PR #184007)   via llvm-commits
• [llvm] [WebAssembly] Fold extended vector shifts by constant to extmul (PR #184007)   via llvm-commits
• [llvm] [WebAssembly] Fold extended vector shifts by constant to extmul (PR #184007)   via llvm-commits
• [lld] [RISCV][LLD] Zcmt RISC-V extension in lld (PR #183450)   via llvm-commits
• [llvm] [WebAssembly] Fold extended vector shifts by constant to extmul (PR #184007)   via llvm-commits
• [llvm] 60fec80 - Revert "[VPlan] Remove unused VPExpandSCEVRecipe before expansion" (#184108)   via llvm-commits
• [llvm] [ObjCARC] Don't sink objc_retain past releasing atomics (PR #184113)   via llvm-commits
• [lld] [RISCV][LLD] Zcmt RISC-V extension in lld (PR #183450)   via llvm-commits
• [llvm] Reapply "[AMDGPU] Elide bitcast fold i64 imm to build_vector" (#160325) (PR #184114)   via llvm-commits
• [llvm] [CVP] Stop CVP constant propagation from destroying `llvm.assume` (PR #183688)   via llvm-commits
• [llvm] [DAG] ISD::matchUnaryPredicate / matchUnaryFpPredicate / matchBinaryPredicate - add DemandedElts variant (PR #183013)   via llvm-commits
• [llvm] ce79fb3 - [InstCombine] Always fold nonnull assumptions into operand bundles (#169923)   via llvm-commits
• [llvm] [DAG] ISD::matchUnaryPredicate / matchUnaryFpPredicate / matchBinaryPredicate - add DemandedElts variant (PR #183013)   via llvm-commits
• [llvm] bcc272b - [LV] Remove DataAndControlFlowWithoutRuntimeCheck. NFC (#183762)   via llvm-commits
• [llvm] [RISCV] Handle Zvabd and XRivosVizip EEWs in RISCVVLOptimizer (PR #184117)   via llvm-commits
• [llvm] 4af885c - [AArch64] Fix performZExtUZPCombine() DAG combine (#183765)   via llvm-commits
• [lldb] [llvm] [lldb][docs] Document AArch64 Linux Permission Overlay support (PR #184119)   via llvm-commits
• [llvm] [NFC][SPIRV] Rename `selectSelectDefaultArgs` to `selectExtendBool` (PR #184120)   via llvm-commits
• [llvm] 4a907a5 - [CMake] Add LLVM_ENABLE_WARNING_SUPPRESSIONS to toggle warning suppressions (#183439)   via llvm-commits
• [llvm] [CMake] Add LLVM_ENABLE_WARNING_SUPPRESSIONS to toggle warning suppressions (PR #183439)   via llvm-commits
• [llvm] 9d5ca52 - [IR] Return bool from replaceUsesWithIf() (#184107)   via llvm-commits
• [llvm] [AMDGPU] IGroupLP: Refactor SchedGroup::initSchedGroup (NFC) (PR #184122)   via llvm-commits
• [llvm] InstCombine: Baseline tests for SimplifyDemandedFPClass phi support (PR #184123)   via llvm-commits
• [llvm] Revert "Avoid maxnum(sNaN, x) optimizations / folds (#170181)" (PR #184125)   via llvm-commits
• [llvm] Revert "Avoid maxnum(sNaN, x) optimizations / folds (#170181)" (PR #184125)   via llvm-commits
• [clang] [llvm] [OpenMP] Use CreatePtrDiff() (PR #184127)   via llvm-commits
• [llvm] [LoopVectorize] Fix crash with GC statepoint in epilogue vectorization (PR #179459)   via llvm-commits
• [llvm] [CVP] Stop CVP constant propagation from destroying `llvm.assume` (PR #183688)   via llvm-commits
• [flang] [llvm] [flang] [flang-rt] Addition of the Fortran 2023 TOKENIZE intrinsic. (PR #181030)   via llvm-commits
• [llvm] cca5bb5 - [OpenMP] Use CreatePtrDiff() (#184127)   via llvm-commits
• [clang] [flang] [llvm] [flang] Add runtime trampoline pool for W^X compliance (PR #183108)   via llvm-commits
• [clang] [flang] [llvm] [flang] Add runtime trampoline pool for W^X compliance (PR #183108)   via llvm-commits
• [clang] [flang] [llvm] [flang] Add runtime trampoline pool for W^X compliance (PR #183108)   via llvm-commits
• [clang] [flang] [llvm] [flang] Add runtime trampoline pool for W^X compliance (PR #183108)   via llvm-commits
• [llvm] [AMDGPU] Exec-protect regular VGPR spill saves under narrowed exec (PR #184135)   via llvm-commits
• [llvm] [AMDGPU] Implement LSR cost model for GFX9+ (PR #184138)   via llvm-commits
• [llvm] 8da1bb8 - Reapply "[AMDGPU] Elide bitcast fold i64 imm to build_vector" (#160325) (#184114)   via llvm-commits
• [llvm] [AMDGPU] Implement LSR cost model for GFX9+ (PR #184138)   via llvm-commits
• [llvm] [AMDGPU] IGroupLP: Refactor SchedGroup::initSchedGroup (NFC) (PR #184122)   via llvm-commits
• [llvm] [ARM] Add basic NPM support for LoadStoreOptimizer (PR #184139)   via llvm-commits
• [llvm] [AMDGPU] Implement LSR cost model for GFX9+ (PR #184138)   via llvm-commits
• [llvm] [AMDGPU] Implement LSR cost model for GFX9+ (PR #184138)   via llvm-commits
• [llvm] [llvm] Turn misc copy-assign to move-assign (PR #184143)   via llvm-commits
• [lld] [lld] Turn misc copy-assign to move-assign (PR #184145)   via llvm-commits
• [llvm] [llvm] Turn misc copy-assign to move-assign (PR #184143)   via llvm-commits
• [llvm] [llvm] Turn misc copy-assign to move-assign (PR #184143)   via llvm-commits
• [llvm] [llvm] Turn misc copy-assign to move-assign (PR #184143)   via llvm-commits
• [lld] [lld] Turn misc copy-assign to move-assign (PR #184145)   via llvm-commits
• [lld] [lld] Turn misc copy-assign to move-assign (PR #184145)   via llvm-commits
• [lld] [lld] Turn misc copy-assign to move-assign (PR #184145)   via llvm-commits
• [lld] [lld] Turn misc copy-assign to move-assign (PR #184145)   via llvm-commits
• [llvm] dfcbf6c - [CVP] Stop CVP constant propagation from destroying `llvm.assume` (#183688)   via llvm-commits
• [llvm] [CVP] Stop CVP constant propagation from destroying `llvm.assume` (PR #183688)   via llvm-commits
• [llvm] AMDGPU: Stop copying triple into AMDGPUSubtarget (PR #184147)   via llvm-commits
• [llvm] [AMDGPU] Implement LSR cost model for GFX9+ (PR #184138)   via llvm-commits
• [llvm] [ObjCARC] Run ObjCARCContract before PreISelIntrinsicLowering (PR #184149)   via llvm-commits
• [llvm] [ObjCARC] Run ObjCARCContract before PreISelIntrinsicLowering (PR #184149)   via llvm-commits
• [llvm] [PowerPC] Add mnemonics to paddis (PR #179979)   via llvm-commits
• [llvm] [ARM] Add basic NPM support for LoadStoreOptimizer (PR #184139)   via llvm-commits
• [llvm] bc0af99 - [TableGen] Allow specification of underlying type for GenericEnum (#183769)   via llvm-commits
• [llvm] 4f84347 - [llvm-ir2vec] Adding Inst Embeddings Map API to ir2vec python bindings (#180140)   via llvm-commits
• [flang] [llvm] [flang][OpenMP] Support custom mappers in target update to/from clauses (PR #169673)   via llvm-commits
• [llvm] a8fb8eb - AMDGPU: Stop copying triple into AMDGPUSubtarget (#184147)   via llvm-commits
• [llvm] bd02c17 - [X86] known-never-zero.ll - add shift right vector test coverage for #183577 (#184140)   via llvm-commits
• [llvm] [AArch64] Fix type mismatch in bitconvert + vec_extract patterns (PR #183549)   via llvm-commits
• [llvm] [RISCV] Sink instructions so AVL dominates in RISCVVLOptimizer (PR #184155)   via llvm-commits
• [llvm] [llvm-objdump] Default --symbolize-operands for BPF (PR #184043)   via llvm-commits
• [llvm] [llvm-objdump] Default --symbolize-operands for BPF (PR #184043)   via llvm-commits
• [llvm] 6413951 - [X86] known-never-zero.ll - remove unnecessary declarations (#184142)   via llvm-commits
• [clang] [llvm] [Clang][CodeGen] Add -gbtf: target-independent BTF emission for ELF targets (PR #183929)   via llvm-commits
• [llvm] [MC] Support specifying unwind handler in Masm proc directive (PR #181152)   via llvm-commits
• [llvm] [AArch64] Extend index load/store optimization to support store instructions (PR #177869)   via llvm-commits
• [llvm] [X86] Fix definition of VCVTNE2PS2BF16, make it SchedWriteCvtPS2BF (PR #177792)   via llvm-commits
• [llvm] [ARM] Custom Lowering for SADDO_CARRY and SSUBO_CARRY (PR #154419)   via llvm-commits
• [llvm] [WebAssembly] Fold extended vector shifts by constant to extmul (PR #184007)   via llvm-commits
• [llvm] [WebAssembly] Fold extended vector shifts by constant to extmul (PR #184007)   via llvm-commits
• [llvm] [ValueTracking] Int vector reductions propagate noundef (PR #184173)   via llvm-commits
• [llvm] [ValueTracking] Int vector reductions propagate noundef (PR #184173)   via llvm-commits
• [llvm] [WebAssembly] Fold extended vector shifts by constant to extmul (PR #184007)   via llvm-commits
• [clang] [llvm] [AArch64][clang][llvm] Add ACLE `stshh` atomic store builtin (PR #181386)   via llvm-commits
• [llvm] [AMDGPU][SIInsertWaitcnts] WaitEventSet const_iterator (PR #182965)   via llvm-commits
• [clang] [lld] [llvm] [mlir] Revert "[CMake] Use keyword signature in two additional callsites (#1… (PR #184186)   via llvm-commits
• [llvm] InstCombine: recognize rotate patterns using ~X (PR #173200)   via llvm-commits
• [llvm] [DAG] isKnownNeverZero - add ISD::UADDSAT/UMAX/UMIN DemandedElts handling and tests (PR #183992)   via llvm-commits
• [llvm] [DAG] Fold SETCC against isKnownNeverZero (PR #184010)   via llvm-commits
• [llvm] [DAG] isKnownNeverZero - add ISD::UADDSAT/UMAX/UMIN DemandedElts handling and tests (PR #183992)   via llvm-commits
• [libc] [llvm] [libc][math] Implement C23 half precision pow function (PR #159906)   via llvm-commits
• [clang] [lld] [llvm] [mlir] [CMake] Propagate dependencies to OBJECT libraries in add_llvm_library (re-land) (PR #184201)   via llvm-commits
• [clang] [lld] [llvm] [mlir] [CMake] Propagate dependencies to OBJECT libraries in add_llvm_library (re-land) (PR #184201)   via llvm-commits
• [llvm] [DAG] Fold SETCC against isKnownNeverZero (PR #184010)   via llvm-commits
• [libc] [llvm] [libc][math][c23] Add hypotbf16 function (PR #183460)   via llvm-commits
• [llvm] fb6038d - [DAG] isKnownNeverZero - add ISD::SRA/SRL DemandedElts handling and tests (#183577)   via llvm-commits
• [llvm] [DAG] isKnownNeverZero - add ISD::SRA/SRL DemandedElts handling and tests (PR #183577)   via llvm-commits
• [libc] [llvm] [libc][math][c23] Add hypotbf16 function (PR #183460)   via llvm-commits
• [libc] [llvm] [libc][math][c23] Add hypotbf16 function (PR #183460)   via llvm-commits
• [llvm] [DAG] isKnownNeverZero - add ISD::OR DemandedElts handling (PR #183228)   via llvm-commits
• [llvm] [DAG] isKnownNeverZero - add ISD::OR DemandedElts handling (PR #183228)   via llvm-commits
• [libc] [llvm] [libc][math][c23] Add hypotbf16 function (PR #183460)   via llvm-commits
• [llvm] 0cabe93 - [HLSL] Reintroduce dx.disable_optimizations to set DisableOptimization Shader Flag (#180069)   via llvm-commits
• [clang] [llvm] [HLSL] Reintroduce dx.disable_optimizations to set DisableOptimization Shader Flag (PR #180069)   via llvm-commits
• [llvm] [WebAssembly][FastISel] Call materializeLoadStoreOperands in load fold (PR #184203)   via llvm-commits
• [llvm] [WebAssembly][FastISel] Call materializeLoadStoreOperands in load fold (PR #184203)   via llvm-commits
• [llvm] [WebAssembly][FastISel] Emit signed loads for sext of i8/i16/i32 (PR #182767)   via llvm-commits
• [clang] [lld] [llvm] [mlir] [CMake] Propagate dependencies to OBJECT libraries in add_llvm_library (re-land) (PR #184201)   via llvm-commits
• [clang] [lld] [llvm] [mlir] [CMake] Propagate dependencies to OBJECT libraries in add_llvm_library (re-land) (PR #184201)   via llvm-commits
• [llvm] 973f760 - [HWASan] [MTE] support double lifetime.end in same BB   via llvm-commits
• [libc] [llvm] [libc][math][c23] Add hypotbf16 function (PR #183460)   via llvm-commits
• [llvm] [InstCombine] Fold icmp ne with zero to trunc for single-bit values (PR #184025)   via llvm-commits
• [llvm] ed524ba - [llvm] Avoid resolving `.incbin` during symbol collection (#172920)   via llvm-commits
• [llvm] [SPIRV] Don't emit service function basic block names (PR #184206)   via llvm-commits
• [llvm] [VPlan][NFC] Remove unnecessary explicit copy constructors (PR #183863)   via llvm-commits
• [llvm] [SelectionDAG] Preserver poison for abs INT_MIN lowering (PR #183851)   via llvm-commits
• [llvm] [SelectionDAG] Preserver poison for abs INT_MIN lowering (PR #183851)   via llvm-commits
• [llvm] [VPlan][NFC] Remove unnecessary explicit copy constructors (PR #183863)   via llvm-commits
• [llvm] [Github] Enable long paths in windows CI Container (PR #184224)   via llvm-commits
• [llvm] a4d7866 - [lldb][ARM] Support thread local variables on ARM Linux (#181315)   via llvm-commits
• [llvm] [utils] use annotations from __future__ in lit (PR #184225)   via llvm-commits
• [llvm] [CodeGen] Keep physreg copies when successors use-before-def (PR #182732)   via llvm-commits
• [llvm] [CodeGen] Keep physreg copies when successors use-before-def (PR #182732)   via llvm-commits
• [clang] [llvm] [HLSL] Add WaveActiveAllEqual functions (PR #183634)   via llvm-commits
• [compiler-rt] [scudo] Move getResidentPages function (PR #183138)   via llvm-commits
• [compiler-rt] [scudo] Move getResidentPages function (PR #183138)   via llvm-commits
• [llvm] [LoopUnrollAndJam] Drop ExplicitUnroll check from computeUnrollAndJamCount (PR #184239)   via llvm-commits
• [llvm] Revert "[OpenMP][Offload] Handle `present/to/from` when a different entry did `alloc/delete`." (PR #184240)   via llvm-commits
• [llvm] [AMDGPU] Generate more swaps (PR #184164)   via llvm-commits
• [llvm] [RISCV] Promote i8/i16/i32 scalable vector CLMUL to i64 CLMUL with Zvbc. (PR #184265)   via llvm-commits
• [llvm] [RISCV] Promote i8/i16/i32 scalable vector CLMUL to i64 CLMUL with Zvbc. (PR #184265)   via llvm-commits
• [llvm] [SelectionDAG] Preserver poison for abs INT_MIN lowering (PR #183851)   via llvm-commits
• [llvm] [NFC][OpenMP] Remove redundant prints in `target` regions from tests added in #184260. (PR #184266)   via llvm-commits
• [llvm] [SelectionDAG] Preserver poison for abs INT_MIN lowering (PR #183851)   via llvm-commits
• [llvm] [AMDGPU] Add folding ISD::SELECT from vXiY into vZi32 with X * Y = Z * 32 (PR #173328)   via llvm-commits
• [clang] [llvm] [OpenMP][clang] Indirect and Virtual function call mapping from host to device (PR #159857)   via llvm-commits
• [llvm] [AArch64] Add basic NPM support for LoadStoreOptimizer. (PR #184090)   via llvm-commits
• [llvm] [LoopSimplifyCFG] Added the judgment whether the loop is in LoopSimplifyForm (PR #112845)   via llvm-commits
• [llvm] [X86] Emit user-friendly error for x86_fp80 with x87 disabled on x86_64 (PR #183932)   via llvm-commits
• [llvm] [X86] Emit user-friendly error for x86_fp80 with x87 disabled on x86_64 (PR #183932)   via llvm-commits
• [llvm] [llvm-gsymutil] Replace truncated DWARF names with mangled names from symbol table (PR #184221)   via llvm-commits
• [llvm] [llvm-gsymutil] Replace truncated DWARF names with mangled names from symbol table (PR #184221)   via llvm-commits
• [llvm] [llvm-gsymutil] Replace truncated DWARF names with mangled names from symbol table (PR #184221)   via llvm-commits
• [llvm] [llvm-gsymutil] Replace truncated DWARF names with mangled names from symbol table (PR #184221)   via llvm-commits
• [llvm] 5a53fce - [RISCV] Extends RISCVMoveMerger to merge GPRPairs independent of even/odd pair instruction order. (#183657)   via llvm-commits
• [llvm] [AMDGPU] Reschedule loads in clauses to improve throughput (PR #102595)   via llvm-commits
• [lld] [llvm] [lld][DebugInfo/BTF] Add BTF section merging and deduplication (PR #183915)   via llvm-commits
• [compiler-rt] eba4a76 - [CFI] Expand test to include minimal runtime (#183646)   via llvm-commits
• [llvm] [WebAssembly][FastISel] Call materializeLoadStoreOperands in load fold (PR #184203)   via llvm-commits
• [llvm] [WebAssembly][FastISel] Call materializeLoadStoreOperands in load fold (PR #184203)   via llvm-commits
• [llvm] 30fc31a - [NFC][TableGen] Add deleted copy operations for RAII guard classes (#184168)   via llvm-commits
• [llvm] d20395c - [LegalizeVectorOps][RISCV][PowerPC][AArch64][X86] Enable the clmul/clmulr/clmulh expansion code. (#184257)   via llvm-commits
• [llvm] e4def2d - [AMDGPU] Make the options consistent across 3 RA pipelines(NFC) (#184190)   via llvm-commits
• [libc] [llvm] [libc][math][c23] Add asinbf16 math function (PR #184170)   via llvm-commits
• [llvm] [RISCV][NFC] Prepare for Short Forward Branch of branches with immediates (PR #182456)   via llvm-commits
• [llvm] [RISCV][NFC] Prepare for Short Forward Branch of branches with immediates (PR #182456)   via llvm-commits
• [llvm] [AMDGPU][InstCombine] Fold unused m0 operand to poison for sendmsg intrinsics (PR #183755)   via llvm-commits
• [llvm] [AMDGPU][InstCombine] Fold unused m0 operand to poison for sendmsg intrinsics (PR #183755)   via llvm-commits
• [llvm] [llvm] Turn misc copy-assign to move-assign (PR #184143)   via llvm-commits
• [llvm] [InstCombine] fold commutative binop with const into select (PR #183692)   via llvm-commits
• [llvm] 0504af9 - [llvm] Turn misc copy-assign to move-assign (#184143)   via llvm-commits
• [llvm] [llvm] Turn misc copy-assign to move-assign (PR #184143)   via llvm-commits
• [llvm] [InstCombine] fold commutative binop with const into select (PR #183692)   via llvm-commits
• [llvm] [InstCombine] fold binop with const into select for all operands (PR #183692)   via llvm-commits
• [llvm] [InstCombine] fold binop with const into select for all operands (PR #183692)   via llvm-commits
• [llvm] [InstCombine] make `foldBinOpIntoSelectOrPhi` fold on all operands (PR #183692)   via llvm-commits
• [llvm] [LoopReduceMotion] Improve loop by extract reduction instruction (PR #179215)   via llvm-commits
• [llvm] [NFC][SPARC] Add proper flags for instruction definitions (PR #182840)   via llvm-commits
• [llvm] [X86] Added sincos vector lib codegen test coverage (PR #183702)   via llvm-commits
• [llvm] [SelectionDAG] Preserver poison for abs INT_MIN lowering (PR #183851)   via llvm-commits
• [llvm] f67c2cd - [RISCV] Handle Zvabd and XRivosVizip EEWs in RISCVVLOptimizer (#184117)   via llvm-commits
• [llvm] 78ac964 - [RISCV][NFC] Prepare for Short Forward Branch of branches with immediates (#182456)   via llvm-commits
• [llvm] [RISCV][NFC] Prepare for Short Forward Branch of branches with immediates (PR #182456)   via llvm-commits
• [llvm] [X86] Remove LOW32_ADDR_ACCESS_RBP RegisterClass (PR #165018)   via llvm-commits
• [llvm] [WebAssembly] Fold extended vector shifts by constant to extmul (PR #184007)   via llvm-commits
• [llvm] [WebAssembly] Fold extended vector shifts by constant to extmul (PR #184007)   via llvm-commits
• [llvm] [WebAssembly] Fold extended vector shifts by constant to extmul (PR #184007)   via llvm-commits
• [lld] [RISCV][LLD] Zcmt RISC-V extension in lld (PR #183450)   via llvm-commits
• [llvm] [IR] LangRef: document behavior of double-lifetime.start (PR #184296)   via llvm-commits
• [llvm] [LoopReduceMotion] Improve loop by extract reduction instruction (PR #179215)   via llvm-commits
• [llvm] [LoopReduceMotion] Improve loop by extract reduction instruction (PR #179215)   via llvm-commits
• [llvm] [RISCV] Remove RISCVVectorPeephole::tryToReduceVL (PR #184297)   via llvm-commits
• [llvm] [LoopReduceMotion] Improve loop by extract reduction instruction (PR #179215)   via llvm-commits
• [llvm] [LoopReduceMotion] Improve loop by extract reduction instruction (PR #179215)   via llvm-commits
• [llvm] [LoopReduceMotion] Improve loop by extract reduction instruction (PR #179215)   via llvm-commits
• [llvm] [X86] Remove LOW32_ADDR_ACCESS_RBP RegisterClass (PR #165018)   via llvm-commits
• [llvm] [RISCV] Remove VL != 1 restriction in RISCVVLOptimizer (PR #184298)   via llvm-commits
• [llvm] [AMDGPU][InstCombine] Fold unused m0 operand to poison for sendmsg intrinsics (PR #183755)   via llvm-commits
• [llvm] eb1e808 - [IR] Mark reduction intrinsics as nocreateundeforpoison (#184173)   via llvm-commits
• [llvm] [DebugInfo] Fix segfault in constructSubprogramScopeDIE with null subprogram type (PR #184299)   via llvm-commits
• [llvm] [AArch64][PAC] Don't skip global legalization for AUTH_TCRETURN (PR #182513)   via llvm-commits
• [clang] [llvm] [AArch64][clang][llvm] Add ACLE `stshh` atomic store builtin (PR #181386)   via llvm-commits
• [llvm] [RISCV] Remove VL != 1 restriction in RISCVVLOptimizer (PR #184298)   via llvm-commits
• [llvm] 0933b63 - [AMDGPU] IGroupLP: Refactor SchedGroup::initSchedGroup (NFC) (#184122)   via llvm-commits
• [llvm] [AMDGPU][InstCombine] Fold unused m0 operand to poison for sendmsg intrinsics (PR #183755)   via llvm-commits
• [llvm] [AMDGPU][InstCombine] Fold unused m0 operand to poison for sendmsg intrinsics (PR #183755)   via llvm-commits
• [llvm] [AMDGPU][InstCombine] Fold unused m0 operand to poison for sendmsg intrinsics (PR #183755)   via llvm-commits
• [llvm] c4e2f79 - [AArch64][GlobalISel] Limit srem by const of small sizes. (#184066)   via llvm-commits
• [llvm] [AMDGPU][InstCombine] Fold unused m0 operand to poison for sendmsg intrinsics (PR #183755)   via llvm-commits
• [llvm] [RISCV] Fix type inference ambiguity in SwapSysReg pattern (PR #184305)   via llvm-commits
• [llvm] [RISCV] Fix type inference ambiguity in SwapSysReg pattern (PR #184305)   via llvm-commits
• [llvm] [RISCV] Fix type inference ambiguity in SwapSysReg pattern (PR #184305)   via llvm-commits
• [llvm] 39f2740 - [AMDGPU] IGroupLP: Avoid repeating reachability checks in greedy algorithm (#182463)   via llvm-commits
• [llvm] Enable LoopVectorizer interleaving for vectorized loops. (PR #184306)   via llvm-commits
• [llvm] [AArch64] Add C1-Nano scheduling model (PR #182316)   via llvm-commits
• [llvm] b4743b2 - [VPlan] Introduce VPlan::get(Zero|AllOnes) (NFC) (#184085)   via llvm-commits
• [llvm] 5d8c6c1 - [LangRef] Mention allocation elision (#177592)   via llvm-commits
• [llvm] [DAG] isKnownNeverZero - add ISD::UADDSAT/UMAX/UMIN DemandedElts handling and tests (PR #183992)   via llvm-commits
• [llvm] [AMDGPU][InstCombine] Fold unused m0 operand to poison for sendmsg intrinsics (PR #183755)   via llvm-commits
• [llvm] [DSE] Handle provenance when eliminating tautological assignments (PR #184311)   via llvm-commits
• [llvm] [SPIR-V] Complete SPV_INTEL_16bit_atomics extension support (PR #184312)   via llvm-commits
• [llvm] b4fffcd - [NFC][Docs] Add documentation for NVPTX conversion intrinsics (#175536)   via llvm-commits
• [llvm] 8879ff1 - Support unnamed functions in MIR parser (#183018)   via llvm-commits
• [llvm] Support unnamed functions in MIR parser (PR #183018)   via llvm-commits
• [llvm] Enable LoopVectorizer interleaving for vectorized loops. (PR #184306)   via llvm-commits
• [llvm] Enable LoopVectorizer interleaving for vectorized loops. (PR #184306)   via llvm-commits
• [llvm] [AArch64] Add C1-Nano scheduling model (PR #182316)   via llvm-commits
• [llvm] [AArch64] Ensure FPR128 callee-save stack offsets are aligned (PR #184314)   via llvm-commits
• [llvm] 03a9ebc - [DAG] isKnownNeverZero - add ISD::UADDSAT/UMAX/UMIN DemandedElts handling and tests (#183992)   via llvm-commits
• [llvm] [DAG] isKnownNeverZero - add ISD::UADDSAT/UMAX/UMIN DemandedElts handling and tests (PR #183992)   via llvm-commits
• [llvm] [DAG] isKnownNeverZero - add ISD::OR DemandedElts handling (PR #183228)   via llvm-commits
• [llvm] [AArch64] Limit support to f32 and f64 in performSelectCombine (PR #184315)   via llvm-commits
• [llvm] 0b36d42 - [AArch64] Add vector expansion support for ISD::FCBRT when using ArmPL (#183750)   via llvm-commits
• [libc] [llvm] [libc][math] Refactored atanpif16 to header only (PR #184316)   via llvm-commits
• [libc] [llvm] [libc][math] Refactored atanpif16 to header only (PR #184316)   via llvm-commits
• [llvm] [DAG] Improved handling of ISD::ROTL and ISD::ROTR in isKnownToBeAPowerOfTwo (PR #182744)   via llvm-commits
• [llvm] [DAG] Improved handling of ISD::ROTL and ISD::ROTR in isKnownToBeAPowerOfTwo (PR #182744)   via llvm-commits
• [llvm] 245887e - [X86] Added sincos vector lib codegen test coverage (#183702)   via llvm-commits
• [libc] [llvm] [libc][math] Refactored atanpif16 to header only (PR #184316)   via llvm-commits
• [libc] [llvm] [libc][math] Refactored atanpif16 to header only (PR #184316)   via llvm-commits
• [lld] [lld][MachO] Add N_COLD_FUNC support (PR #183909)   via llvm-commits
• [llvm] [AArch64] Fix type mismatch in bitconvert + vec_extract patterns (PR #183549)   via llvm-commits
• [llvm] 36cced2 - [NFC][AArch64] Refactor Arm llvm-mca tests (#183294)   via llvm-commits
• [llvm] [VPlan] Replicate VPScalarIVStepsRecipe by VF outside replicate regions. (PR #170053)   via llvm-commits
• [llvm] [VPlan] Replicate VPScalarIVStepsRecipe by VF outside replicate regions. (PR #170053)   via llvm-commits
• [llvm] [VPlan] Replicate VPScalarIVStepsRecipe by VF outside replicate regions. (PR #170053)   via llvm-commits
• [llvm] [VPlan] Replicate VPScalarIVStepsRecipe by VF outside replicate regions. (PR #170053)   via llvm-commits
• [llvm] 6ee48f2 - [RISCV] Remove VL != 1 restriction in RISCVVLOptimizer (#184298)   via llvm-commits
• [llvm] [Analysis][NFC] Store CallbackVH in vector, not in map (PR #184323)   via llvm-commits
• [llvm] [Analysis][NFC] Store CallbackVH in vector, not in map (PR #184323)   via llvm-commits
• [llvm] [LV] Add `-force-target-supports-masked-memory-ops` option (PR #184325)   via llvm-commits
• [llvm] Fold patterns which uses v4i32 type for equality comparison on v2i64 type (PR #184328)   via llvm-commits
• [llvm] [VPlan] Preserve IsSingleScalar for sunken predicated stores. (PR #184329)   via llvm-commits
• [llvm] [VPlan] Preserve IsSingleScalar for sunken predicated stores. (PR #184329)   via llvm-commits
• [llvm] [LV] Transform tests for early-exit with stores (PR #183288)   via llvm-commits
• [llvm] [LV] Transform tests for early-exit with stores (PR #183288)   via llvm-commits
• [libc] [llvm] [libc][math][c23] Add asinbf16 math function (PR #184170)   via llvm-commits
• [llvm] d908184 - [AArch64] Limit support to f32 and f64 in performSelectCombine (#184315)   via llvm-commits
• [llvm] 7036495 - [DAG] isKnownNeverZero - add ISD::OR DemandedElts handling (#183228)   via llvm-commits
• [llvm] [DAG] isKnownNeverZero - add ISD::OR DemandedElts handling (PR #183228)   via llvm-commits
• [llvm] fa6eef8 - Revert "Avoid maxnum(sNaN, x) optimizations / folds (#170181)" (#184125)   via llvm-commits
• [llvm] [AMDGPU] Legalize 64bit elements for BUILD_VECTOR on gfx942 (PR #145052)   via llvm-commits
• [llvm] [AMDGPU] Implement LSR cost model for GFX9+ (PR #184138)   via llvm-commits
• [llvm] [AMDGPU] Implement LSR cost model for GFX9+ (PR #184138)   via llvm-commits
• [llvm] [AMDGPU] Implement LSR cost model for GFX9+ (PR #184138)   via llvm-commits
• [llvm] [AMDGPU] Implement LSR cost model for GFX9+ (PR #184138)   via llvm-commits
• [llvm] [AMDGPU] Implement LSR cost model for GFX9+ (PR #184138)   via llvm-commits
• [llvm] [AMDGPU] Shrink S_MOV_B64 to S_MOV_B32 during rematerialization (PR #184333)   via llvm-commits
• [llvm] [AMDGPU] Implement LSR cost model for GFX9+ (PR #184138)   via llvm-commits
• [llvm] [AMDGPU] Shrink S_MOV_B64 to S_MOV_B32 during rematerialization (PR #184333)   via llvm-commits
• [llvm] Fix misspelling (PR #184335)   via llvm-commits
• [llvm] AMDGPU: Add more tests for fp min/max combines (PR #184336)   via llvm-commits
• [llvm] 534d6e8 - [Analysis][NFC] Store CallbackVH in vector, not in map (#184323)   via llvm-commits
• [lld] 33864ef - [lld] Turn misc copy-assign to move-assign (#184145)   via llvm-commits
• [lld] [lld] Turn misc copy-assign to move-assign (PR #184145)   via llvm-commits
• [llvm] [CodeGen] Add listener support to the rematerializer (NFC) (PR #184338)   via llvm-commits
• [llvm] [IVDescriptors] Reject FindLast candidates with loop invariant conditions (PR #184340)   via llvm-commits
• [llvm] [offload] Add properties parameter to olLaunchKernel (PR #184343)   via llvm-commits
• [llvm] [AArch64] Fix type mismatch in bitconvert + vec_extract patterns (PR #183549)   via llvm-commits
• [llvm] [AArch64] Fix type mismatch in bitconvert + vec_extract patterns (PR #183549)   via llvm-commits
• [llvm] [LV] Add `-force-target-supports-masked-memory-ops` option (PR #184325)   via llvm-commits
• [llvm] [AArch64] Fix type mismatch in bitconvert + vec_extract patterns (PR #183549)   via llvm-commits
• [llvm] bbde3e3 - [VPlan] Preserve IsSingleScalar for sunken predicated stores. (#184329)   via llvm-commits
• [llvm] [GlobalISel][LLT] Introduce FPInfo for LLT (Enable bfloat, ppc128float and others in GlobalISel) (PR #155107)   via llvm-commits
• [llvm] [AArch64][PAC] Don't skip global legalization for AUTH_TCRETURN (PR #182513)   via llvm-commits
• [llvm] [ARM] Create ConvertToComparesPass (PR #155530)   via llvm-commits
• [llvm] c782e2d - [SPIRV] Don't emit service function basic block names (#184206)   via llvm-commits
• [llvm] [GVN] Fix crash when svcount is used with globals-aa (PR #184347)   via llvm-commits
• [llvm] [NFC][AArch64] isPureCmp is a duplicate of canAdjustCmp, so remove the duplicate (PR #183568)   via llvm-commits
• [llvm] [AMDGPU] Insert readfirstlane for uniform VGPR arguments (PR #178198)   via llvm-commits
• [llvm] [GlobalISel][LLT] Introduce FPInfo for LLT (Enable bfloat, ppc128float and others in GlobalISel) (PR #155107)   via llvm-commits
• [llvm] [Loads] Allow replacement of null with ptr in `canReplacePointersIfEqual` (PR #184348)   via llvm-commits
• [flang] [llvm] [Flang] Adding lowering for the allocation and deallocation of coarrays (PR #182110)   via llvm-commits
• [flang] [llvm] [Flang] Adding lowering for the allocation and deallocation of coarrays (PR #182110)   via llvm-commits
• [flang] [llvm] [Flang] Adding lowering for the allocation and deallocation of coarrays (PR #182110)   via llvm-commits
• [flang] [llvm] [Flang] Adding lowering for the allocation and deallocation of coarrays (PR #182110)   via llvm-commits
• [flang] [llvm] [Flang] Adding lowering for the allocation and deallocation of coarrays (PR #182110)   via llvm-commits
• [flang] [llvm] [Flang] Adding lowering for the allocation and deallocation of coarrays (PR #182110)   via llvm-commits
• [flang] [llvm] [Flang] Adding lowering for the allocation and deallocation of coarrays (PR #182110)   via llvm-commits
• [flang] [llvm] [Flang] Adding lowering for the allocation and deallocation of coarrays (PR #182110)   via llvm-commits
• [flang] [llvm] [Flang] Adding lowering for the allocation and deallocation of coarrays (PR #182110)   via llvm-commits
• [flang] [llvm] [Flang] Adding lowering for the allocation and deallocation of coarrays (PR #182110)   via llvm-commits
• [flang] [llvm] [Flang] Adding lowering for the allocation and deallocation of coarrays (PR #182110)   via llvm-commits
• [llvm] [AArch64] Add support for mi/pl in ConditionOptimizer (PR #183533)   via llvm-commits
• [clang] [llvm] [LLVM][Support][NFCI] Register OptionCategory as const (PR #184352)   via llvm-commits
• [llvm] c9d065a - [X86] Add i256 shift / funnel shift coverage to match i512 tests (#184346)   via llvm-commits
• [llvm] Fix `assignValueToReg` function's argument (PR #184354)   via llvm-commits
• [llvm] Fix `assignValueToReg` function's argument (PR #184354)   via llvm-commits
• [llvm] [NFC][AArch64] isPureCmp is a duplicate of canAdjustCmp, so remove the duplicate (PR #183568)   via llvm-commits
• [llvm] [AMDGPU] Insert readfirstlane for uniform VGPR arguments (PR #178198)   via llvm-commits
• [flang] [llvm] [Flang] Adding lowering for the allocation and deallocation of coarrays (PR #182110)   via llvm-commits
• [flang] [llvm] [Flang] Adding lowering for the allocation and deallocation of coarrays (PR #182110)   via llvm-commits
• [llvm] [ARM] Create ConvertToComparesPass (PR #155530)   via llvm-commits
• [llvm] [ARM] Create ConvertToComparesPass (PR #155530)   via llvm-commits
• [llvm] [AMDGPU] Generate more swaps (PR #184164)   via llvm-commits
• [llvm] [ARM] Create ConvertToComparesPass (PR #155530)   via llvm-commits
• [llvm] acb8a6d - [AArch64] Fix type mismatch in bitconvert + vec_extract patterns (#183549)   via llvm-commits
• [llvm] [AArch64] Fix type mismatch in bitconvert + vec_extract patterns (PR #183549)   via llvm-commits
• [llvm] [ARM] Create ConvertToComparesPass (PR #155530)   via llvm-commits
• [llvm] [LoopVectorize] Add regression test for issue #182646 (PR #184356)   via llvm-commits
• [llvm] [ARM] Create ConvertToComparesPass (PR #155530)   via llvm-commits
• [llvm] [LLVM][CodeGen][SVE] Improve isel for split vector bfloat conversions. (PR #184357)   via llvm-commits
• [libc] [llvm] [libc][math][c23] Add asinbf16 math function (PR #184170)   via llvm-commits
• [libc] [llvm] [libc][math][c23] Add asinbf16 math function (PR #184170)   via llvm-commits
• [llvm] [ARM] Create ConvertToComparesPass (PR #155530)   via llvm-commits
• [libc] [llvm] [libc][math][c23] Add asinbf16 math function (PR #184170)   via llvm-commits
• [libc] [llvm] [libc][math][c23] Add asinbf16 math function (PR #184170)   via llvm-commits
• [llvm] 81396eb - [AMDGPU] Generate more swaps (#184164)   via llvm-commits
• [llvm] [AMDGPU] Generate more swaps (PR #184164)   via llvm-commits
• [libc] [llvm] [libc][math][c23] Add asinbf16 math function (PR #184170)   via llvm-commits
• [llvm] [ARM] Create ConvertToComparesPass (PR #155530)   via llvm-commits
• [libc] [llvm] [libc][math][c23] Add asinbf16 math function (PR #184170)   via llvm-commits
• [llvm] [ARM] Create ConvertToComparesPass (PR #155530)   via llvm-commits
• [llvm] 43503c4 - [NFC][AArch64] isPureCmp is a duplicate of canAdjustCmp, so remove the duplicate (#183568)   via llvm-commits
• [llvm] e10655e - [X86] known-never-zero.ll - add sdiv/udiv vector test coverage for #183047 (#184350)   via llvm-commits
• [llvm] [AArch64] Fix SVE cost model for various math intrinsics (PR #184358)   via llvm-commits
• [llvm] [VPlan] Add const to VPPredicator methods. nfc (PR #184359)   via llvm-commits
• [llvm] [Thumb2] Use BXAUT instruction if available (PR #183056)   via llvm-commits
• [libc] [llvm] [libc][math][c23] Add asinbf16 math function (PR #184170)   via llvm-commits
• [clang] [llvm] [HLSL][DXIL][SPIRV] QuadReadAcrossX intrinsic support (PR #184360)   via llvm-commits
• [clang] [llvm] [HLSL][DXIL][SPIRV] QuadReadAcrossX intrinsic support (PR #184360)   via llvm-commits
• [clang] [llvm] [HLSL][DXIL][SPIRV] QuadReadAcrossX intrinsic support (PR #184360)   via llvm-commits
• [llvm] [ARM] Create ConvertToComparesPass (PR #155530)   via llvm-commits
• [clang] [llvm] [HLSL][DXIL][SPIRV] QuadReadAcrossX intrinsic support (PR #184360)   via llvm-commits
• [llvm] [AMDGPU] Don't cluster lds instrs together (PR #180908)   via llvm-commits
• [clang] [llvm] [clang] Add `-verify-directives` cc1 flag (PR #179835)   via llvm-commits
• [clang] [llvm] [clang] Add `-verify-directives` cc1 flag (PR #179835)   via llvm-commits
• [llvm] [AMDGPU] Don't cluster lds instrs together (PR #180908)   via llvm-commits
• [libc] [llvm] [libc][math][c23] Add asinbf16 math function (PR #184170)   via llvm-commits
• [llvm] [CI][SPIRV][NFC] Remove unneccessary mkdir from workflow (PR #184353)   via llvm-commits
• [llvm] [AArch64][NFC] Remove unused TRI member from class (PR #184363)   via llvm-commits
• [llvm] [AArch64][NFC] Remove unused TRI member from class (PR #184363)   via llvm-commits
• [llvm] [GlobalISel][LLT] Introduce FPInfo for LLT (Enable bfloat, ppc128float and others in GlobalISel) (PR #155107)   via llvm-commits
• [llvm] [ARM] Create ConvertToComparesPass (PR #155530)   via llvm-commits
• [llvm] [InstCombine] Don't strip leading zero index for overaligned vector GEP (PR #184364)   via llvm-commits
• [llvm] 02b2a1e - Fix `assignValueToReg` function's argument (#184354)   via llvm-commits
• [llvm] Fix `assignValueToReg` function's argument (PR #184354)   via llvm-commits
• [llvm] [AArch64][NFC] Remove unused TRI member from class (PR #184363)   via llvm-commits
• [llvm] [ARM] Create ConvertToComparesPass (PR #155530)   via llvm-commits
• [llvm] [DAG] SelectionDAG::isKnownToBeAPowerOfTwo - add ISD::TRUNCATE handling and tests (PR #184365)   via llvm-commits
• [llvm] [DAG] SelectionDAG::isKnownToBeAPowerOfTwo - add ISD::TRUNCATE handling and tests (PR #184365)   via llvm-commits
• [llvm] [ARM] Create ConvertToComparesPass (PR #155530)   via llvm-commits
• [llvm] [DAG] SelectionDAG::isKnownToBeAPowerOfTwo - add ISD::TRUNCATE handling and tests (PR #184365)   via llvm-commits
• [llvm] [VPlan] Replicate VPScalarIVStepsRecipe by VF outside replicate regions. (PR #170053)   via llvm-commits
• [llvm] [VPlan] Replicate VPScalarIVStepsRecipe by VF outside replicate regions. (PR #170053)   via llvm-commits
• [llvm] [VPlan] Replicate VPScalarIVStepsRecipe by VF outside replicate regions. (PR #170053)   via llvm-commits
• [llvm] [VPlan] Replicate VPScalarIVStepsRecipe by VF outside replicate regions. (PR #170053)   via llvm-commits
• [llvm] [VPlan] Replicate VPScalarIVStepsRecipe by VF outside replicate regions. (PR #170053)   via llvm-commits
• [llvm] [VPlan] Replicate VPScalarIVStepsRecipe by VF outside replicate regions. (PR #170053)   via llvm-commits
• [llvm] aef9627 - Reapply "[SPIRV][NFCI] Use unordered data structures for SPIR-V extensions (#184162)   via llvm-commits
• [llvm] [ARM] Create ConvertToComparesPass (PR #155530)   via llvm-commits
• [llvm] [ARM] Create ConvertToComparesPass (PR #155530)   via llvm-commits
• [clang] [llvm] [X86] support reserve r8~r15 on X86_64 (PR #180242)   via llvm-commits
• [clang] [llvm] [X86] support reserve r8~r15 on X86_64 (PR #180242)   via llvm-commits
• [clang] [llvm] [X86] support reserve r8~r15 on X86_64 (PR #180242)   via llvm-commits
• [libc] [llvm] [libc][math][c23] Add asinbf16 math function (PR #184170)   via llvm-commits
• [llvm] [AMDGPU] Don't cluster lds instrs together (PR #180908)   via llvm-commits
• [llvm] [AMDGPU] Generate more swaps (PR #184164)   via llvm-commits
• [llvm] [ARM] Create ConvertToComparesPass (PR #155530)   via llvm-commits
• [llvm] 779d76c - [AArch64] Add basic NPM support for LoadStoreOptimizer. (#184090)   via llvm-commits
• [llvm] [ARM] Add basic NPM support for LoadStoreOptimizer (PR #184139)   via llvm-commits
• [llvm] [Github] Bump clang-format/clang-tidy to v22.1.0 (PR #184374)   via llvm-commits
• [libc] [llvm] [libc][math][c23] Add asinbf16 math function (PR #184170)   via llvm-commits
• [llvm] [AMDGPU][SIInsertWaitcnts][NFC] Move instruction collection into a separate function (PR #179358)   via llvm-commits
• [llvm] [AMDGPU][SIInsertWaitcnts][NFC] Move instruction collection into a separate function (PR #179358)   via llvm-commits
• [llvm] [AMDGPU][SIInsertWaitcnts][NFC] Move instruction collection into a separate function (PR #179358)   via llvm-commits
• [llvm] [bazel][mlir] Fix Bazel build for a232b5b (PR #184394)   via llvm-commits
• [llvm] c1bba5b - [VPlan][NFC] Remove unnecessary explicit copy constructors (#183863)   via llvm-commits
• [llvm] [X86] vector-shuffle-combining-xop.ll - tests showing failure to combine shuffles with non-uniform rotates (PR #184397)   via llvm-commits
• [llvm] [WebAssembly][FastISel] Call materializeLoadStoreOperands in load fold (PR #184203)   via llvm-commits
• [llvm] [WebAssembly] Fold extended vector shifts by constant to extmul (PR #184007)   via llvm-commits
• [llvm] [flang] [flang-rt] Subscript overrun could occur in namelists during a READ command. (PR #176959)   via llvm-commits
• [llvm] [AArch64][PAC] Don't skip global legalization for AUTH_TCRETURN (PR #182513)   via llvm-commits
• [compiler-rt] [sanitizer][Fuchsia] Define interceptor for reallocarray on Fuchsia (PR #184410)   via llvm-commits
• [compiler-rt] f42b8a1 - [sanitizer][Fuchsia] Define interceptor for reallocarray on Fuchsia (#184410)   via llvm-commits
• [llvm] 80acacc - [RISCV] Promote i8/i16/i32 scalable vector CLMUL to i64 CLMUL with Zvbc. (#184265)   via llvm-commits
• [llvm] [VPlan] Replicate VPScalarIVStepsRecipe by VF outside replicate regions. (PR #170053)   via llvm-commits
• [llvm] c5039c1 - [NFC] Refactor the SelectionDAG::getMemcmp etc with a existing helper function getRuntimeCallSDValueHelper (#184200)   via llvm-commits
• [lld] [lld][WebAssembly] Convert more tests to assembly. NFC (PR #184418)   via llvm-commits
• [llvm] [AMDGPU][AMDGPUBaseInfo] Replace Waitcnt members with array (PR #182927)   via llvm-commits
• [llvm] 17aaa0e - [VPlan] Use bitfield to store Cmp predicates and GEP wrap flags. (NFC) (#181571)   via llvm-commits
• [llvm] 8272546 - [HLSL][SPIRV] Fix `faceforward` pattern matcher logic (#183630)   via llvm-commits
• [llvm] [X86] getFauxShuffleMask - add ISD::ROTL/ROTR handling (PR #184417)   via llvm-commits
• [llvm] b4dfa43 - [RISCV] Fix type inference ambiguity in SwapSysReg pattern (#184305)   via llvm-commits
• [llvm] [RISCV] Fix type inference ambiguity in SwapSysReg pattern (PR #184305)   via llvm-commits
• [llvm] 5586d93 - [NFC] [HWASan] more meaningful BB names in use-after-scope test (#183867)   via llvm-commits
• [llvm] 9d0c62c - [X86] known-never-zero.ll - improve demandedelts test coverage for #183227 (#184411)   via llvm-commits
• [llvm] Revert "[IndVarsSimplify] sinkUnusedInvariants is skipping instructio… (PR #184436)   via llvm-commits
• [llvm] Revert "[IndVarsSimplify] sinkUnusedInvariants is skipping instructio… (PR #184436)   via llvm-commits
• [llvm] New AArch64CodeLayoutOpt pass for code layout optimizations. (PR #184434)   via llvm-commits
• [llvm] New AArch64CodeLayoutOpt pass for code layout optimizations. (PR #184434)   via llvm-commits
• [llvm] [VPlan] Explicitly check for wide IV in optimizeFindIVReductions. (PR #184437)   via llvm-commits
• [llvm] dc1e3e5 - [X86] getFauxShuffleMask - add ISD::ROTL/ROTR handling (#184417)   via llvm-commits
• [llvm] [IndVarSimplify] Kept additional nuw and nsw flags during LinearFunctionTestReplace (PR #177433)   via llvm-commits
• [llvm] [Hexagon] Add new register input/output types for qf instructions (PR #184398)   via llvm-commits
• [llvm] fdc4a98 - [AMDGPU] Add dereferenceable retAttr to a call to llvm.amdgcn.implicitarg.ptr (#182206)   via llvm-commits
• [llvm] [DAG] Simplify isKnownToBeAPowerOfTwo for ZERO_EXTEND (PR #182226)   via llvm-commits
• [llvm] [IndVarSimplify] Kept additional nuw and nsw flags during LinearFunctionTestReplace (PR #177433)   via llvm-commits
• [llvm] [SPIR-V] Don't consider a function be a builtin just by checking name (PR #182776)   via llvm-commits
• [llvm] [WebAssembly] Reapply "[WebAssembly] Incorporate SCCs into WebAssemblyFixIrreducibleControlFlow" (#181755) (PR #184441)   via llvm-commits
• [llvm] [PowerPC] Use lxvp/stxvp for v256i1 types (PR #184447)   via llvm-commits
• [llvm] [VPlan] Optimize FindLast of (binop %IV, live-in) by sinking. (PR #183911)   via llvm-commits
• [llvm] [VPlan] Preserve IsSingleScalar for hoisted predicated load. (PR #184453)   via llvm-commits
• [llvm] [SelectionDAG] Preserver poison for abs INT_MIN lowering (PR #183851)   via llvm-commits
• [llvm] [profcheck][coro] Adding Branch weights PGO in CoroSplit and CoroFrame Passes (PR #184466)   via llvm-commits
• [llvm] [Benchmark] Fix warnings around usage of __COUNTER__ (PR #184524)   via llvm-commits
• [clang] [llvm] [HLSL][DXIL] InterlockedOr and InterlockedOr64 builtins (PR #180804)   via llvm-commits
• [llvm] [third-party] Fix benchmark build error with Clang 22 (PR #184532)   via llvm-commits
• [llvm] [third-party] Fix benchmark build error with Clang 22 (PR #184532)   via llvm-commits
• [llvm] [third-party] Fix benchmark build error with Clang 22 (PR #184532)   via llvm-commits
• [llvm] [third-party] Fix benchmark build error with Clang 22 (PR #184532)   via llvm-commits
• [llvm] e808a7f - [RISCV][GISel] Replace buildInstr with BuildMI (#183714)   via llvm-commits
• [llvm] [LoopReduceMotion] Improve loop by extract reduction instruction (PR #179215)   via llvm-commits
• [llvm] [LoopReduceMotion] Improve loop by extract reduction instruction (PR #179215)   via llvm-commits
• [llvm] [X86] Remove LOW32_ADDR_ACCESS_RBP RegisterClass (PR #165018)   via llvm-commits
• [llvm] [AMDGPU] Add folding ISD::SELECT from vXiY into vZi32 with X * Y = Z * 32 (PR #173328)   via llvm-commits
• [llvm] Initial commit (PR #184546)   via llvm-commits
• [llvm] [InstCombine] Recognize non-negative subtraction patterns (PR #182597)   via llvm-commits
• [llvm] 5f29cdc - [RISCV] Remove OperandType OPERAND_SIMM10_UNSIGNED. Rename OPERAND_SIMM8_UNSIGNED->OPERAND_SIMM8 (#184540)   via llvm-commits
• [llvm] [InstCombine] Recognize non-negative subtraction patterns (PR #182597)   via llvm-commits
• [llvm] f5f0930 - [GVN] Fix crash when svcount is used with globals-aa (#184347)   via llvm-commits
• [llvm] [InstCombine] Recognize non-negative subtraction patterns (PR #182597)   via llvm-commits
• [llvm] Add symbol version support to llvm-ifs (PR #163030)   via llvm-commits
• [llvm] 348f4fb - [DA] Add tests that represent edge cases for the Weak Zero SIV tests (NFC) (#183735)   via llvm-commits
• [llvm] dd8d5ff - [RISCV] Sink instructions so AVL dominates in RISCVVLOptimizer (#184155)   via llvm-commits
• [llvm] [AMDGPU] Generate waterfall for calls with SGPR(inreg) argument (PR #146997)   via llvm-commits
• [llvm] [LoopUnroll][NVPTX] Boost full unroll threshold to enable local memory promotion (PR #184546)   via llvm-commits
• [llvm] [LoopUnroll][NVPTX] Boost full unroll threshold to enable local memory promotion (PR #184546)   via llvm-commits
• [llvm] [AMDGPU] Generate waterfall for calls with SGPR(inreg) argument (PR #146997)   via llvm-commits
• [llvm] [X86][APX] Add a few pseudo opcodes support EGPR (PR #184550)   via llvm-commits
• [llvm] 027447c - [MC][test] Add relax-branch-align.s demonstrating unnecessary branch relaxation (#184551)   via llvm-commits
• [lld] [ELF] Add target-specific relocation scanning for LoongArch (PR #182236)   via llvm-commits
• [llvm] [X86] Remove LOW32_ADDR_ACCESS_RBP RegisterClass (PR #165018)   via llvm-commits
• [lld] cd01e65 - [ELF] Add target-specific relocation scanning for LoongArch (#182236)   via llvm-commits
• [clang] [llvm] amd-debug merge candidate (PR #184553)   via llvm-commits
• [clang] [llvm] amd-debug merge candidate (PR #184553)   via llvm-commits
• [clang] [llvm] amd-debug merge candidate (PR #184553)   via llvm-commits
• [llvm] debb251 - [MC] Fuse relaxation and layout into a single forward pass (#184544)   via llvm-commits
• [llvm] [RISCV] Allow unsigned immediates for pli.h, pli.dh, pli.w (PR #184554)   via llvm-commits
• [llvm] [AArch64][PAC] Don't skip global legalization for AUTH_TCRETURN (PR #182513)   via llvm-commits
• [llvm] 6fae863 - [X86][APX] Add a few pseudo opcodes support EGPR (#184550)   via llvm-commits
• [llvm] [Windows][test] Fix "LLVM" test failures when LLVM_WINDOWS_PREFER_FORWARD_SLASH is ON (PR #184556)   via llvm-commits
• [llvm] [AArch64][PAC] Don't skip global legalization for AUTH_TCRETURN (PR #182513)   via llvm-commits
• [clang] [llvm] [X86] support reserve r8~r15 on X86_64 (PR #180242)   via llvm-commits
• [llvm] [InstCombine] Recognize non-negative subtraction patterns (PR #182597)   via llvm-commits
• [llvm] [AMDGPU] Don't cluster lds instrs together (PR #180908)   via llvm-commits
• [llvm] [VPlan] Add const to VPPredicator methods. nfc (PR #184359)   via llvm-commits
• [llvm] ae43867 - [DA] Remove consistent flag from Dependence class (#181608)   via llvm-commits
• [llvm] c612c98 - [VPlan] Add const to VPPredicator methods. nfc (#184359)   via llvm-commits
• [lld] [RISCV][LLD] Zcmt RISC-V extension in lld (PR #183450)   via llvm-commits
• [lld] [RISCV][LLD] Zcmt RISC-V extension in lld (PR #183450)   via llvm-commits
• [llvm] deb70a6 - [InstCombine] Don't strip leading zero index for overaligned vector GEP (#184364)   via llvm-commits
• [lld] [RISCV][LLD] Zcmt RISC-V extension in lld (PR #183450)   via llvm-commits
• [lld] [RISCV][LLD] Zcmt RISC-V extension in lld (PR #183450)   via llvm-commits
• [llvm] AMDGPU/GlobalISel: Lower G_EXTRACT in legalizer (PR #181036)   via llvm-commits
• [llvm] AMDGPU/GlobalISel: Lower G_EXTRACT in legalizer (PR #181036)   via llvm-commits
• [llvm] [AMDGPU][GlobalIsel] Add register bank legalization rules for amdgcn atomic fminmax num (PR #184564)   via llvm-commits
• [llvm] [AMDGPU][GlobalIsel] Add register bank legalization rules for amdgcn atomic fminmax num (PR #184564)   via llvm-commits
• [llvm] [X86] remove unnecessary movs when %rdx is an input to mulx (PR #184462)   via llvm-commits
• [llvm] [WebAssembly][FastISel] Fold AND mask operations into ZExt load (PR #183743)   via llvm-commits
• [llvm] [X86] remove unnecessary movs when %rdx is an input to mulx (PR #184462)   via llvm-commits
• [llvm] [LoongArch] Fix fptoui.sat miscompilation with NaN inputs (PR #179366)   via llvm-commits
• [clang] [llvm] [RISCV] Support 'f' Inline Assembly Constraint for bfloat16 (PR #184566)   via llvm-commits
• [compiler-rt] [scudo] Move getResidentPages function (PR #183138)   via llvm-commits
• [compiler-rt] [scudo] Move getResidentPages function (PR #183138)   via llvm-commits
• [compiler-rt] [scudo] Move getResidentPages function (PR #183138)   via llvm-commits
• [llvm] [RISCV] Add register overlap checks to the assembler for vector indexed segment load (PR #184569)   via llvm-commits
• [llvm] [RISCV] Add register overlap checks to the assembler for vector indexed segment load (PR #184569)   via llvm-commits
• [llvm] [RISCV] Add register overlap checks to the assembler for vector indexed segment load (PR #184569)   via llvm-commits
• [llvm] [WebAssembly][FastISel] Omit redundant AND for zext of i8/i16 loads (PR #182240)   via llvm-commits
• [llvm] [WebAssembly] Print type signature and table for call_indirect (PR #179120)   via llvm-commits
• [llvm] 3bb4a50 - [WebAssembly] Print type signature and table for call_indirect (#179120)   via llvm-commits
• [llvm] [WebAssembly] Print type signature and table for call_indirect (PR #179120)   via llvm-commits
• [llvm] [WebAssembly] Fix null Subtarget crash for addrspace(1) globals (PR #181536)   via llvm-commits
• [llvm] [AMDGPU] Implement LSR cost model for GFX9+ (PR #184138)   via llvm-commits
• [clang] [llvm] [RISCV] Support 'f' Inline Assembly Constraint for bfloat16 (PR #184566)   via llvm-commits
• [llvm] [RISCV] Add register overlap checks to the assembler for vector indexed segment load (PR #184569)   via llvm-commits
• [lld] c9355cc - [ELF] Move ArmCmseSGSection into Arch/ARM.cpp (#184570)   via llvm-commits
• [llvm] [AMDGPU] Implement LSR cost model for GFX9+ (PR #184138)   via llvm-commits
• [llvm] [AMDGPU] Implement LSR cost model for GFX9+ (PR #184138)   via llvm-commits
• [llvm] [InstCombine] make `foldBinOpIntoSelectOrPhi` fold on all operands (PR #183692)   via llvm-commits
• [llvm] [DSE] Handle provenance when eliminating tautological assignments (PR #184311)   via llvm-commits
• [llvm] b86f24f - [InstCombine] make `foldBinOpIntoSelectOrPhi` fold on all operands (#183692)   via llvm-commits
• [llvm] [Support] Move HTTP client/server to new LLVMSupportHTTP lib (NFC) (PR #184572)   via llvm-commits
• [llvm] [AMDGPU] Implement LSR cost model for GFX9+ (PR #184138)   via llvm-commits
• [llvm] [ARM] Generate test checks (NFC) (PR #184574)   via llvm-commits
• [llvm] [RISCV] Add register overlap checks to the assembler for vector indexed segment load (PR #184569)   via llvm-commits
• [llvm] 1a75025 - [ARM] Generate test checks (NFC) (#184574)   via llvm-commits
• [llvm] a636928 - [SelectionDAG] Add expansion for llvm.convert.from.arbitrary.fp (#179318)   via llvm-commits
• [llvm] 3d52f0c - [SPIR-V] Don't consider a function be a builtin just by checking name (#182776)   via llvm-commits
• [llvm] [SPIR-V] Add lowering of ptrtoaddr (PR #184577)   via llvm-commits
• [llvm] [GlobalISel] Combine sext(load), zext(load) patterns when the load has multiple uses (PR #182831)   via llvm-commits
• [llvm] [Support] Move HTTP client/server to new LLVMSupportHTTP lib (NFC) (PR #184572)   via llvm-commits
• [llvm] [Analysis] Extend llvm.experimental.cttz.elts to type-based-cost (PR #184578)   via llvm-commits
• [llvm] [Analysis] Extend llvm.experimental.cttz.elts to type-based-cost (PR #184578)   via llvm-commits
• [llvm] [RISCV] Add register overlap checks to the assembler for vector indexed segment load (PR #184569)   via llvm-commits
• [llvm] [RISCV] Add register overlap checks to the assembler for vector indexed segment load (PR #184569)   via llvm-commits
• [llvm] c62d5f3 - [AArch64] Avoid folding sign-extend of vector extracts into ALU ops (#183522)   via llvm-commits
• [llvm] [SelectionDAG] Use Karatsuba decomposition to expand vector CLMUL via narrower legal types (PR #184468)   via llvm-commits
• [libc] [llvm] [libc][math] Refactor bf16div to be header-only and constexpr (PR #181400)   via llvm-commits
• [llvm] [LLVM][Support][NFCI] Move default values out of the storage (PR #184581)   via llvm-commits
• [llvm] 177211a - [AArch64] Generate test checks (NFC) (#184582)   via llvm-commits
• [llvm] [Analysis] Extend llvm.experimental.cttz.elts to type-based-cost (PR #184578)   via llvm-commits
• [llvm] [Analysis] Extend llvm.experimental.cttz.elts to type-based-cost (PR #184578)   via llvm-commits
• [llvm] [SelectionDAG] Use Karatsuba decomposition to expand vector CLMUL via narrower legal types (PR #184468)   via llvm-commits
• [llvm] 2aab31a - [X86] combine-fcopysign.ll - extend test coverage to all x86-64/x86-64-v2/x86-64-v3/x86-64-v4 levels (#184579)   via llvm-commits
• [libc] [llvm] [libc][math] Refactor bf16div to be header-only and constexpr (PR #181400)   via llvm-commits
• [clang] [flang] [llvm] [flang] Add runtime trampoline pool for W^X compliance (PR #183108)   via llvm-commits
• [clang] [flang] [llvm] [flang] Add runtime trampoline pool for W^X compliance (PR #183108)   via llvm-commits
• [clang] [flang] [llvm] [flang] Add runtime trampoline pool for W^X compliance (PR #183108)   via llvm-commits
• [libc] [llvm] [libc][math] Refactor bf16div to be header-only and constexpr (PR #181400)   via llvm-commits
• [llvm] f702ee8 - [VPlan] Fix partially uninitialized accesses after 17aaa0e590a7. (#184583)   via llvm-commits
• [libc] [llvm] [libc][math] Refactor bf16div to be header-only and constexpr (PR #181400)   via llvm-commits
• [llvm] Revert [VPlan] Use bitfield to store Cmp predicates and GEP wrap flags (PR #184584)   via llvm-commits
• [llvm] [X86] Make ISD::ROTL/ROTR vector rotates legal on XOP+AVX512 targets (PR #184587)   via llvm-commits
• [llvm] [X86] Make ISD::ROTL/ROTR vector rotates legal on XOP+AVX512 targets (PR #184587)   via llvm-commits
• [llvm] [SDAGBuilder] Fix incorrect fcmp+select to minnum/maxnum transform (PR #184590)   via llvm-commits
• [llvm] [SDAGBuilder] Fix incorrect fcmp+select to minnum/maxnum transform (PR #184590)   via llvm-commits
• [llvm] [SDAGBuilder] Fix incorrect fcmp+select to minnum/maxnum transform (PR #184590)   via llvm-commits
• [llvm] d0f50d5 - [AMDGPU] Remove DX10_CLAMP and IEEE bits from gfx1170 (#182107)   via llvm-commits
• [llvm] [VPlan] Use VPlan::getZero to improve code (NFC) (PR #184591)   via llvm-commits
• [llvm] 943eb6f - [LV] Use make_early_inc_range in handleFindLastReductions (#184340)   via llvm-commits
• [llvm] [RISCV] Add register overlap checks to the assembler for vector indexed segment load (PR #184569)   via llvm-commits
• [llvm] [ARM] Use FPRegs for fastcc calling convention detection. (PR #184593)   via llvm-commits
• [llvm] [RISCV] Add register overlap checks to the assembler for vector indexed segment load (PR #184569)   via llvm-commits
• [llvm] AMDGPU: Fix copy of Triple (PR #184594)   via llvm-commits
• [llvm] [SystemZ] Mark fminimumnum/fmaximumnum as legal (PR #184595)   via llvm-commits
• [llvm] Reapply "[AArch64] Wrap integer SCALAR_TO_VECTOR nodes in bitcasts (#172837)" (#183380) (PR #184403)   via llvm-commits
• [llvm] [LLVM][Support] Move default values out of the storage (PR #184581)   via llvm-commits
• [llvm] [LLVM][Support] Move default values out of the storage (PR #184581)   via llvm-commits
• [llvm] Reapply "[AArch64] Wrap integer SCALAR_TO_VECTOR nodes in bitcasts (#172837)" (#183380) (PR #184403)   via llvm-commits
• [llvm] [BasicBlockUtils] Fixed LoopInfo update in UpdateAnalysisInformation() (PR #177147)   via llvm-commits
• [llvm] [AMDGPU][MC] Update old and add new min/max instructions for gfx1170 (PR #184601)   via llvm-commits
• [llvm] [VPlan] Move tail folding out of VPlanPredicator. NFC (PR #176143)   via llvm-commits
• [llvm] 8bb41c9 - AMDGPU: Fix copy of Triple (#184594)   via llvm-commits
• [llvm] [RISCV] Add findCommutedOpIndices support for Zvabd (PR #184602)   via llvm-commits
• [llvm] 98ed417 - [LV] Transform tests for early-exit with stores (#183288)   via llvm-commits
• [llvm] 5cf09a6 - [AArch64][ISel] Use vector register for scalar CLMUL (#183282)   via llvm-commits
• [clang] [llvm] [X86] Reduce -ffixed-r compile-time overhead (PR #184606)   via llvm-commits
• [clang] [llvm] [X86] Reduce -ffixed-r compile-time overhead (PR #184606)   via llvm-commits
• [clang] [llvm] [X86] Reduce -ffixed-r compile-time overhead (PR #184606)   via llvm-commits
• [clang] [llvm] [X86] Reduce -ffixed-r compile-time overhead (PR #184606)   via llvm-commits
• [clang] [llvm] [X86] Reduce -ffixed-r compile-time overhead (PR #184606)   via llvm-commits
• [clang] [llvm] [X86] Reduce -ffixed-r compile-time overhead (PR #184606)   via llvm-commits
• [llvm] [CI] Install binutils-dev in pre-merge container (PR #184608)   via llvm-commits
• [llvm] 21c1ba1 - [TableGen] Complete the support for artificial registers (#183371)   via llvm-commits
• [llvm] 71de1e4 - Reapply "[AArch64] Wrap integer SCALAR_TO_VECTOR nodes in bitcasts (#172837)" (#183380) (#184403)   via llvm-commits
• [llvm] Reapply "[AArch64] Wrap integer SCALAR_TO_VECTOR nodes in bitcasts (#172837)" (#183380) (PR #184403)   via llvm-commits
• [llvm] [AArch64] Add lowering for misc NEON intrinsics (PR #183050)   via llvm-commits
• [llvm] c6bb6a7 - [LV] Add `-force-target-supports-masked-memory-ops` option (#184325)   via llvm-commits
• [llvm] [AArch64] Add lowering for misc NEON intrinsics (PR #183050)   via llvm-commits
• [llvm] 073de3b - [SPIRV] Rename `selectSelectDefaultArgs` to `selectBoolToInt` (#184120)   via llvm-commits
• [llvm] [DAG] isKnownNeverZero - add ISD::ADD/SUB DemandedElts handling and tests (PR #183958)   via llvm-commits
• [llvm] [DAG] isKnownNeverZero - add ISD::ADD/SUB DemandedElts handling and tests (PR #183958)   via llvm-commits
• [llvm] [AArch64] Update clmul tests after #184403 (PR #184611)   via llvm-commits
• [clang] [llvm] [X86] Reduce -ffixed-r compile-time overhead (PR #184606)   via llvm-commits
• [llvm] [AMDGPU] Use subtarget feature for flat offset bit width instead of arch checks (PR #183742)   via llvm-commits
• [llvm] [AMDGPU] Use subtarget feature for flat offset bit width instead of arch checks (PR #183742)   via llvm-commits
• [llvm] [AMDGPU] Make chain functions receive a stack pointer (PR #184616)   via llvm-commits
• [llvm] [AMDGPU] Make chain functions receive a stack pointer (PR #184616)   via llvm-commits
• [llvm] [AArch64] Update clmul tests after #184403 (PR #184611)   via llvm-commits
• [llvm] [RISCV] Remove RISCVVectorPeephole::tryToReduceVL (PR #184297)   via llvm-commits
• [llvm] [RISCV] Remove RISCVVectorPeephole::tryToReduceVL (PR #184297)   via llvm-commits
• [llvm] [LV] Support float and pointer conditional scalar assignments (PR #184101)   via llvm-commits
• [llvm] [LV] Support float and pointer conditional scalar assignments (PR #184101)   via llvm-commits
• [llvm] c370f5a - [VPlan] Preserve IsSingleScalar for hoisted predicated load. (#184453)   via llvm-commits
• [llvm] 33be2d0 - [AArch64] Update clmul tests after #184403 (#184611)   via llvm-commits
• [flang] [llvm] [Flang] Adding lowering for the allocation and deallocation of coarrays (PR #182110)   via llvm-commits
• [llvm] [AArch64] Add lowering for misc NEON intrinsics (PR #183050)   via llvm-commits
• [llvm] [AMDGPU] Make chain functions receive a stack pointer (PR #184616)   via llvm-commits
• [llvm] [AMDGPU] Make chain functions receive a stack pointer (PR #184616)   via llvm-commits
• [llvm] [AArch64] Enabled and regenerate clmul-fixed.ll. NFC (PR #184628)   via llvm-commits
• [flang] [llvm] [Flang] Adding lowering for the allocation and deallocation of coarrays (PR #182110)   via llvm-commits
• [llvm] e5a6a0f - [SPIRV] Fix global emission for modules with no functions (#183833)   via llvm-commits
• [llvm] [AArch64] Add lowering for misc NEON intrinsics (PR #183050)   via llvm-commits
• [llvm] AMDGPU/GlobalISel: Regbanklegalize rules for G_PHI (PR #179735)   via llvm-commits
• [llvm] AMDGPU/GlobalISel: Regbanklegalize rules for G_PHI (PR #179735)   via llvm-commits
• [flang] [llvm] [Flang] Adding lowering for the allocation and deallocation of coarrays (PR #182110)   via llvm-commits
• [llvm] [SelectionDAG] Fix -Wunused-variable after #179318 (PR #184623)   via llvm-commits
• [llvm] [SelectionDAG] Fix -Wunused-variable after #179318 (PR #184623)   via llvm-commits
• [llvm] [AArch64] Fold setm with eor even if it is fcmp (PR #184445)   via llvm-commits
• [llvm] ded64d2 - [DTU] fix dominator tree update eliding reachable nodes (#177683)   via llvm-commits
• [lldb] [llvm] [lldb][Process/FreeBSDKernelCore] Load core according to KASLR (PR #183975)   via llvm-commits
• [llvm] [AArch64] Enabled and regenerate clmul-fixed.ll. NFC (PR #184628)   via llvm-commits
• [llvm] [AArch64] Enabled and regenerate clmul-fixed.ll. NFC (PR #184628)   via llvm-commits
• [llvm] a3eb13b - [X86] remove unnecessary movs when %rdx is an input to mulx (#184462)   via llvm-commits
• [llvm] [X86] remove unnecessary movs when %rdx is an input to mulx (PR #184462)   via llvm-commits
• [llvm] [AArch64][SelectionDAG] Fold setm with eor even if it is fcmp (PR #184445)   via llvm-commits
• [llvm] [SelectionDAG] Use Karatsuba decomposition to expand vector CLMUL via narrower legal types (PR #184468)   via llvm-commits
• [llvm] [SelectionDAG] Use Karatsuba decomposition to expand vector CLMUL via narrower legal types (PR #184468)   via llvm-commits
• [llvm] [SelectionDAG] Use Karatsuba decomposition to expand vector CLMUL via narrower legal types (PR #184468)   via llvm-commits
• [llvm] [SelectionDAG] Use ExpandIntRes_CLMUL to expand vector CLMUL via narrower legal types (PR #184468)   via llvm-commits
• [llvm] [SelectionDAG] Use ExpandIntRes_CLMUL to expand vector CLMUL via narrower legal types (PR #184468)   via llvm-commits
• [llvm] [SelectionDAG] Use ExpandIntRes_CLMUL to expand vector CLMUL via narrower legal types (PR #184468)   via llvm-commits
• [llvm] [SelectionDAG] Use ExpandIntRes_CLMUL to expand vector CLMUL via narrower legal types (PR #184468)   via llvm-commits
• [llvm] [SelectionDAG] Use ExpandIntRes_CLMUL to expand vector CLMUL via narrower legal types (PR #184468)   via llvm-commits
• [llvm] [SelectionDAG] Use ExpandIntRes_CLMUL to expand vector CLMUL via narrower legal types (PR #184468)   via llvm-commits
• [llvm] [SelectionDAG] Use ExpandIntRes_CLMUL to expand vector CLMUL via narrower legal types (PR #184468)   via llvm-commits
• [llvm] [SelectionDAG] Use ExpandIntRes_CLMUL to expand vector CLMUL via narrower legal types (PR #184468)   via llvm-commits
• [llvm] [AMDGPU][GlobalISel] Fix VCC s1 phi instruction selection failure (PR #184632)   via llvm-commits
• [libc] [llvm] [libc][math][c23] Add acosbf16 math function (PR #184633)   via llvm-commits
• [libc] [llvm] [libc][math][c23] Add acosbf16 math function (PR #184633)   via llvm-commits
• [libc] [llvm] [libc][math][c23] Add acosbf16 math function (PR #184633)   via llvm-commits
• [llvm] [X86] Declare 128/256-bit funnel shifts legal on VBMI2 + NOVLX targets (PR #184634)   via llvm-commits
• [llvm] [AMDGPU][GlobalISel] Fix VCC s1 phi instruction selection failure (PR #184632)   via llvm-commits
• [llvm] [SPIRV] Fix return value of runOnModule for SPIRVPrepareFunctions (PR #184636)   via llvm-commits
• [clang] [llvm] [X86] Reduce -ffixed-r compile-time overhead (PR #184606)   via llvm-commits
• [llvm] [WIP][Don't Merge] Check whether lines are covered by existing tests (PR #184637)   via llvm-commits
• [llvm] [WIP][Don't Merge] Check whether lines are covered by existing tests (PR #184637)   via llvm-commits
• [clang] [llvm] [X86] Reduce -ffixed-r compile-time overhead (PR #184606)   via llvm-commits
• [llvm] 8486d89 - [SelectionDAG] Fix -Wunused-variable after #179318 (#184623)   via llvm-commits
• [llvm] [ARM] Custom lower abdu and abds (PR #182696)   via llvm-commits
• [clang] [llvm] [X86] Reduce -ffixed-r compile-time overhead (PR #184606)   via llvm-commits
• [libc] [llvm] [libc][math][c23] Add asinbf16 math function (PR #184170)   via llvm-commits
• [llvm] [SystemZ][z/OS] Add a parameter Align to emitIncrement() and use 32 for XPLINK stack on z/OS. (PR #182348)   via llvm-commits
• [llvm] AMDGPU/GlobalISel: RegBankLegalize rules for amdgcn_exp/exp_row (PR #181956)   via llvm-commits
• [clang] [llvm] [X86] Reduce -ffixed-r compile-time overhead (PR #184606)   via llvm-commits
• [llvm] 77f1480 - [SPIRV] Fix return value of runOnModule for SPIRVPrepareFunctions (#184636)   via llvm-commits
• [llvm] 18226e7 - [RISCV] Lower i8/i16/i32 scalable vector ISD::CLMUL/CLMULH with Zvbc32e. (#184465)   via llvm-commits
• [clang] [llvm] [X86] Reduce -ffixed-r compile-time overhead (PR #184606)   via llvm-commits
• [clang] [llvm] Support -mnop-mcount and -mrecord-mcount on x86_64 elf targets. (PR #184641)   via llvm-commits
• [clang] [llvm] Support -mnop-mcount and -mrecord-mcount on x86_64 elf targets. (PR #184641)   via llvm-commits
• [llvm] [CI] Enable gold tests (PR #184076)   via llvm-commits
• [libc] [llvm] [libc][math][c23] Add acosbf16 math function (PR #184633)   via llvm-commits
• [llvm] [bolt][NFC] Remove unused ReorderUtils.h (PR #184642)   via llvm-commits
• [llvm] b0b5834 - [DAG] Improved handling of ISD::ROTL and ISD::ROTR in isKnownToBeAPowerOfTwo (#182744)   via llvm-commits
• [llvm] [DAG] Improved handling of ISD::ROTL and ISD::ROTR in isKnownToBeAPowerOfTwo (PR #182744)   via llvm-commits
• [llvm] AMDGPU: Clean up print handling of AMDGPUTargetID (PR #184643)   via llvm-commits
• [llvm] b9f1199 - InstCombine: Support extractvalue in SimplifyDemandedFPClass (#184171)   via llvm-commits
• [llvm] 9cd054b - [AArch64] Add lowering for misc NEON intrinsics (#183050)   via llvm-commits
• [llvm] [AArch64] Add lowering for misc NEON intrinsics (PR #183050)   via llvm-commits
• [llvm] [CodeGen] Treat hasOrderedMemoryRef as implying arbitrary loads or stores (PR #182000)   via llvm-commits
• [lld] 9105d9c - [lld][Hexagon] Fix findMaskR8 missing duplex support (#183936)   via llvm-commits
• [llvm] [AArch64] C1-Ultra Scheduling model (PR #182251)   via llvm-commits
• [llvm] [AArch64] C1-Ultra Scheduling model (PR #182251)   via llvm-commits
• [llvm] [AArch64] C1-Ultra Scheduling model (PR #182251)   via llvm-commits
• [llvm] AMDGPU/GlobalISel: RegBankLegalize rules for amdgcn_exp/exp_row (PR #181956)   via llvm-commits
• [llvm] [mlir] [OMPIRBuilder] Move debug records to correct blocks. (PR #157125)   via llvm-commits
• [llvm] 2b3e30d - [CodeGen] Treat hasOrderedMemoryRef as implying arbitrary loads or stores (#182000)   via llvm-commits
• [llvm] 2c95b8d - AMDGPU: Clean up print handling of AMDGPUTargetID (#184643)   via llvm-commits
• [llvm] df52bb4 - [LoopUnrollPass] Don't use clang specific syntax in optimization remarks (#182430)   via llvm-commits
• [libc] [llvm] [libc][math] Refactor fabs family to header-only (PR #182173)   via llvm-commits
• [clang] [llvm] [AArch64][clang][llvm] Add ACLE `stshh` atomic store builtin (PR #181386)   via llvm-commits
• [clang] [llvm] [AArch64][clang][llvm] Add ACLE `stshh` atomic store builtin (PR #181386)   via llvm-commits
• [clang] [llvm] [AArch64][clang][llvm] Add ACLE `stshh` atomic store builtin (PR #181386)   via llvm-commits
• [clang] [llvm] [AArch64][clang][llvm] Add ACLE `stshh` atomic store builtin (PR #181386)   via llvm-commits
• [llvm] [AMDGPU] Poison invalid globals after emitting error in LowerBufferFatPointers pass (PR #184662)   via llvm-commits
• [llvm] [AMDGPU] Add scheduling strategy for critical resource in remainder (PR #184657)   via llvm-commits
• [llvm] 20902f0 - ValueTracking: Teach computeKnownFPClass to look at bitcast + integer max (#184073)   via llvm-commits
• [llvm] [NFC][MISched][AMDGPU] Expose tracePick to be used in AMDGPU backend (PR #184664)   via llvm-commits
• [llvm] [AMDGPU] Poison invalid globals after emitting error in LowerBufferFatPointers pass (PR #184662)   via llvm-commits
• [llvm] [NFC][MISched][AMDGPU] Expose tracePick to be used in AMDGPU backend (PR #184664)   via llvm-commits
• [llvm] [LoopUnroll] Remove `UseUpperBound` output parameter from `computeUnrollCount` (NFC) (PR #184526)   via llvm-commits
• [llvm] [RISCV] Implement `isLoadFromStackSlotPostFE` and ... (PR #184673)   via llvm-commits
• [llvm] ade43a5 - [WebAssembly] MC support for acquire-release atomics (#183656)   via llvm-commits
• [llvm] Centralize prefetch target storage in MachineFunction. (PR #184194)   via llvm-commits
• [llvm] d8e86a5 - [dsymutil] Add option to filter debug map objects by allow/disallow-list (#182083)   via llvm-commits
• [clang] [llvm] [HexFloat] add HexFloat to APFloat (PR #179771)   via llvm-commits
• [llvm] [GOFF] Set reference to ADA (PR #179734)   via llvm-commits
• [llvm] [GOFF] Set reference to ADA (PR #179734)   via llvm-commits
• [clang] [llvm] [HexFloat] add HexFloat to APFloat (PR #179771)   via llvm-commits
• [clang] [llvm] [HexFloat] add HexFloat to APFloat (PR #179771)   via llvm-commits
• [clang] [llvm] [HexFloat] add HexFloat to APFloat (PR #179771)   via llvm-commits
• [clang] [llvm] [HexFloat] add HexFloat to APFloat (PR #179771)   via llvm-commits
• [clang] [llvm] [HexFloat] add HexFloat to APFloat (PR #179771)   via llvm-commits
• [clang] [llvm] [HexFloat] add HexFloat to APFloat (PR #179771)   via llvm-commits
• [clang] [llvm] [HexFloat] add HexFloat to APFloat (PR #179771)   via llvm-commits
• [clang] [llvm] [HexFloat] add HexFloat to APFloat (PR #179771)   via llvm-commits
• [lld] ec15263 - [lld][WebAssembly] Convert weak-alias tests to assembly. NFC (#184667)   via llvm-commits
• [libc] [llvm] [libc][math] Refactor fabs family to header-only (PR #182173)   via llvm-commits
• [llvm] [VPlan] Use pragma pack(1) for VPIRFlags on AIX. (PR #184687)   via llvm-commits
• [llvm] [VPlan] Use pragma pack(1) for VPIRFlags on AIX. (PR #184687)   via llvm-commits
• [llvm] ca0d100 - [VPlan] Use VPlan::getZero to improve code (NFC) (#184591)   via llvm-commits
• [llvm] [Windows][test] Fix "LLVM" test failures when LLVM_WINDOWS_PREFER_FORWARD_SLASH is ON (PR #184556)   via llvm-commits
• [llvm] [Windows][test] Fix "LLVM" test failures when LLVM_WINDOWS_PREFER_FORWARD_SLASH is ON (PR #184556)   via llvm-commits
• [lldb] [llvm] [llvm][Support] Make createUniquePath require at least one wildcard marker (PR #184688)   via llvm-commits
• [llvm] [llubi] Add support for load/store/lifetime markers (PR #182532)   via llvm-commits
• [llvm] [LoopFusion] Correction in the comments (NFC) (PR #184689)   via llvm-commits
• [llvm] [SelectionDAG] Fix cycle in ReplacedValues during type legalization (PR #184697)   via llvm-commits
• [llvm] cd62289 - [DAG] isKnownNeverZero - add ISD::ADD/SUB DemandedElts handling and tests (#183958)   via llvm-commits
• [llvm] [Instcombine] Write Instcombine pass to strength reduce lock xadd to lock sub (PR #184715)   via llvm-commits
• [clang] [llvm] [PowerPC] Add builtins for Post Quantum Cryptography Acceleration (PR #184717)   via llvm-commits
• [clang] [llvm] [PowerPC] Add builtins for Post Quantum Cryptography Acceleration (PR #184717)   via llvm-commits
• [llvm] bbe4853 - [RISCV] Add findCommutedOpIndices support for Zvabd   via llvm-commits
• [llvm] [DirectX] Split long vectors in DXILResourceAccess (PR #184732)   via llvm-commits
• [llvm] [LoopFusion] Correction in the comments (NFC) (PR #184689)   via llvm-commits
• [llvm] [LoopFusion] Correction in the comments (NFC) (PR #184689)   via llvm-commits
• [llvm] [LoopFusion] Correction in the comments (NFC) (PR #184689)   via llvm-commits
• [llvm] [DAG] isKnownNeverZero - add ISD::SHL DemandedElts handling and tests (PR #183772)   via llvm-commits
• [llvm] [LoopFusion] Correction in the comments (NFC) (PR #184689)   via llvm-commits
• [llvm] [LoopFusion] Correction in the comments (NFC) (PR #184689)   via llvm-commits
• [llvm] [DAG] ISD::matchUnaryPredicate / matchUnaryFpPredicate / matchBinaryPredicate - add DemandedElts variant (PR #183013)   via llvm-commits
• [clang] [llvm] [RISCV] Support 'f' Inline Assembly Constraint for bfloat16 (PR #184566)   via llvm-commits
• [llvm] [X86] Add (v)pcmpestr(m/i)q to set the W bit. (PR #184746)   via llvm-commits
• [llvm] [RISCV][CostModel] Fix invalid cost for vector select on targets without FP vector support (PR #183158)   via llvm-commits
• [llvm] [RISCV][CostModel] Fix invalid cost for vector select on targets without FP vector support (PR #183158)   via llvm-commits
• [llvm] [RISCV][CostModel] Fix invalid cost for vector select on targets without FP vector support (PR #183158)   via llvm-commits
• [llvm] [RISCV][CostModel] Fix invalid cost for vector select on targets without FP vector support (PR #183158)   via llvm-commits
• [clang] [llvm] [RISCV] Support 'f' Inline Assembly Constraint for bfloat16 (PR #184566)   via llvm-commits
• [libc] [llvm] [libc][math] Refactor ffmaf128 into a header only. (PR #184751)   via llvm-commits
• [libc] [llvm] [libc][math] Refactor ffmaf128 into a header only. (PR #184751)   via llvm-commits
• [llvm] [LoopReduceMotion] Improve loop by extract reduction instruction (PR #179215)   via llvm-commits
• [llvm] [LoopReduceMotion] Improve loop by extract reduction instruction (PR #179215)   via llvm-commits
• [llvm] [LoopReduceMotion] Improve loop by extract reduction instruction (PR #179215)   via llvm-commits
• [llvm] [LoopReduceMotion] Improve loop by extract reduction instruction (PR #179215)   via llvm-commits
• [llvm] [LoopReduceMotion] Improve loop by extract reduction instruction (PR #179215)   via llvm-commits
• [llvm] [LoopReduceMotion] Improve loop by extract reduction instruction (PR #179215)   via llvm-commits
• [llvm] [RISCV] Don't make ISD::ABDS/ABDU legal for v2i32 with P extension. (PR #184753)   via llvm-commits
• [libc] [llvm] [libc][math] Refactor ffmaf128 into a header only. (PR #184751)   via llvm-commits
• [clang] [llvm] [RISCV] Support 'f' Inline Assembly Constraint for bfloat16 (PR #184566)   via llvm-commits
• [llvm] d5378da - [SystemZ] Mark fminimumnum/fmaximumnum as legal (#184595)   via llvm-commits
• [llvm] 8251293 - [VPlan] Move tail folding out of VPlanPredicator. NFC (#176143)   via llvm-commits
• [llvm] [RISCV] Add register overlap checks to the assembler for vector indexed segment load (PR #184569)   via llvm-commits
• [llvm] [RISCV] Add register overlap checks to the assembler for vector indexed segment load (PR #184569)   via llvm-commits
• [llvm] 3b65752 - [AArch64] Enabled and regenerate clmul-fixed.ll. NFC (#184628)   via llvm-commits
• [llvm] [Clang] Add Picolibc environment type for triples (PR #169613)   via llvm-commits
• [llvm] [Clang] Add Picolibc environment type for triples (PR #169613)   via llvm-commits
• [lld] [lld][ELF] Fix crash when relaxation pass encounters synthetic sections (PR #184758)   via llvm-commits
• [llvm] [SelectionDAG] Use ExpandIntRes_CLMUL to expand vector CLMUL via narrower legal types (PR #184468)   via llvm-commits
• [lld] [lld][ELF] Fix crash when relaxation pass encounters synthetic sections (PR #184758)   via llvm-commits
• [lld] [lld][ELF] Fix crash when relaxation pass encounters synthetic sections (PR #184758)   via llvm-commits
• [llvm] 0418700 - [SDAGBuilder] Fix incorrect fcmp+select to minnum/maxnum transform (#184590)   via llvm-commits
• [llvm] 1f53da0 - [llvm-objdump] Default --symbolize-operands for BPF (#184043)   via llvm-commits
• [llvm] 6778c11 - [AArch64] Fix SVE cost model for various math intrinsics (#184358)   via llvm-commits
• [llvm] 9c35a7b - [AArch64] Refine reduction VT selection in CTPOP -> VECREDUCE combine (#183025)   via llvm-commits
• [llvm] 3cf97d8 - [X86] Make ISD::ROTL/ROTR vector rotates legal on XOP+AVX512 targets (#184587)   via llvm-commits
• [llvm] [LoopReduceMotion] Improve loop by extract reduction instruction (PR #179215)   via llvm-commits
• [llvm] [SimplifyLibCalls] Combine sin/cos libcall pairs into llvm.sincos (PR #184760)   via llvm-commits
• [llvm] [SimplifyLibCalls] Combine sin/cos libcall pairs into llvm.sincos (PR #184760)   via llvm-commits
• [llvm] 768182d - [X86] Declare 128/256-bit funnel shifts legal on VBMI2 + NOVLX targets (#184634)   via llvm-commits
• [llvm] [RISCV] Add contraints for SpacemiT X60 AI VDot Insts (PR #174364)   via llvm-commits
• [llvm] 2e93eb7 - [AMDGPU] Use subtarget feature for flat offset bit width instead of arch checks (#183742)   via llvm-commits
• [llvm] COFF: Allow hex literals in .def files: BASE/HEAPSIZE/STACKSIZE (PR #184764)   via llvm-commits
• [llvm] COFF: Allow hex literals in .def files: BASE/HEAPSIZE/STACKSIZE (PR #184764)   via llvm-commits
• [llvm] COFF: Allow hex literals in .def files: BASE/HEAPSIZE/STACKSIZE (PR #184764)   via llvm-commits
• [llvm] [VPlan] Strip WidenStore handling in narrowToSingleScalars (PR #184765)   via llvm-commits
• [llvm] b6b19d1 - [AArch64] Fold zero-high vector inserts in MI peephole optimisation (#182835)   via llvm-commits
• [llvm] [AMDGPU] Implement LSR cost model for GFX9+ (PR #184138)   via llvm-commits
• [llvm] [AMDGPU] Implement LSR cost model for GFX9+ (PR #184138)   via llvm-commits
• [llvm] [AMDGPU] Implement LSR cost model for GFX9+ (PR #184138)   via llvm-commits
• [llvm] [AMDGPU] Implement LSR cost model for GFX9+ (PR #184138)   via llvm-commits
• [llvm] [VectorCombine] Optimize vector combine in fold binop of reduction (PR #179416)   via llvm-commits
• [llvm] [X86] Make ISD::ROTL/ROTR vXi16 vector rotates legal on VBMI2 targets (PR #184768)   via llvm-commits
• [llvm] [DAG] Simplify isKnownToBeAPowerOfTwo for ZERO_EXTEND (PR #182226)   via llvm-commits
• [lld] [llvm] COFF: Allow hex literals in .def files: BASE/HEAPSIZE/STACKSIZE (PR #184764)   via llvm-commits
• [lld] [llvm] COFF: Allow hex literals in .def files: BASE/HEAPSIZE/STACKSIZE (PR #184764)   via llvm-commits
• [llvm] [DAG] Simplify isKnownToBeAPowerOfTwo for ZERO_EXTEND (PR #182226)   via llvm-commits
• [llvm] [llvm][tools] Add support to llvm-offload-binary to unbundle spirv64-intel images (PR #184774)   via llvm-commits
• [llvm] 68c0afa - AMDGPU: Add FlatSignedOffset feature and use it for flat offset printing (#183483)   via llvm-commits
• [llvm] e56b580 - Reapply "[SPIRV] Emit intrinsics for globals only in function that references them (#178143 (#179268)) (#182552)   via llvm-commits
• [llvm] 001c049 - [X86] known-pow2.ll - add zext vector test for #182226 (#184772)   via llvm-commits
• [llvm] [AArch64] Fix sign-extend-inreg combine for i1 types (PR #177976)   via llvm-commits
• [llvm] [X86] Expand i512 shifts on AVX512 targets (PR #183198)   via llvm-commits
• [llvm] [AArch64] Sink NOT to be fold into BIC/ORN/EON (PR #176194)   via llvm-commits
• [llvm] 9d1d80b - DAG: Replace legal type check in EmitCopyFromReg (#177788)   via llvm-commits
• [llvm] [ORC] Refactor some WaitingOnGraph loops into named methods. NFCI. (PR #184775)   via llvm-commits
• [llvm] a631af3 - Add EVT::changeVectorElementCount and MVT:changeVectorElementCount (#182266)   via llvm-commits
• [llvm] [llvm][tools] Add support to llvm-offload-binary to unbundle spirv64-intel images (PR #184774)   via llvm-commits
• [llvm] [Benchmark] Fix warnings around usage of __COUNTER__ (PR #184524)   via llvm-commits
• [llvm] [Benchmark] Fix warnings around usage of __COUNTER__ (PR #184524)   via llvm-commits
• [llvm] [Benchmark] Fix warnings around usage of __COUNTER__ (PR #184524)   via llvm-commits
• [llvm] [Benchmark] Fix warnings around usage of __COUNTER__ (PR #184524)   via llvm-commits
• [llvm] d316fb0 - [VPlan] Replicate VPScalarIVStepsRecipe by VF outside replicate regions. (#170053)   via llvm-commits
• [llvm] [ORC] Refactor some WaitingOnGraph loops into named methods. NFCI. (PR #184775)   via llvm-commits
• [llvm] c7ddb30 - [NVPTX] Remove `NoNaNsFPMath` uses (#183447)   via llvm-commits
• [llvm] [NVPTX] Remove `NoNaNsFPMath` uses (PR #183447)   via llvm-commits
• [llvm] 1689d3c - [AMDGPU] Test hazard-getreg-waitalu.mir on gfx13 (#183007)   via llvm-commits
• [llvm] [ARM] Add basic NPM support for LoadStoreOptimizer (PR #184139)   via llvm-commits
• [llvm] expandIS_FPCLASS: Support fcNegative and fcPositive (PR #184788)   via llvm-commits
• [llvm] e3b62ff - [Reassociate][DebugInfo] Salvage debug info before rewriting expression (#182730)   via llvm-commits
• [llvm] [AMDGPU] Widen sub-dword constant loads with dword alignment to match SelectionDAG behavior (PR #184790)   via llvm-commits
• [llvm] ee31f2d - [AMDGPU] Add VFLAT, VGLOBAL, VSCRATCH to gfx13 (#182811)   via llvm-commits
• [llvm] [VPlan] Use bitfield to store Cmp predicates and GEP wrap flags. (NFC) (PR #181571)   via llvm-commits
• [llvm] [SPIRV] Replace `removeFromParent` with `eraseFromParent` for `ASSING_TYPE` (PR #184793)   via llvm-commits
• [llvm] [llvm][RISCV] Use zilsd for callee-saved register spill/restore on RV32 (PR #184794)   via llvm-commits
• [llvm] expandIS_FPCLASS: Support fcNegative and fcPositive (PR #184788)   via llvm-commits
• [llvm] expandIS_FPCLASS: Support fcNegative and fcPositive (PR #184788)   via llvm-commits
• [llvm] [NFC][SPIRV] Remove `MachineInstr` from `DeadMIs` set after erasing it (PR #184795)   via llvm-commits
• [llvm] [WebAssembly] Do not form minnum/maxnum (PR #184796)   via llvm-commits
• [llvm] [PowerPC] Remove `UnsafeFPMath` uses (PR #154901)   via llvm-commits
• [llvm] [AMDGPU] Detect VALU-after-MFMA hazard in post-RA scheduler's getHazardType (PR #184084)   via llvm-commits
• [llvm] [AMDGPU] Detect VALU-after-MFMA hazard in post-RA scheduler's getHazardType (PR #184084)   via llvm-commits
• [llvm] [AMDGPU] Detect VALU-after-MFMA hazard in post-RA scheduler's getHazardType (PR #184084)   via llvm-commits
• [llvm] [AArch64] Add extra sched predicates (PR #184801)   via llvm-commits
• [flang] [llvm] [flang][flang-rt] Implement F202X leading-zero control edit descriptors LZ, LZS, and LZP for formatted output (F, E, D, and G editing) (PR #183500)   via llvm-commits
• [llvm] [VPlan] Use pragma pack(1) for VPIRFlags on AIX. (PR #184687)   via llvm-commits
• [llvm] [AMDGPU] Add scheduling strategy for critical resource in remainder (PR #184657)   via llvm-commits
• [llvm] 5f1683c - Revert "[DebugInfo] Emit DW_AT_const_value for constexpr array static members" (#184798)   via llvm-commits
• [llvm] [InstSimplify] Implement `Cond ? V : V` -> `V` when no Refinment allowed (PR #183291)   via llvm-commits
• [clang] [llvm] [DebugInfo] Fix endianness in DW_AT_const_value for constexpr arrays (PR #184804)   via llvm-commits
• [clang] [llvm] [DebugInfo] Fix endianness in DW_AT_const_value for constexpr arrays (PR #184804)   via llvm-commits
• [llvm] [WebAssembly] Do not form minnum/maxnum (PR #184796)   via llvm-commits
• [llvm] [AArch64] Add fixed-length bfloat cost model tests (NFC) (PR #184805)   via llvm-commits
• [llvm] [AArch64] Add fixed-length bfloat cost model tests (NFC) (PR #184805)   via llvm-commits
• [llvm] 73e2988 - [CodeGen] Simplify EVT::operator!=. NFCI. (#184792)   via llvm-commits
• [llvm] [flang] [flang-rt] Subscript overrun could occur in namelists during a READ command. (PR #176959)   via llvm-commits
• [llvm] c88ba88 - [ADT] Refine MutableArrayRef forwarding constructor constraints (#183806)   via llvm-commits
• [llvm] [SPIRV] In G_SELECT selection path: replace `removeFromParent` with `eraseFromParent` and return early (PR #184807)   via llvm-commits
• [llvm] [VPlan] Use pragma pack(1) for VPIRFlags on AIX. (PR #184687)   via llvm-commits
• [llvm] [NFC][LV] Introduce enums for uncountable exit detail and style (PR #184808)   via llvm-commits
• [llvm] 1dc91cd - [X86] Add (v)pcmpestr(m/i)q to set the W bit. (#184746)   via llvm-commits
• [clang] [flang] [llvm] [flang] Add runtime trampoline pool for W^X compliance (PR #183108)   via llvm-commits
• [clang] [flang] [llvm] [flang] Add runtime trampoline pool for W^X compliance (PR #183108)   via llvm-commits
• [llvm] [AMDGPU] Implement LSR cost model for GFX9+ (PR #184138)   via llvm-commits
• [llvm] [llvm-otool] Fix -arch flag for universal binary slice selection (PR #184810)   via llvm-commits
• [llvm] [AArch64] Add sanitazation when custom lowering fp partial reduce (PR #184811)   via llvm-commits
• [llvm] [AArch64] Add sanitazation when custom lowering fp partial reduce (PR #184811)   via llvm-commits
• [clang] [llvm] [DebugInfo] Fix endianness in DW_AT_const_value for constexpr arrays (PR #184804)   via llvm-commits
• [llvm] [AArch64] Add partial reduce patterns for new fdot instructions (PR #184659)   via llvm-commits
• [llvm] [RegisterScavenging] Respect early-clobber when scavenging registers (PR #184814)   via llvm-commits
• [llvm] [RegisterScavenging] Respect early-clobber when scavenging registers (PR #184814)   via llvm-commits
• [llvm] [LV] Remove branch on false in blend-costs.ll test. NFC (PR #184816)   via llvm-commits
• [llvm] [SPIR-V] Scalarize vector of pointers for ptrtoint/inttoptr (PR #184817)   via llvm-commits
• [llvm] [AArch64][SelectionDAG] Fold setm with eor even if it is fcmp (PR #184445)   via llvm-commits
• [llvm] [AMDGPU] Register allocation anti-hints to reduce MFMA hazard NOPs (PR #156943)   via llvm-commits
• [llvm] [AArch64][SelectionDAG] Fold setm with eor even if it is fcmp (PR #184445)   via llvm-commits
• [lld] e9657a1 - COFF: Allow hex literals in .def files: BASE/HEAPSIZE/STACKSIZE (#184764)   via llvm-commits
• [lld] [llvm] COFF: Allow hex literals in .def files: BASE/HEAPSIZE/STACKSIZE (PR #184764)   via llvm-commits
• [llvm] efb6f54 - [RISCV] Don't make ISD::ABDS/ABDU legal for v2i32 with P extension. (#184753)   via llvm-commits
• [llvm] [Instcombine] Write Instcombine pass to strength reduce lock xadd to lock sub (PR #184715)   via llvm-commits
• [llvm] [Instcombine] Write Instcombine pass to strength reduce lock xadd to lock sub (PR #184715)   via llvm-commits
• [llvm] [RegisterScavenging] Respect early-clobber when scavenging registers (PR #184814)   via llvm-commits
• [llvm] [RegisterScavenging] Respect early-clobber when scavenging registers (PR #184814)   via llvm-commits
• [llvm] f14a8aa - [X86] add i256/i512 bit manipulation tests suggested by #132601 (#184813)   via llvm-commits
• [flang] [llvm] [flang][flang-rt] Implement F202X leading-zero control edit descriptors LZ, LZS, and LZP for formatted output (F, E, D, and G editing) (PR #183500)   via llvm-commits
• [llvm] [AArch64][SelectionDAG] Fold setm with eor even if it is fcmp (PR #184445)   via llvm-commits
• [llvm] [AArch64][SelectionDAG] Fold setm with eor even if it is fcmp (PR #184445)   via llvm-commits
• [llvm] 21a1b4c - [LoopUnroll] Remove `UseUpperBound` output parameter from `computeUnrollCount` (NFC) (#184526)   via llvm-commits
• [llvm] [AArch64][SelectionDAG] Fold setm with eor even if it is fcmp (PR #184445)   via llvm-commits
• [llvm] f0265cc - [LoopUnroll] Ensure we can accept both `llvm.loop.unroll.full` and `llvm.loop.unroll.enable` metadata on the same loop (NFC) (#182381)   via llvm-commits
• [llvm] 6d003f5 - [AArch64][clang][llvm] Add ACLE `stshh` atomic store builtin (#181386)   via llvm-commits
• [llvm] 673d725 - Reland "[llvm-ir2vec] Adding Inst Embeddings Map API to ir2vec python bindings (#180140)" (#184196)   via llvm-commits
• [llvm] 56cdd60 - [MC] Merge fixupNeedsRelaxation and fixupNeedsRelaxationAdvanced. NFC (#184832)   via llvm-commits
• [lld] [lld][MachO] Add N_COLD_FUNC support (PR #183909)   via llvm-commits
• [llvm] [MemProf] Enhance thin link optimization remarks (PR #184829)   via llvm-commits
• [llvm] [LV] Simplify the chain traversal in `getScaledReductions()` (NFCI) (PR #184830)   via llvm-commits
• [llvm] [VPlan] Compute blend masks from minimum set of edge masks (PR #184838)   via llvm-commits
• [llvm] [llvm-ir2vec] Adding getFuncNames API to ir2vec python bindings (PR #180473)   via llvm-commits
• [compiler-rt] [scudo] Move getResidentPages function (PR #183138)   via llvm-commits
• [llvm] [MC] Split evaluateFixup: separate evaluation from fixup application. NFC (PR #184841)   via llvm-commits
• [llvm] [MC] Split evaluateFixup: separate evaluation from fixup application. NFC (PR #184841)   via llvm-commits
• [llvm] 3ed12eb - [RISCV][P-ext] Fix cannot select error for shlsat with i8 vector argument. (#184839)   via llvm-commits
• [llvm] X86: Add prefetch insertion based on Propeller profile (PR #166324)   via llvm-commits
• [llvm] [AMDGPU] add back the true16 pattern for cvt_pk_rtz (PR #184857)   via llvm-commits
• [llvm] [AMDGPU] add back the true16 pattern for cvt_pk_rtz (PR #184857)   via llvm-commits
• [lldb] [llvm] Add support for ondemand sourcefile fetch using python callback (PR #119118)   via llvm-commits
• [llvm] [VPlan] Explicitly unoll replicate-regions without live-outs by VF. (PR #170212)   via llvm-commits
• [llvm] 6ae0e6d - Don't crash when given an empty input filename. (#184718)   via llvm-commits
• [clang] [llvm] [HLSL] Implement HLSL `mul` function (PR #184882)   via llvm-commits
• [llvm] 9767894 - [HLSL] Implement Texture2D::Gather and Texture2D::GatherCmp (#183323)   via llvm-commits
• [llvm] [RISCV][P-ext] Only support sshlsat for splat immediate shift amounts. (PR #184886)   via llvm-commits
• [llvm] [RISCV][P-ext] Only support sshlsat for splat immediate shift amounts. (PR #184886)   via llvm-commits
• [llvm] [flang] [flang-rt] Subscript overrun could occur in namelists during a READ command. (PR #176959)   via llvm-commits
• [llvm] [LLVM][CodeView] Add `S_REGREL32_INDIR` (PR #183172)   via llvm-commits
• [llvm] [RISCV][CostModel] Fix invalid cost for vector select on targets without FP vector support (PR #183158)   via llvm-commits
• [llvm] [RISCV][P-ext] Support vector ISD::ABS using PABD instructions. (PR #184822)   via llvm-commits
• [llvm] [RISCV][CostModel] Fix invalid cost for vector select on targets without FP vector support (PR #183158)   via llvm-commits
• [llvm] [RISCV][CostModel] Fix invalid cost for vector select on targets without FP vector support (PR #183158)   via llvm-commits
• [libc] [llvm] [libc][math][c23] Add hypotbf16 function (PR #183460)   via llvm-commits
• [llvm] 6695f1d - [docs] Add exception to AI tool policy for Bazel build fixer (#183408)   via llvm-commits
• [llvm] 9143f21 - [LoopFusion] Correction in the comments (NFC) (#184689)   via llvm-commits
• [llvm] [AMDGPU] Remove blocks that only branch to other blocks (PR #184908)   via llvm-commits
• [llvm] [AMDGPU] fix asyncmark soft waitcnt bug (PR #184851)   via llvm-commits
• [llvm] [RISCV] Add register overlap checks to the assembler for vector indexed segment load (PR #184569)   via llvm-commits
• [llvm] [RISCV] Add register overlap checks to the assembler for vector indexed segment load (PR #184569)   via llvm-commits
• [llvm] [AMDGPU] Remove blocks that only branch to other blocks (PR #184908)   via llvm-commits
• [llvm] [LV] Enable scalable FindLast on RISCV. (PR #184931)   via llvm-commits
• [llvm] [LV] Enable scalable FindLast on RISCV. (PR #184931)   via llvm-commits
• [llvm] [LV] Enable scalable FindLast on RISCV. (PR #184931)   via llvm-commits
• [llvm] [RISCV] Add register overlap checks to the assembler for vector indexed segment load (PR #184569)   via llvm-commits
• [llvm] [AMDGPU] propagate unifor/diverent in DAG combine (PR #184940)   via llvm-commits
• [llvm] [CodeGen][TTI] Reduce funnel shift cost for constant shift amounts (PR #184942)   via llvm-commits
• [llvm] [CodeGen][TTI] Reduce funnel shift cost for constant shift amounts (PR #184942)   via llvm-commits
• [llvm] [ConstantFolding] Don't fold constrained fsub/fadd to zero with round.dynamic (PR #184919)   via llvm-commits
• [llvm] [AMDGPU] Remove alignment constraint from spill pseudos (PR #177317)   via llvm-commits
• [llvm] [DAG] isKnownNeverZero - add ISD::SHL DemandedElts handling and tests (PR #183772)   via llvm-commits
• [llvm] [DAG] isKnownNeverZero - add ISD::SHL DemandedElts handling and tests (PR #183772)   via llvm-commits
• [llvm] expandIS_FPCLASS: Support fcNegative and fcPositive (PR #184788)   via llvm-commits
• [llvm] [SandboxVec][DAG] Fix unscheduled succs when nodes are scheduled (PR #184946)   via llvm-commits
• [llvm] [SandboxVec][DAG] Fix unscheduled succs when nodes are scheduled (PR #184946)   via llvm-commits
• [lld] 46d29d4 - [ELF] Remove unused handleTlsRelocation (#184951)   via llvm-commits
• [llvm] DAGCombiner::visitBITCAST: CastLoad strip AssertNoFPClass (PR #184952)   via llvm-commits
• [llvm] [LoopReduceMotion] Improve loop by extract reduction instruction (PR #179215)   via llvm-commits
• [clang] [llvm] [ARM] Add support for Windows SEH (PR #184953)   via llvm-commits
• [llvm] cb6936e - [LV] Remove branch on false in blend-costs.ll test. NFC (#184816)   via llvm-commits
• [llvm] [LoopReduceMotion] Improve loop by extract reduction instruction (PR #179215)   via llvm-commits
• [llvm] [Windows][test] Fix "LLVM" test failures when LLVM_WINDOWS_PREFER_FORWARD_SLASH is ON (PR #184556)   via llvm-commits
• [llvm] [Windows][test] Fix "LLVM" test failures when LLVM_WINDOWS_PREFER_FORWARD_SLASH is ON (PR #184556)   via llvm-commits
• [llvm] 1f2e52f - [llvm-ir2vec] Adding getFuncNames API to ir2vec python bindings (#180473)   via llvm-commits
• [llvm] [SCEV] Fix infinite recursion in getZeroExtendExpr via missing Depth propagation (PR #184958)   via llvm-commits
• [llvm] [SCEV] Fix infinite recursion in getZeroExtendExpr via missing Depth propagation (PR #184958)   via llvm-commits
• [llvm] [SCEV] Fix infinite recursion in getZeroExtendExpr via missing Depth propagation (PR #184958)   via llvm-commits
• [llvm] [SCEV] Fix infinite recursion in getZeroExtendExpr via missing Depth propagation (PR #184958)   via llvm-commits
• [llvm] 2b21231 - [MemProf] Enhance thin link optimization remarks (#184829)   via llvm-commits
• [llvm] [RISCV] Remove unneeded ImmLeaf from simm8_unsigned. NFC (PR #184960)   via llvm-commits
• [llvm] [RISCV] Add tests for vwaddu_wv+vabd(u) combine (PR #184962)   via llvm-commits
• [llvm] 7dda8ba - [DA] Fix the Weak Zero SIV tests when the coeff may be zero (#183736)   via llvm-commits
• [llvm] [RISCV] Add register group overlap checks to the assembler for vector indexed segment load (PR #184963)   via llvm-commits
• [llvm] f2cf0cd - [RISCV] Remove unneeded ImmLeaf from simm8_unsigned. NFC (#184960)   via llvm-commits
• [llvm] b51859c - [RISCV][P-ext] Recognize vector shifts with splat build_vector shift amount. (#184909)   via llvm-commits
• [llvm] [X86] Remove `NoSignedZerosFPMath` uses (PR #163902)   via llvm-commits
• [llvm] [NewPM] Port for AArch64A53Fix835769 (PR #184965)   via llvm-commits
• [llvm] [NewPM] Port for AArch64A53Fix835769 (PR #184965)   via llvm-commits
• [llvm] 23edefa - InstCombine: Handle insertvalue in SimplifyDemandedFPClass (#184193)   via llvm-commits
• [llvm] f90b783 - [WebAssembly] Do not form minnum/maxnum (#184796)   via llvm-commits
• [llvm] 33508a2 - [ORC] Make ElementSet, ContainerElementsMap inner classes. (#184955)   via llvm-commits
• [lld] [lld][ELF] Fix crash when relaxation pass encounters synthetic sections (PR #184758)   via llvm-commits
• [lld] [lld][ELF] Fix crash when relaxation pass encounters synthetic sections (PR #184758)   via llvm-commits
• [lld] [lld][ELF] Fix crash when relaxation pass encounters synthetic sections (PR #184758)   via llvm-commits
• [lld] [lld][ELF] Fix crash when relaxation pass encounters synthetic sections (PR #184758)   via llvm-commits
• [lld] [lld][ELF] Fix crash when relaxation pass encounters synthetic sections (PR #184758)   via llvm-commits
• [llvm] aab7376 - [DA] Remove isPeelFirst and isPeelLast (#183737)   via llvm-commits
• [lld] [lld][ELF] Fix crash when relaxation pass encounters synthetic sections (PR #184758)   via llvm-commits
• [compiler-rt] Fix 16-byte alignment for vec allocators on AIX (PR #184967)   via llvm-commits
• [llvm] [AMDGPU] Add missing -wwm-regalloc=fast to 4 more tests (NFC) (PR #184966)   via llvm-commits
• [compiler-rt] Fix 16-byte alignment for vec allocators on AIX (PR #184967)   via llvm-commits
• [compiler-rt] Fix 16-byte alignment for vec allocators on AIX (PR #184967)   via llvm-commits
• [compiler-rt] Fix 16-byte alignment for vec allocators on AIX (PR #184967)   via llvm-commits
• [llvm] [LoopReduceMotion] Improve loop by extract reduction instruction (PR #179215)   via llvm-commits
• [llvm] a9eeb15 - [Tablegen] Fix condition to report when lanemask overflows (#181810)   via llvm-commits
• [llvm] [MIPS] Fix duplicate RUN lines in tests (PR #182276)   via llvm-commits
• [llvm] [MIPS] Fix duplicate RUN lines in tests (PR #182276)   via llvm-commits
• [llvm] [InstCombine] Fix #163110: Fold icmp (shl X, L), (add (shl Y, L), 1<<L) to icmp X, (Y + 1) (PR #165975)   via llvm-commits
• [lld] [lld][ELF] Fix crash when relaxation pass encounters synthetic sections (PR #184758)   via llvm-commits
• [compiler-rt] Fix 16-byte alignment for vec allocators on AIX (PR #184967)   via llvm-commits
• [lld] [lld][ELF] Fix crash when relaxation pass encounters synthetic sections (PR #184758)   via llvm-commits
• [llvm] [VectorCombine] Optimize vector combine in fold binop of reduction (PR #179416)   via llvm-commits
• [llvm] [LoopReduceMotion] Improve loop by extract reduction instruction (PR #179215)   via llvm-commits
• [llvm] [LoopReduceMotion] Improve loop by extract reduction instruction (PR #179215)   via llvm-commits
• [llvm] AMDGPU/GlobalISel: Lower G_EXTRACT in legalizer (PR #181036)   via llvm-commits
• [llvm] [Mips] Fix $gp was restored when used as global register variable (PR #184975)   via llvm-commits
• [llvm] [Mips] Fix $gp was restored when used as global register variable (PR #184975)   via llvm-commits
• [llvm] [Mips] Fix $gp was restored when used as global register variable (PR #184975)   via llvm-commits
• [llvm] [Mips] Fix $gp was restored when used as global register variable (PR #184975)   via llvm-commits
• [llvm] AMDGPU/GlobalISel: Lower G_EXTRACT in legalizer (PR #181036)   via llvm-commits
• [llvm] f2e8e2f - [AMDGPU] Make chain functions receive a stack pointer (#184616)   via llvm-commits
• [llvm] AMDGPU/GlobalISel: Lower G_EXTRACT in legalizer (PR #181036)   via llvm-commits
• [llvm] AMDGPU/GlobalISel: Lower G_EXTRACT in legalizer (PR #181036)   via llvm-commits
• [llvm] a28699b - [AArch64] Model late forwarding in Neoverse N1 (#177590)   via llvm-commits
• [llvm] [DAG] isKnownNeverZero - add ISD::SHL DemandedElts handling and tests (PR #183772)   via llvm-commits
• [llvm] fee2363 - [MIPS] Fix duplicate RUN lines in tests (#182276)   via llvm-commits
• [llvm] [AMDGPU] Run AMDGPULowerVGPREncoding before hazard recognizers. NFCI. (PR #184987)   via llvm-commits
• [llvm] [DAG] isKnownNeverZero - add ISD::SHL DemandedElts handling and tests (PR #183772)   via llvm-commits
• [llvm] [X86] Expand i512 shifts on AVX512 targets (PR #183198)   via llvm-commits
• [llvm] [InstCombine] Simplify conditional round-up to power-of-2 alignment (PR #184989)   via llvm-commits
• [compiler-rt] d64a9fe - [compiler-rt][RISCV] Initialize length only when __init_riscv_feature… (#115449)   via llvm-commits
• [llvm] [DAG] isKnownNeverZero - add ISD::SHL DemandedElts handling and tests (PR #183772)   via llvm-commits
• [llvm] [DAG] isKnownNeverZero - add ISD::SHL DemandedElts handling and tests (PR #183772)   via llvm-commits
• [llvm] [LoopReduceMotion] Improve loop by extract reduction instruction (PR #179215)   via llvm-commits
• [llvm] [DAG] isKnownNeverZero - add ISD::SHL DemandedElts handling and tests (PR #183772)   via llvm-commits
• [llvm] df113bd - [X86] Expand i512 shifts on AVX512 targets (#183198)   via llvm-commits
• [llvm] [LoopFusion] remove else after return (NFC) (PR #184993)   via llvm-commits
• [llvm] [LoopFusion] remove else after return (NFC) (PR #184993)   via llvm-commits
• [llvm] [InstCombine][NFC] Change the order of checks in SliceUpIllegalIntegerPHI for faster compile time. (PR #183726)   via llvm-commits
• [llvm] [InstCombine][NFC] Change the order of checks in SliceUpIllegalIntegerPHI for faster compile time. (PR #183726)   via llvm-commits
• [llvm] fb449d0 - [X86] Add baseline andnot tests for #172329 (#184991)   via llvm-commits
• [llvm] [NFC][SPIRV] Rename files from `SPV_INTEL_arbitrary_precision_integers/floating` to `SPV_ALTERA_arbitrary_precision_integers/floating` (PR #184996)   via llvm-commits
• [llvm] 3c0719d - [ORC] Add no-overlap check to WaitingOnGraph::ElementSet::merge. (#184992)   via llvm-commits
• [llvm] e16fc0c - AMDGPU/GlobalISel: Regbanklegalize rules for G_PHI (#179735)   via llvm-commits
• [clang] [llvm] [WebAssembly] Change half-precision feature name to fp16. (PR #105434)   via llvm-commits
• [llvm] [DAG] isKnownNeverZero - add ISD::SHL DemandedElts handling and tests (PR #183772)   via llvm-commits
• [llvm] 5762133 - [X86][GISel] Add initial tests for x86 postleg combiner (#183844)   via llvm-commits
• [llvm] [SelectionDAG] Use ExpandIntRes_CLMUL to expand vector CLMUL via narrower legal types (PR #184468)   via llvm-commits
• [llvm] [Support] formatv: non-neative-plus for integral numbers (PR #185008)   via llvm-commits
• [llvm] [Support] formatv: non-neative-plus for integral numbers (PR #185008)   via llvm-commits
• [llvm] [DA] Fix overflows when calculating Delta in the Weak Zero SIV tests (PR #184997)   via llvm-commits
• [llvm] [SCEV] Fix infinite recursion in getZeroExtendExpr via missing Depth propagation (PR #184958)   via llvm-commits
• [llvm] [SCEV] Fix infinite recursion in getZeroExtendExpr via missing Depth propagation (PR #184958)   via llvm-commits
• [llvm] [SCEV] Fix infinite recursion in getZeroExtendExpr via missing Depth propagation (PR #184958)   via llvm-commits
• [llvm] [SCEV] Fix infinite recursion in getZeroExtendExpr via missing Depth propagation (PR #184958)   via llvm-commits
• [llvm] [SCEV] Fix infinite recursion in getZeroExtendExpr via missing Depth propagation (PR #184958)   via llvm-commits
• [clang] [llvm] [DebugInfo] Fix endianness in DW_AT_const_value for constexpr arrays (PR #184804)   via llvm-commits
• [llvm] [SCEV] Fix infinite recursion in getZeroExtendExpr via missing Depth propagation (PR #184958)   via llvm-commits
• [llvm] [SCEV] Fix infinite recursion in getZeroExtendExpr via missing Depth propagation (PR #184958)   via llvm-commits
• [llvm] [SCEV] Fix infinite recursion in getZeroExtendExpr via missing Depth propagation (PR #184958)   via llvm-commits
• [llvm] [SCEV] Fix infinite recursion in getZeroExtendExpr via missing Depth propagation (PR #184958)   via llvm-commits
• [llvm] [LSR] Remove unnecessary WidestFixupType (NFC) (PR #185013)   via llvm-commits
• [llvm] 6ecbc0c - [InstCombine] Canonicalize GEP source element types (#180745)   via llvm-commits
• [llvm] [LSR] Remove unnecessary WidestFixupType (NFC) (PR #185013)   via llvm-commits
• [llvm] [AMDGPU] Fix incorrect check prefixes in some MC tests (PR #185015)   via llvm-commits
• [llvm] [AArch64] Add C1-Nano scheduling model (PR #182316)   via llvm-commits
• [llvm] [Support] formatv: non-neative-plus for integral numbers (PR #185008)   via llvm-commits
• [llvm] [Support] formatv: non-neative-plus for integral numbers (PR #185008)   via llvm-commits
• [llvm] [DAG] isKnownNeverZero - add ISD::SHL DemandedElts handling and tests (PR #183772)   via llvm-commits
• [lld] 23cb4e5 - Support -fpass-plugin + -fthinlto-index together (#183525)   via llvm-commits
• [llvm] 23cb4e5 - Support -fpass-plugin + -fthinlto-index together (#183525)   via llvm-commits
• [llvm] [OFFLOAD] Replace C-style casts with C++ style casts in obtainInfoImpl (PR #185023)   via llvm-commits
• [llvm] c47fb2d - [gn build] Guard the BLAKE3 assembly sources with platform (#70110)   via llvm-commits
• [llvm] 5bdf8ca - [X86] Sink NOT to be fold into ANDN (#172329)   via llvm-commits
• [llvm] c8f0d37 - Fix IfConversion UpdatePredRedefs method documentation (#69918)   via llvm-commits
• [llvm] 03c34bb - [LV] Support interleaving with FindLast reductions (#184099)   via llvm-commits
• [llvm] [SCEV] Fix infinite recursion in getZeroExtendExpr via missing Depth propagation (PR #184958)   via llvm-commits
• [llvm] 1100825 - [ConstantFolding] Consider `tanh*` to always be a noop (#70794)   via llvm-commits
• [llvm] [SPIR-V] Fix lowering of declarations with hidden visibility (PR #185029)   via llvm-commits
• [llvm] [DA] Require 'nsw' for AddRecs in the WeakCrossing SIV test (PR #185030)   via llvm-commits
• [llvm] [DA] Require 'nsw' for AddRecs in the WeakCrossing SIV test (PR #185030)   via llvm-commits
• [llvm] [DebugInfo][Reassociate] Use debug records instead of intrinsics in test (PR #185031)   via llvm-commits
• [clang] [llvm] Add AMO load with Compare and Swap Not Equal (PR #178061)   via llvm-commits
• [clang] [llvm] Add AMO load with Compare and Swap Not Equal (PR #178061)   via llvm-commits
• [clang] [llvm] Add AMO load with Compare and Swap Not Equal (PR #178061)   via llvm-commits
• [clang] [llvm] [X86] Reduce -ffixed-r compile-time overhead (PR #184606)   via llvm-commits
• [clang] [llvm] [X86] Reduce -ffixed-r compile-time overhead (PR #184606)   via llvm-commits
• [llvm] [AArch64][llvm] Update Armv9.7-A dependencies (PR #185034)   via llvm-commits
• [llvm] [SPIR-V] Fix lowering of declarations with hidden visibility (PR #185029)   via llvm-commits
• [llvm] [SPIR-V] Fix lowering of declarations with hidden visibility (PR #185029)   via llvm-commits
• [flang] [llvm] [flang][flang-rt] Implement F202X leading-zero control edit descriptors LZ, LZS, and LZP for formatted output (F, E, D, and G editing) (PR #183500)   via llvm-commits
• [llvm] [DA] Require 'nsw' for AddRecs in the WeakCrossing SIV test (PR #185030)   via llvm-commits
• [llvm] [DA] Require 'nsw' for AddRecs in the WeakCrossing SIV test (PR #185030)   via llvm-commits
• [llvm] AMDGPU: Fix selection failure on fast vector rootn (PR #185035)   via llvm-commits
• [clang] [llvm] [DebugInfo] Fix endianness in DW_AT_const_value for constexpr arrays (PR #184804)   via llvm-commits
• [llvm] [AMDGPU] fix asyncmark soft waitcnt bug (PR #184851)   via llvm-commits
• [llvm] [DAG] isKnownNeverZero: Add DemandedElts handling for ROTL/ROTR/BITREVERSE/BSWAP/CTPOP/ABS (PR #184033)   via llvm-commits
• [llvm] [DAG] isKnownNeverZero: Add DemandedElts handling for ROTL/ROTR/BITREVERSE/BSWAP/CTPOP/ABS (PR #184033)   via llvm-commits
• [llvm] [DebugInfo][Reassociate] Use debug records instead of intrinsics in test (PR #185031)   via llvm-commits
• [llvm] [DebugInfo][Reassociate] Use debug records instead of intrinsics in test (PR #185031)   via llvm-commits
• [llvm] [DA] Require 'nsw' for AddRecs in the WeakCrossing SIV test (PR #185041)   via llvm-commits
• [llvm] [SandboxVec][DAG] Fix unscheduled succs when nodes are scheduled (PR #184946)   via llvm-commits
• [llvm] [SandboxVec][DAG] Fix unscheduled succs when nodes are scheduled (PR #184946)   via llvm-commits
• [llvm] [SandboxVec][DAG] Fix unscheduled succs when nodes are scheduled (PR #184946)   via llvm-commits
• [llvm] [SandboxVec][DAG] Fix unscheduled succs when nodes are scheduled (PR #184946)   via llvm-commits
• [llvm] [SandboxVec][DAG] Fix unscheduled succs when nodes are scheduled (PR #184946)   via llvm-commits
• [llvm] [BOLT] Fix test with -DCLANG_DEFAULT_PIE_ON_LINUX=OFF (PR #185047)   via llvm-commits
• [clang] [llvm] [X86] Reduce -ffixed-r compile-time overhead (PR #184606)   via llvm-commits
• [clang] [llvm] [X86] Reduce -ffixed-r compile-time overhead (PR #184606)   via llvm-commits
• [flang] [llvm] [flang][flang-rt] Implement F202X leading-zero control edit descriptors LZ, LZS, and LZP for formatted output (F, E, D, and G editing) (PR #183500)   via llvm-commits
• [llvm] [DAG] isKnownNeverZero - add ISD::SHL DemandedElts handling and tests (PR #183772)   via llvm-commits
• [llvm] [AArch64][llvm] Update Armv9.7-A dependencies (PR #185034)   via llvm-commits
• [llvm] [AArch64][llvm] Update Armv9.7-A dependencies (PR #185034)   via llvm-commits
• [flang] [llvm] [flang][flang-rt] Implement F202X leading-zero control edit descriptors LZ, LZS, and LZP for formatted output (F, E, D, and G editing) (PR #183500)   via llvm-commits
• [llvm] [DAG] isKnownNeverZero - add ISD::SHL DemandedElts handling and tests (PR #183772)   via llvm-commits
• [llvm] 2ce5f91 - [VPlan] Optimize resume values of IVs together with other exit values. (#174239)   via llvm-commits
• [flang] [llvm] [flang][flang-rt] Implement F202X leading-zero control edit descriptors LZ, LZS, and LZP for formatted output (F, E, D, and G editing) (PR #183500)   via llvm-commits
• [llvm] [InstCombine] Modify zero-indexed GEPs in place rather than cloning (PR #185053)   via llvm-commits
• [llvm] [VPlan] Add poisoning value handle for VPValue. (NFCI) (PR #185054)   via llvm-commits
• [llvm] [ARM] Custom lower abdu and abds (PR #182696)   via llvm-commits
• [llvm] [dsymutil] Use DebugMapFilter when parsing --allow/--disallow YAML input (PR #185061)   via llvm-commits
• [llvm] 1bd0759 - [NFC][SPIRV] Rename files from `SPV_INTEL_arbitrary_precision_integers/floating` to `SPV_ALTERA_arbitrary_precision_integers/floating` (#184996)   via llvm-commits
• [llvm] ec9e164 - [DAG] isKnownNeverZero - add ISD::SHL DemandedElts handling and tests (#183772)   via llvm-commits
• [llvm] [DAG] isKnownNeverZero - add ISD::SHL DemandedElts handling and tests (PR #183772)   via llvm-commits
• [llvm] [SCEV] Fix infinite recursion in getZeroExtendExpr via missing Depth propagation (PR #184958)   via llvm-commits
• [llvm] [SCEV] Fix infinite recursion in getZeroExtendExpr via missing Depth propagation (PR #184958)   via llvm-commits
• [llvm] cba914c - [AArch64][llvm] Update Armv9.7-A dependencies (#185034)   via llvm-commits
• [clang] [llvm] [WebAssembly] Support acquire-release atomics in CodeGen (PR #184900)   via llvm-commits
• [llvm] [X86] Remove redundant and-not pattern code in X86 (PR #157687)   via llvm-commits
• [llvm] [AArch64][llvm] Update Armv9.7-A dependencies (PR #185034)   via llvm-commits
• [llvm] bc8da0f - [Hexagon] Support .reloc asm directive (#183849)   via llvm-commits
• [llvm] [WebAssembly] Remove the `wasm-disable-fix-irreducible-control-flow-pass` switch (PR #185072)   via llvm-commits
• [libcxx] [llvm] [XRay] Add bounds check before memcpy in readBinaryFormatHeader (PR #178499)   via llvm-commits
• [llvm] bb1d53b - [RISCV][P-ext] Support vector ISD::ABS using PABD instructions. (#184822)   via llvm-commits
• [llvm] Fold patterns which uses v4i32 type for comparisons on v2i64 type (PR #184328)   via llvm-commits
• [llvm] [VectorCombine] Fixing bitcast processing in VectorCombine (PR #185075)   via llvm-commits
• [llvm] [VectorCombine] Fixing bitcast processing in VectorCombine (PR #185075)   via llvm-commits
• [llvm] [LLVM][CodeGen][SVE] Implement isel for maximumnum/minimumnum. (PR #185074)   via llvm-commits
• [llvm] [VectorCombine] Fixing bitcast processing in VectorCombine (PR #185075)   via llvm-commits
• [libcxx] [llvm] [XRay] Add bounds check before memcpy in readBinaryFormatHeader (PR #178499)   via llvm-commits
• [libcxx] [llvm] [XRay] Add bounds check before memcpy in readBinaryFormatHeader (PR #178499)   via llvm-commits
• [llvm] [X86] Remove redundant and-not pattern code in X86 (PR #157687)   via llvm-commits
• [llvm] Revert "[gn build] Guard the BLAKE3 assembly sources with platform" (PR #185077)   via llvm-commits
• [llvm] 42f3726 - Revert "[gn build] Guard the BLAKE3 assembly sources with platform" (#185077)   via llvm-commits
• [llvm] [BPF] Fix CORE optimization bug in BPFMISimplifyPatchable (PR #183446)   via llvm-commits
• [llvm] [RISCV][P-ext] Custom legalize i64 SHL to WSLL(I)/WSLA(I) (PR #185079)   via llvm-commits
• [llvm] [BPF] Fix CORE optimization bug in BPFMISimplifyPatchable (PR #183446)   via llvm-commits
• [llvm] [SelectionDAG] Optimize 32-bit udiv with 33-bit magic constants on 64-bit targets (PR #181288)   via llvm-commits
• [compiler-rt] 57f1ec6 - builtins: adjust FP80 source management (#183871)   via llvm-commits
• [llvm] [Bazel] Fixes 3da28bf (PR #185082)   via llvm-commits
• [llvm] [Bazel] Fixes 3da28bf (PR #185082)   via llvm-commits
• [clang] [llvm] Add AMO load with Compare and Swap Not Equal (PR #178061)   via llvm-commits
• [llvm] [BPF] Fix CORE optimization bug in BPFMISimplifyPatchable (PR #183446)   via llvm-commits
• [llvm] [RISCV][P-ext] Only support sshlsat for splat immediate shift amounts. (PR #184886)   via llvm-commits
• [llvm] [llubi] Add support for load/store/lifetime markers (PR #182532)   via llvm-commits
• [compiler-rt] [scudo] Use a fixed format for the milliseconds in latest release. (PR #185097)   via llvm-commits
• [llvm] b87cf50 - [WebAssembly] Remove the `wasm-disable-fix-irreducible-control-flow-pass` switch (#185072)   via llvm-commits
• [llvm] [LLVMABI] Create ABI Utils (PR #185105)   via llvm-commits
• [llvm] [LLVMABI] Create ABI Utils (PR #185105)   via llvm-commits
• [llvm] c172000 - [ASan][Windows] Fixing Windows shadow memory address for arm64 (#184902)   via llvm-commits
• [llvm] 2c8c39a - Revert "[llubi] Add support for load/store/lifetime markers" (#185101)   via llvm-commits
• [llvm] [X86] Remove redundant and-not pattern code in X86 (PR #157687)   via llvm-commits
• [llvm] [X86] Remove redundant and-not pattern code in X86 (PR #157687)   via llvm-commits
• [clang] [llvm] Add AMO load with Compare and Swap Not Equal (PR #178061)   via llvm-commits
• [llvm] Simplify demanded (PR #185113)   via llvm-commits
• [llvm] Simplify demanded (PR #185113)   via llvm-commits
• [llvm] [AArch64] fuse constant addition after sbb (PR #185117)   via llvm-commits
• [llvm] ab5844d - [AMDGPU] Disable negative imm offset for async load/store instructions (#185078)   via llvm-commits
• [llvm] dc8de10 - [AMDGPU][SIInsertWaitcnts][NFC] Simplify logic in GFX12Plus::applyPreexistingWaitcnts (#184925)   via llvm-commits
• [llvm] [AMDGPU][SIInsertWaitcnts][NFC] Simplify logic in GFX12Plus::applyPreexistingWaitcnts (PR #184925)   via llvm-commits
• [llvm] apply mulx optimization for two-wide mul instruction (mull, mulq) (PR #185127)   via llvm-commits
• [llvm] [RISCV][P-ext] Custom legalize i64 SHL to WSLL(I)/WSLA(I) (PR #185079)   via llvm-commits
• [llvm] [SimplifyCFG] Allow phi folding for boolean logic over non-equality (PR #185124)   via llvm-commits
• [llvm] [SimplifyCFG] Allow phi folding for boolean logic over non-equality (PR #185124)   via llvm-commits
• [llvm] Allow the nolds modifier (PR #185129)   via llvm-commits
• [llvm] 38b47c0 - [X86] known-never-zero.ll - add ROTL/ROTR/BITREVERSE/BSWAP/CTPOP/ABS test coverage for #184033 (#185128)   via llvm-commits
• [llvm] [SCEV] Fix infinite recursion in getZeroExtendExpr via missing Depth propagation (PR #184958)   via llvm-commits
• [llvm] [NFC] Move fusion- to start of Fusion Feature Name (PR #185146)   via llvm-commits
• [llvm] [NFC] Move fusion- to start of Fusion Feature Name (PR #185146)   via llvm-commits
• [clang] [llvm] [LLVM] Introduce late-resolved LLVM intrinsics and Clang builtins (PR #185147)   via llvm-commits
• [clang] [llvm] [LLVM] Introduce late-resolved LLVM intrinsics and Clang builtins (PR #185147)   via llvm-commits
• [llvm] [SelectionDAG] Remove `NoNaNsFPMath` uses (PR #183448)   via llvm-commits
• [llvm] [NFC] Move fusion- to start of Fusion Feature Name (PR #185146)   via llvm-commits
• [llvm] [SelectionDAG] Remove `NoNaNsFPMath` uses (PR #183448)   via llvm-commits
• [libc] [llvm] [libc][math][c23] Add atanbf16 function (PR #184019)   via llvm-commits
• [libc] [llvm] [libc][math][c23] Add tanbf16 math function (PR #185100)   via llvm-commits
• [clang] [clang-tools-extra] [llvm] [WebAssembly][Sanitizer] WebAssembly Memory Tagging (PR #162972)   via llvm-commits
• [llvm] [DemandedBits] Support non-constant shift amounts for funnel shifts (PR #180569)   via llvm-commits
• [llvm] babead2 - [NFC] Move fusion- to start of Fusion Feature Name (#185146)   via llvm-commits
• [llvm] 40713f2 - [ORC] Refactor WaitingOnGraph::processExternalDeps. NFCI. (#185152)   via llvm-commits
• [llvm] [WebAssembly] Fold extended vector shifts by constant to extmul (PR #184007)   via llvm-commits
• [llvm] [WebAssembly] Fold extended vector shifts by constant to extmul (PR #184007)   via llvm-commits
• [llvm] [WebAssembly] Fold extended vector shifts by constant to extmul (PR #184007)   via llvm-commits
• [libc] [llvm] [libc][math][c23] Add tanbf16 math function (PR #185100)   via llvm-commits
• [llvm] [WebAssembly] Fold extended vector shifts by constant to extmul (PR #184007)   via llvm-commits
• [llvm] [WebAssembly] Lower wide vector shifts to extmul_low/high pairs (PR #184007)   via llvm-commits
• [llvm] [WebAssembly] Lower wide vector shifts to extmul_low/high pairs (PR #184007)   via llvm-commits
• [llvm] [AggressiveInstCombine] Recognize table based log2 and replace with ctlz+sub. (PR #185160)   via llvm-commits
• [llvm] [WebAssembly] Lower wide vector shifts by constant to extmul pairs (PR #184007)   via llvm-commits
• [compiler-rt] d6b33bd - [ubsan_minimal] Build on Solaris (#184976)   via llvm-commits
• [llvm] [WebAssembly] Lower wide vector shifts by constant to extmul pairs (PR #184007)   via llvm-commits
• [clang] [clang-tools-extra] [llvm] [WebAssembly][Sanitizer] WebAssembly Memory Tagging (PR #162972)   via llvm-commits
• [llvm] [LoongArch] Fold conditional branches with constant conditions (PR #185161)   via llvm-commits
• [llvm] [WebAssembly] Lower wide vector shifts by constant to extmul pairs (PR #184007)   via llvm-commits
• [llvm] [WebAssembly] Lower wide vector shifts by constant to extmul pairs (PR #184007)   via llvm-commits
• [llvm] [WebAssembly] Lower wide vector shifts by constant to extmul pairs (PR #184007)   via llvm-commits
• [llvm] [RISCV][CostModel] Fix invalid cost for vector select on targets without FP vector support (PR #183158)   via llvm-commits
• [libc] [llvm] [libc][math][c23] Add tanbf16 math function (PR #185100)   via llvm-commits
• [libc] [llvm] [libc][math][c23] Add tanbf16 math function (PR #185100)   via llvm-commits
• [llvm] [WebAssembly] Lower wide vector shifts by constant to extmul pairs (PR #184007)   via llvm-commits
• [libc] [llvm] [libc][math][c23] Add tanbf16 math function (PR #185100)   via llvm-commits
• [libc] [llvm] [libc][math][c23] Add tanbf16 math function (PR #185100)   via llvm-commits
• [llvm] [LoongArch] Fold conditional branches with constant conditions (PR #185161)   via llvm-commits
• [llvm] [LoongArch] Fold conditional branches with constant conditions (PR #185161)   via llvm-commits
• [llvm] [MC] Rename getPrivateGlobalPrefix to getInternalSymbolPrefix. NFC (PR #185164)   via llvm-commits
• [libc] [llvm] [libc][math][c23] Add tanbf16 math function (PR #185100)   via llvm-commits
• [llvm] [CodeGenPrepare] Failure to hoist bitcast to legal type causes register splitting (PR #183067)   via llvm-commits
• [libc] [llvm] [libc][math][c23] Add tanbf16 math function (PR #185100)   via llvm-commits
• [llvm] 4d08284 - [CMake][LLVM] Align CMAKE_EXPORT_COMPILE_COMMANDS from 1 to ON (#184971)   via llvm-commits
• [llvm] [LoongArch] Fold conditional branches with constant conditions (PR #185161)   via llvm-commits
• [llvm] [LoongArch] Fold conditional branches with constant conditions (PR #185161)   via llvm-commits
• [llvm] [LoongArch] Fold conditional branches with constant conditions (PR #185161)   via llvm-commits
• [llvm] [AArch64] Optimize vector slide shuffles with zeros to use shift instructions (PR #185170)   via llvm-commits
• [llvm] [AArch64] Optimize vector slide shuffles with zeros to use shift instructions (PR #185170)   via llvm-commits
• [llvm] [AArch64] Optimize vector slide shuffles with zeros to use shift instructions (PR #185170)   via llvm-commits
• [llvm] e6fb9ba - [Analysis] isTriviallyVectorizable - add Intrinsic::clmul along with vectorisation tests (#180014)   via llvm-commits
• [llvm] [Analysis] isTriviallyVectorizable - add Intrinsic::clmul along with vectorisation tests (PR #180014)   via llvm-commits
• [llvm] [CodeGenPrepare] Failure to hoist bitcast to legal type causes register splitting (PR #183067)   via llvm-commits
• [llvm] [Support] Document and test ConvertEBCDIC UTF-8 error handling (PR #185176)   via llvm-commits
• [llvm] [Support] Document and test ConvertEBCDIC UTF-8 error handling (PR #185176)   via llvm-commits
• [llvm] c56aad6 - [DAG] isKnownNeverZero: Add DemandedElts handling for ROTL/ROTR/BITREVERSE/BSWAP/CTPOP/ABS (#184033)   via llvm-commits
• [llvm] [x86][GlobalISel] Select MOV32ri64 for unsigned 32-bit i64 constants (PR #185182)   via llvm-commits
• [llvm] [x86][GlobalISel] Select MOV32ri64 for unsigned 32-bit i64 constants (PR #185182)   via llvm-commits
• [llvm] [Analysis] Require explict updates to BFI (PR #185184)   via llvm-commits
• [llvm] [x86][GlobalISel] Select MOV32ri64 for unsigned 32-bit i64 constants (PR #185182)   via llvm-commits
• [llvm] [x86][GlobalISel] Select MOV32ri64 for unsigned 32-bit i64 constants (PR #185182)   via llvm-commits
• [llvm] [AMDGPU] Implement LSR cost model for GFX9+ (PR #184138)   via llvm-commits
• [llvm] [AMDGPU] Implement LSR cost model for GFX9+ (PR #184138)   via llvm-commits
• [llvm] [AMDGPU] Implement LSR cost model for GFX9+ (PR #184138)   via llvm-commits
• [llvm] [ADT] Remove deprecated variadic `StringSwitch::Cases` and `CasesLower` (PR #185191)   via llvm-commits
• [llvm] [ADT] Remove deprecated variadic `StringSwitch::Cases` and `CasesLower` (PR #185191)   via llvm-commits
• [llvm] [SelectionDAG] Use ExpandIntRes_CLMUL to expand vector CLMUL via narrower legal types (PR #184468)   via llvm-commits
• [llvm] [SelectionDAG] Use ExpandIntRes_CLMUL to expand vector CLMUL via narrower legal types (PR #184468)   via llvm-commits
• [llvm] [SelectionDAG] Use ExpandIntRes_CLMUL to expand vector CLMUL via narrower legal types (PR #184468)   via llvm-commits
• [clang] [llvm] [ARM] Add support for Windows SEH (PR #184953)   via llvm-commits
• [llvm] [Object][ELF] Fix section header zero check (PR #181796)   via llvm-commits
• [llvm] [Object][ELF] Fix section header zero check (PR #181796)   via llvm-commits
• [llvm] [Object][ELF] Fix section header zero check (PR #181796)   via llvm-commits
• [llvm] [Object][ELF] Fix section header zero check (PR #181796)   via llvm-commits
• [llvm] fold mov dec/inc to lea +- 1 (PR #185194)   via llvm-commits
• [llvm] [Reland][llubi] Add support for load/store/lifetime markers (PR #185196)   via llvm-commits
• [clang] [llvm] [ARM] Add support for Windows SEH (PR #184953)   via llvm-commits
• [clang] [llvm] [ARM] Add support for Windows SEH (PR #184953)   via llvm-commits
• [llvm] f441746 - [ADT] Remove deprecated variadic `StringSwitch::Cases` and `CasesLower` (#185191)   via llvm-commits
• [llvm] [X86] combineVTRUNCSAT - attempt to recognise VTRUNCS/US(CONCAT(X,Y)) -> PACKSS/US(X,Y) folds. (PR #178707)   via llvm-commits
• [llvm] [AArch64] fuse constant addition after sbb (PR #185117)   via llvm-commits
• [llvm] [AArch64] fuse constant addition after sbb (PR #185117)   via llvm-commits
• [llvm] fold mov dec/inc to lea +- 1 (PR #185194)   via llvm-commits
• [llvm] fold mov dec/inc to lea +- 1 (PR #185194)   via llvm-commits
• [llvm] 30434ba - [Reland][llubi] Add support for load/store/lifetime markers (#185196)   via llvm-commits
• [llvm] lock opt ptr const inconsistencies x86 only (PR #185195)   via llvm-commits
• [llvm] [DAG] isKnownToBeAPowerOfTwo - add ISD::VECTOR_SHUFFLE handling (PR #185203)   via llvm-commits
• [llvm] [DAG] isKnownToBeAPowerOfTwo - add ISD::VECTOR_SHUFFLE handling (PR #185203)   via llvm-commits
• [llvm] [DAG] isKnownToBeAPowerOfTwo - add ISD::VECTOR_SHUFFLE handling (PR #185203)   via llvm-commits
• [compiler-rt] [compiler-rt] Use static buffers in setvbuf/setbuf/setbuffer tests (PR #185204)   via llvm-commits
• [compiler-rt] [compiler-rt] Use static buffers in setvbuf/setbuf/setbuffer tests (PR #185204)   via llvm-commits
• [llvm] [AArch64][SelectionDAG] Fold setm with eor even if it is fcmp (PR #184445)   via llvm-commits
• [llvm] [X86] Remove redundant and-not pattern code in X86 (PR #157687)   via llvm-commits
• [llvm] [X86] Remove redundant and-not pattern code in X86 (PR #157687)   via llvm-commits
• [compiler-rt] [llvm] [polly] [NFC] Fix spelling mistakes in comments 'compatiable' to 'compatible' (PR #185213)   via llvm-commits
• [compiler-rt] [llvm] [polly] [NFC] Fix spelling mistakes in comments 'compatiable' to 'compatible' (PR #185213)   via llvm-commits
• [compiler-rt] [llvm] [polly] [NFC] Fix spelling mistakes in comments 'compatiable' to 'compatible' (PR #185213)   via llvm-commits
• [llvm] c6805ab - [X86] narrow-shl-load.ll - regenerate test checks (#185211)   via llvm-commits
• [compiler-rt] [llvm] [polly] [NFC] Fix spelling mistakes in comments 'compatiable' to 'compatible' (PR #185213)   via llvm-commits
• [llvm] [PowerPC] Custom Lower ABDU using branchless carry (PR #182704)   via llvm-commits
• [clang] [clang-tools-extra] [llvm] [WebAssembly][Sanitizer] WebAssembly Memory Tagging (PR #162972)   via llvm-commits
• [compiler-rt] [llvm] [polly] [NFC] Fix spelling mistakes in comments 'compatiable' to 'compatible' (PR #185213)   via llvm-commits
• [compiler-rt] [llvm] [polly] [NFC] Fix spelling mistakes in comments 'compatiable' to 'compatible' (PR #185213)   via llvm-commits
• [llvm] [Bazel] Fixes 58efc42 (PR #185223)   via llvm-commits
• [llvm] [Bazel] Fixes 58efc42 (PR #185223)   via llvm-commits
• [llvm] [LoopIdiomVectorize] Preserve address space in FindFirstByte (PR #185226)   via llvm-commits
• [llvm] [LoopIdiomVectorize] Preserve address space in FindFirstByte (PR #185226)   via llvm-commits
• [llvm] [DebugInfo] Add Verifier check for local enums in CU's enums field (PR #185228)   via llvm-commits
• [llvm] [SLP] Fix misvectorization in commutative to non-commutative conversion (PR #185230)   via llvm-commits
• [llvm] [SLP] Fix misvectorization in commutative to non-commutative conversion (PR #185230)   via llvm-commits
• [llvm] [SLP] Fix misvectorization in commutative to non-commutative conversion (PR #185230)   via llvm-commits
• [llvm] [SLP] Fix misvectorization in commutative to non-commutative conversion (PR #185230)   via llvm-commits
• [llvm] [NFC] Fix spelling mistakes in comment replacing word anaylsis with analysis (PR #185233)   via llvm-commits
• [llvm] [NFC] Fix spelling mistakes in comment replacing word anaylsis with analysis (PR #185233)   via llvm-commits
• [llvm] [NFC] Fix spelling mistakes in emitted string replacing word anaylsis with analysis (PR #185233)   via llvm-commits
• [llvm] [SelectionDAG] Second SimplifyDemandedBits pass for AND RHS using LHS known zeros (scalar only) (PR #185235)   via llvm-commits
• [llvm] [SelectionDAG] Second SimplifyDemandedBits pass for AND RHS using LHS known zeros (scalar only) (PR #185235)   via llvm-commits
• [llvm] [SelectionDAG] Second SimplifyDemandedBits pass for AND RHS using LHS known zeros (scalar only) (PR #185235)   via llvm-commits
• [llvm] [SelectionDAG] Second SimplifyDemandedBits pass for AND RHS using LHS known zeros (scalar only) (PR #185235)   via llvm-commits
• [llvm] [SelectionDAG] Second SimplifyDemandedBits pass for AND RHS using LHS known zeros (scalar only) (PR #185235)   via llvm-commits
• [llvm] [X86] Remove redundant and-not pattern code in X86 (PR #157687)   via llvm-commits
• [llvm] [ConstantTime][LLVM] Add llvm.ct.select intrinsic with generic SelectionDAG lowering (PR #166702)   via llvm-commits
• [llvm] [SelectionDAG] Second SimplifyDemandedBits pass for AND RHS using LHS known zeros (scalar only) (PR #185235)   via llvm-commits
• [llvm] [SelectionDAG] Second SimplifyDemandedBits pass for AND RHS using LHS known zeros (scalar only) (PR #185235)   via llvm-commits
• [llvm] [SelectionDAG] Second SimplifyDemandedBits pass for AND RHS using LHS known zeros (scalar only) (PR #185235)   via llvm-commits
• [llvm] fold mov dec/inc to lea +- 1 (PR #185194)   via llvm-commits
• [llvm] [SelectionDAG] Second SimplifyDemandedBits pass for AND RHS using LHS known zeros (scalar only) (PR #185235)   via llvm-commits
• [llvm] [SelectionDAG] Second SimplifyDemandedBits pass for AND RHS using LHS known zeros (scalar only) (PR #185235)   via llvm-commits
• [llvm] [SelectionDAG] Second SimplifyDemandedBits pass for AND RHS using LHS known zeros (scalar only) (PR #185235)   via llvm-commits
• [llvm] [NFC] Fix spelling mistakes in emitted string replacing word anaylsis with analysis (PR #185233)   via llvm-commits
• [llvm] [SelectionDAG] Second SimplifyDemandedBits pass for AND RHS using LHS known zeros (scalar only) (PR #185235)   via llvm-commits
• [llvm] [InferAS][NFC] Improve documentation for getAddrSpaceCastPreservedPtrMask (PR #185239)   via llvm-commits
• [llvm] [VPlan][PseudoProbe] Fix `pseudoprobe` duplication when `VF=1` (PR #185238)   via llvm-commits
• [llvm] b883091 - [ORC] Further simplify ContainerElementsMap::hoistDeps. NFCI. (#185242)   via llvm-commits
• [llvm] 0cad9b7 - [llvm] Prefer the unknown vendor for SerenityOS triples (#185026)   via llvm-commits
• [clang] [llvm] [ARM] Add support for Windows SEH (PR #184953)   via llvm-commits
• [llvm] [X86] Fix wrong RIP-relative relocations for AVX10.2 saturation conversions (PR #185254)   via llvm-commits
• [llvm] [NewPM] Add port for aarch64-simd-scalar (PR #185256)   via llvm-commits
• [compiler-rt] compiler-rt/arm: Check for overflow when adding float denorms (PR #185245)   via llvm-commits
• [llvm] [CI] Try lowering max parallel link jobs on Windows (PR #185255)   via llvm-commits
• [llvm] [InstCombine] Fold extended add/sub of the same type (PR #185259)   via llvm-commits
• [llvm] [InstCombine] Fold extended add/sub of the same type (PR #185259)   via llvm-commits
• [llvm] [InstCombine] Fold extended add/sub of the same type (PR #185259)   via llvm-commits
• [llvm] [InstCombine] Fold extended add/sub of the same type (PR #185259)   via llvm-commits
• [llvm] [InstCombine] Fold extended add/sub of the same type (PR #185259)   via llvm-commits
• [llvm] [AArch64] Optimize vector slide shuffles with zeros to use shift instructions (PR #185170)   via llvm-commits
• [llvm] [AArch64] Optimize vector slide shuffles with zeros to use shift instructions (PR #185170)   via llvm-commits
• [llvm] [Coroutines] fix coroutines + std::unique_ptr with async exceptions validation errors (PR #149691)   via llvm-commits
• [llvm] 327f1ad - [AArch64] Ensure FPR128 callee-save stack offsets are aligned (#184314)   via llvm-commits
• [llvm] 4c31b6f - Fix comment in FPR128 test (NFC)   via llvm-commits
• [llvm] [InstCombine] Fold extended add/sub of the same type (PR #185259)   via llvm-commits
• [clang] [llvm] [ARM] Add support for Windows SEH (PR #184953)   via llvm-commits
• [llvm] 2bf2115 - [DAG] isKnownToBeAPowerOfTwo - add ISD::VECTOR_SHUFFLE handling (#185203)   via llvm-commits
• [llvm] [AArch64] Adding FeatureFuseFCmpFCSel (PR #184881)   via llvm-commits
• [llvm] 82ef7e5 - [X86] combineVTRUNCSAT - attempt to recognise VTRUNCS/US(CONCAT(X,Y)) -> PACKSS/US(X,Y) folds. (#178707)   via llvm-commits
• [llvm] e0e5000 - [SLP]Remove Alternate early profitability checks in favor of throttling   via llvm-commits
• [llvm] [X86] Remove redundant and-not pattern code in X86 (PR #157687)   via llvm-commits
• [compiler-rt] Fix 16-byte alignment for vec allocators on AIX (PR #184967)   via llvm-commits
• [llvm] [InstCombine] Fold extended add/sub of the same type (PR #185259)   via llvm-commits
• [llvm] [ORC] Add WaitingOnGraph record / replay facility and test tool. (PR #185275)   via llvm-commits
• [llvm] 95919ec - [SLP]Allow bitcast/bswap based reductions for types, larger than the total strided size   via llvm-commits
• [llvm] [Bazel] Fixes af7c352 (PR #185286)   via llvm-commits
• [llvm] [Bazel] Fixes af7c352 (PR #185286)   via llvm-commits
• [llvm] [mlir] [MLIR] [Bazel] Removed the stubgen plumbing added in #179211 (PR #185292)   via llvm-commits
• [llvm] [InstCombine] Fold extended add/sub of the same type (PR #185259)   via llvm-commits
• [llvm] [InstCombine] Fold extended add/sub of the same type (PR #185259)   via llvm-commits
• [llvm] [InstCombine] Fold extended add/sub of the same type (PR #185259)   via llvm-commits
• [clang] [llvm] [ARM] Add support for Windows SEH (PR #184953)   via llvm-commits
• [llvm] [SelectionDAG] Second SimplifyDemandedBits pass for AND RHS using LHS known zeros (scalar only) (PR #185235)   via llvm-commits
• [llvm] [SelectionDAG] Second SimplifyDemandedBits pass for AND RHS using LHS known zeros (scalar only) (PR #185235)   via llvm-commits
• [llvm] [ValueTracking] Prove single-index inbounds GEP into known-size alloc… (PR #185301)   via llvm-commits
• [llvm] [ValueTracking] Prove single-index inbounds GEP into known-size alloc… (PR #185301)   via llvm-commits
• [llvm] [SelectionDAG] Use ExpandIntRes_CLMUL to expand vector CLMUL via narrower legal types (PR #184468)   via llvm-commits
• [llvm] [SelectionDAG] Second SimplifyDemandedBits pass for AND RHS using LHS known zeros (scalar only) (PR #185235)   via llvm-commits
• [llvm] 6b29068 - [X86] setcc-logic.ll - add i128 cmpeq(or(X, Y), X) --> cmpeq(and(~X,Y),0) test (#185289)   via llvm-commits
• [llvm] [SelectionDAG] Second SimplifyDemandedBits pass for AND RHS using LHS known zeros (scalar only) (PR #185235)   via llvm-commits
• [llvm] [InstCombine] Fold extended add/sub of the same type (PR #185259)   via llvm-commits
• [llvm] [InstCombine] Fold extended add/sub of the same type (PR #185259)   via llvm-commits
• [clang] [llvm] [hlsl][dxil][spirv] Add `fma` intrinsic (PR #185304)   via llvm-commits
• [clang] [llvm] [hlsl][dxil][spirv] Add `fma` intrinsic (PR #185304)   via llvm-commits
• [clang] [llvm] [hlsl][dxil][spirv] Add `fma` intrinsic (PR #185304)   via llvm-commits
• [clang] [llvm] [hlsl][dxil][spirv] Add `fma` intrinsic (PR #185304)   via llvm-commits
• [llvm] [LV] Move predication, early exit & region handling to VPlan0 (NFCI) (PR #185305)   via llvm-commits
• [llvm] [LV] Move predication, early exit & region handling to VPlan0 (NFCI) (PR #185305)   via llvm-commits
• [llvm] [SelectionDAG] Second SimplifyDemandedBits pass for AND RHS using LHS known zeros (scalar only) (PR #185235)   via llvm-commits
• [llvm] [X86] Remove redundant and-not pattern code in X86 (PR #157687)   via llvm-commits
• [llvm] Add support arbitary precision new (PR #185306)   via llvm-commits
• [clang] [llvm] [hlsl][dxil][spirv] Add `fma` intrinsic (PR #185304)   via llvm-commits
• [llvm] [SPIR-V] Add support for arbitrary precision integer constants in instruction printer (PR #185306)   via llvm-commits
• [llvm] [SPIR-V] Add support for arbitrary precision integer constants in instruction printer (PR #185306)   via llvm-commits
• [llvm] [SPIR-V] Add support for arbitrary precision integer constants in instruction printer (PR #185306)   via llvm-commits
• [llvm] [X86] Remove redundant and-not pattern code in X86 (PR #157687)   via llvm-commits
• [llvm] [SPIR-V] Add support for arbitrary precision integer constants in instruction printer (PR #185306)   via llvm-commits
• [llvm] [SPIR-V] Add support for arbitrary precision integer constants in instruction printer (PR #185306)   via llvm-commits
• [clang] [llvm] [hlsl][dxil][spirv] Add `fma` function (PR #185304)   via llvm-commits
• [llvm] [SPIR-V] Add support for arbitrary precision integer constants in instruction printer (PR #185306)   via llvm-commits
• [llvm] [SPIR-V] Add support for arbitrary precision integer constants in instruction printer (PR #185306)   via llvm-commits
• [llvm] [SPIR-V] Add support for arbitrary precision integer constants in instruction printer (PR #185306)   via llvm-commits
• [clang] [llvm] [hlsl][dxil][spirv] Add `fma` function (PR #185304)   via llvm-commits
• [clang] [llvm] [hlsl][dxil][spirv] Add `fma` function (PR #185304)   via llvm-commits
• [llvm] [X86] Remove redundant and-not pattern code in X86 (PR #157687)   via llvm-commits
• [llvm] [SelectionDAG] Second SimplifyDemandedBits pass for AND RHS using LHS known zeros (scalar only) (PR #185235)   via llvm-commits
• [llvm] [X86] Remove redundant and-not pattern code in X86 (PR #157687)   via llvm-commits
• [llvm] aca4a8f - [AMDGPU] Add missing -wwm-regalloc=fast to 4 more tests (NFC) (#184966)   via llvm-commits
• [llvm] [SPIR-V] Add support for arbitrary precision integer constants in instruction printer (PR #185306)   via llvm-commits
• [llvm] [SPIR-V] Add support for arbitrary precision integer constants in instruction printer (PR #185306)   via llvm-commits
• [llvm] [SPIR-V] Add support for arbitrary precision integer constants in instruction printer (PR #185306)   via llvm-commits
• [llvm] [SPIRV] Add support for arbitrary-precision integers larger than 64 bits in SPIR-V backend (PR #161270)   via llvm-commits
• [llvm] [SPIR-V] Add support for arbitrary precision integer constants in instruction printer (PR #185306)   via llvm-commits
• [clang] [llvm] [hlsl][dxil][spirv] Add `fma` function (PR #185304)   via llvm-commits
• [llvm] f7ab364 - [ARM] Add basic NPM support for LoadStoreOptimizer (#184139)   via llvm-commits
• [llvm] [InstCombine] Handle fixed-width results in get_active_lane_mask fold (PR #185317)   via llvm-commits
• [llvm] [InstCombine] Handle fixed-width results in get_active_lane_mask fold (PR #185317)   via llvm-commits
• [llvm] [SLP]Improve analysis of copyables operands for commmutative main instruction (PR #185320)   via llvm-commits
• [llvm] [LV] Move dereferenceability check from Legal to VPlan (NFC) (PR #185323)   via llvm-commits
• [llvm] [LV] Move dereferenceability check from Legal to VPlan (NFC) (PR #185323)   via llvm-commits
• [llvm] [LV] Move dereferenceability check from Legal to VPlan (NFC) (PR #185323)   via llvm-commits
• [llvm] [LV] Move dereferenceability check from Legal to VPlan (NFC) (PR #185323)   via llvm-commits
• [llvm] fac1866 - [X86] Remove redundant and-not pattern code in X86 (#157687)   via llvm-commits
• [llvm] [SelectionDAG] Second SimplifyDemandedBits pass for AND RHS using LHS known zeros (scalar only) (PR #185235)   via llvm-commits
• [flang] [llvm] [mlir] [mlir][llvmir][OpenMP] Translate affinity clause in task construct to llvmir (PR #182223)   via llvm-commits
• [llvm] [SelectionDAG] Second SimplifyDemandedBits pass for AND RHS using LHS known zeros (scalar only) (PR #185235)   via llvm-commits
• [llvm] [SelectionDAG] Remove `NoNaNsFPMath` uses (PR #183448)   via llvm-commits
• [llvm] Fixing upper lane return source for X86 intrinsics (PR #185329)   via llvm-commits
• [llvm] Compute GUIDs once and store in metadata (PR #184065)   via llvm-commits
• [llvm] Compute GUIDs once and store in metadata (PR #184065)   via llvm-commits
• [flang] [llvm] [Flang][OpenMP] Fix close map flag propagation for derived types in USM (PR #185330)   via llvm-commits
• [llvm] [mlir] [mlir][llvmir][OpenMP] Translate affinity clause in task construct to llvmir (PR #182223)   via llvm-commits
• [llvm] Fixing upper lane return source for X86 intrinsics (PR #185329)   via llvm-commits
• [llvm] [NFC][AMDGPU] Add debug print to `AMDGPULowerVGPREncoding.cpp` (PR #185331)   via llvm-commits
• [llvm] [NVPTX][NFC] Fix TODO comment style in NVPTXMCAsmInfo.cpp (PR #185332)   via llvm-commits
• [llvm] [NVPTX][NFC] Fix TODO comment style in NVPTXMCAsmInfo.cpp (PR #185332)   via llvm-commits
• [clang] [llvm] [mlir] declare simd lowering backup (PR #185333)   via llvm-commits
• [clang] [llvm] [mlir] declare simd lowering backup (PR #185333)   via llvm-commits
• [clang] [llvm] [mlir] declare simd lowering backup (PR #185333)   via llvm-commits
• [clang] [llvm] [mlir] declare simd lowering backup (PR #185333)   via llvm-commits
• [llvm] [SelectionDAG] Remove `NoNaNsFPMath` uses (PR #183448)   via llvm-commits
• [llvm] [AMDGPU] Add folding ISD::SELECT from vXiY into vZi32 with X * Y = Z * 32 (PR #173328)   via llvm-commits
• [llvm] [AMDGPU] Generate waterfall for calls with SGPR(inreg) argument (PR #146997)   via llvm-commits
• [llvm] 1901886 - [RISCV] Update Andes45 vector mask scheduling info (#184719)   via llvm-commits
• [llvm] [SelectionDAG] Remove `NoNaNsFPMath` uses (PR #183448)   via llvm-commits
• [llvm] [SelectionDAG] Remove `NoNaNsFPMath` uses (PR #183448)   via llvm-commits
• [llvm] [SelectionDAG] Remove `NoNaNsFPMath` uses (PR #183448)   via llvm-commits
• [llvm] [SelectionDAG] Remove `NoNaNsFPMath` uses (PR #183448)   via llvm-commits
• [clang] [llvm] [X86] Reduce -ffixed-r compile-time overhead (PR #184606)   via llvm-commits
• [lld] [RISCV][LLD] Zcmt RISC-V extension in lld (PR #183450)   via llvm-commits
• [clang] [llvm] [RFC][Coroutines] Implement HALO for coroutines that flow off final suspend (PR #185336)   via llvm-commits
• [clang] [llvm] [RFC][Coroutines] Implement HALO for coroutines that flow off final suspend (PR #185336)   via llvm-commits
• [llvm] d8474ab - [X86] Reduce -ffixed-r compile-time overhead (#184606)   via llvm-commits
• [llvm] [CoroCleanup] Fix stale unwind predecessor when erase noop coro (PR #185337)   via llvm-commits
• [llvm] [RISCV] Add register group overlap checks to the assembler for vector indexed segment load (PR #184963)   via llvm-commits
• [llvm] 1e28b7e - [CoroCleanup] Fix stale unwind predecessor when erase noop coro (#185337)   via llvm-commits
• [llvm] [LoopReduceMotion] Improve loop by extract reduction instruction (PR #179215)   via llvm-commits
• [llvm] 1d6607d - [AMDGPU] Remove alignment constraint from spill pseudos (#177317)   via llvm-commits
• [llvm] [AMDGPU] Remove alignment constraint from spill pseudos (PR #177317)   via llvm-commits
• [llvm] [AMDGPU] Multi dword spilling for unaligned tuples (PR #183701)   via llvm-commits
• [llvm] [AMDGPU] Multi dword spilling for unaligned tuples (PR #183701)   via llvm-commits
• [llvm] [AMDGPU] Multi dword spilling for unaligned tuples (PR #183701)   via llvm-commits
• [llvm] [AMDGPU] Multi dword spilling for unaligned tuples (PR #183701)   via llvm-commits
• [llvm] [AMDGPU] Multi dword spilling for unaligned tuples (PR #183701)   via llvm-commits
• [llvm] [VPlan] Fix `pseudoprobe` being treated a vector intrinsic (PR #185347)   via llvm-commits
• [llvm] [VPlan] Fix `pseudoprobe` being treated a vector intrinsic (PR #185347)   via llvm-commits
• [llvm] faa1ccc - [RISCV][llvm] Use [u]int32 vector for input arguments for zvdot4a8i (#184089)   via llvm-commits
• [llvm] 8b0a9d0 - [X86] Fix wrong RIP-relative relocations for AVX10.2 saturation conversions (#185254)   via llvm-commits
• [llvm] 04dbbd4 - [Support] Move HTTP client/server to new LLVMSupportHTTP lib (NFC) (#184572)   via llvm-commits
• [lld] [llvm] [RISCV] Teach RISCVMergeBaseOffset to merge %lo into load/store folding arithmetic (PR #185353)   via llvm-commits
• [lld] [llvm] [RISCV] Teach RISCVMergeBaseOffset to merge %lo into load/store folding arithmetic (PR #185353)   via llvm-commits
• [llvm] Add a flag to disable salvage-unused-profile for large modules. (PR #185354)   via llvm-commits
• [llvm] [AMDGPU] Multi dword spilling for unaligned tuples (PR #183701)   via llvm-commits
• [llvm] Add a flag to disable salvage-unused-profile for large modules. (PR #185354)   via llvm-commits
• [llvm] 5b60283 - [RISCV][TTI] Implement cost of llvm.experimental.vector.extract.last.active (#184067)   via llvm-commits
• [llvm] [InstCombine] Fold extended add/sub of the same type (PR #185259)   via llvm-commits
• [llvm] [NFC] Refactor the SelectionDAG::getMemcmp etc with a existing helper function getRuntimeCallSDValueHelper (PR #184200)   zhijian lin via llvm-commits
• [llvm] [NFC] Refactor the SelectionDAG::getMemcmp etc with a existing helper function getRuntimeCallSDValueHelper (PR #184200)   zhijian lin via llvm-commits
• [llvm] [NFC] Refactor the SelectionDAG::getMemcmp etc with a existing helper function getRuntimeCallSDValueHelper (PR #184200)   zhijian lin via llvm-commits
• [llvm] [NFC] Refactor the SelectionDAG::getMemcmp etc with a existing helper function getRuntimeCallSDValueHelper (PR #184200)   zhijian lin via llvm-commits
• [llvm] [PowerPC] fix Inefficient std::bit_floor(x) (PR #183361)   zhijian lin via llvm-commits
• [llvm] [NFC] Refactor the SelectionDAG::getMemcmp etc with a existing helper function getRuntimeCallSDValueHelper (PR #184200)   zhijian lin via llvm-commits
• [llvm] [PowerPC] fix Inefficient std::bit_floor(x) (PR #183361)   zhijian lin via llvm-commits
• [llvm] [PowerPC] fix Inefficient std::bit_floor(x) (PR #183361)   zhijian lin via llvm-commits
• [llvm] [PowerPC] fix Inefficient std::bit_floor(x) (PR #183361)   zhijian lin via llvm-commits
• [llvm] [PowerPC] cherry-pick the using milicode call for strstr instead of lib call (PR #176002)   zhijian lin via llvm-commits