[llvm] c6805ab - [X86] narrow-shl-load.ll - regenerate test checks (#185211)

[via llvm-commits]

Author: Simon Pilgrim
Date: 2026-03-07T18:16:00Z
New Revision: c6805abf77117ebe51920010fd1838f835d8536f

URL: https://github.com/llvm/llvm-project/commit/c6805abf77117ebe51920010fd1838f835d8536f
DIFF: https://github.com/llvm/llvm-project/commit/c6805abf77117ebe51920010fd1838f835d8536f.diff

LOG: [X86] narrow-shl-load.ll - regenerate test checks (#185211)

Added: 
    

Modified: 
    llvm/test/CodeGen/X86/narrow-shl-load.ll

Removed: 
    


################################################################################
diff  --git a/llvm/test/CodeGen/X86/narrow-shl-load.ll b/llvm/test/CodeGen/X86/narrow-shl-load.ll
index bb9d3914e4f10..b1aa546e3f608 100644
--- a/llvm/test/CodeGen/X86/narrow-shl-load.ll
+++ b/llvm/test/CodeGen/X86/narrow-shl-load.ll
@@ -1,3 +1,4 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 6
 ; RUN: llc < %s | FileCheck %s
 
 target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64"
@@ -7,6 +8,12 @@ target triple = "x86_64-pc-linux-gnu"
 ; rdar://8606584
 
 define void @test1() nounwind readnone {
+; CHECK-LABEL: test1:
+; CHECK:       # %bb.0: # %bb.nph
+; CHECK-NEXT:    .p2align 4
+; CHECK-NEXT:  .LBB0_1: # %while.cond
+; CHECK-NEXT:    # =>This Inner Loop Header: Depth=1
+; CHECK-NEXT:    jmp .LBB0_1
 bb.nph:
   br label %while.cond
 
@@ -33,6 +40,12 @@ while.end:                                        ; preds = %while.cond
 ; DAG Combiner can't fold this into a load of the 1'th byte.
 ; PR8757
 define i32 @test3(ptr%P) nounwind ssp {
+; CHECK-LABEL: test3:
+; CHECK:       # %bb.0:
+; CHECK-NEXT:    movl $128, (%rdi)
+; CHECK-NEXT:    movsbl (%rdi), %eax
+; CHECK-NEXT:    movzbl %ah, %eax
+; CHECK-NEXT:    retq
   store volatile i32 128, ptr %P
   %tmp4.pre = load i32, ptr %P
   %phitmp = trunc i32 %tmp4.pre to i16
@@ -41,9 +54,4 @@ define i32 @test3(ptr%P) nounwind ssp {
   %phitmp15 = lshr i16 %phitmp14, 8
   %phitmp16 = zext i16 %phitmp15 to i32
   ret i32 %phitmp16
-  
-; CHECK: movl	$128, (%rdi)
-; CHECK-NEXT: movsbl	(%rdi), %eax
-; CHECK-NEXT: movzbl	%ah, %eax
-; CHECK-NEXT: ret
 }