[llvm] [RISCV][CostModel] Fix invalid cost for vector select on targets without FP vector support (PR #183158)

[via llvm-commits]

https://github.com/tudinhh updated https://github.com/llvm/llvm-project/pull/183158

>From 67ceb8e998fa12718e09931abf1abc645d1b3f3c Mon Sep 17 00:00:00 2001
From: tudinhh <anhtu.dinh1202 at gmail.com>
Date: Wed, 25 Feb 2026 19:49:30 +0100
Subject: [PATCH] [RISCV] Fix invalid cost for vector select on targets without
 FP vector support

---
 .../Target/RISCV/RISCVTargetTransformInfo.cpp | 10 ++++
 .../CostModel/RISCV/select-fp-zve32x.ll       | 57 +++++++++++++++++++
 2 files changed, 67 insertions(+)
 create mode 100644 llvm/test/Analysis/CostModel/RISCV/select-fp-zve32x.ll

diff --git a/llvm/lib/Target/RISCV/RISCVTargetTransformInfo.cpp b/llvm/lib/Target/RISCV/RISCVTargetTransformInfo.cpp
index a40d77dd734c8..40e3d9cddd112 100644
--- a/llvm/lib/Target/RISCV/RISCVTargetTransformInfo.cpp
+++ b/llvm/lib/Target/RISCV/RISCVTargetTransformInfo.cpp
@@ -2303,6 +2303,16 @@ InstructionCost RISCVTTIImpl::getCmpSelInstrCost(
 
   std::pair<InstructionCost, MVT> LT = getTypeLegalizationCost(ValTy);
   if (Opcode == Instruction::Select && ValTy->isVectorTy()) {
+    // If the target lacks native support for the floating-point vector type,
+    // fall back to BaseT model. This calculates a scalarized cost for fixed
+    // vectors, and correctly returns an Invalid cost for scalable vectors.
+    if (ValTy->isVectorTy() && ValTy->getScalarType()->isFloatingPointTy() &&
+        ((ValTy->getScalarSizeInBits() == 16 && !ST->hasVInstructionsF16()) ||
+         (ValTy->getScalarSizeInBits() == 32 && !ST->hasVInstructionsF32()) ||
+         (ValTy->getScalarSizeInBits() == 64 && !ST->hasVInstructionsF64()))) {
+      return BaseT::getCmpSelInstrCost(Opcode, ValTy, CondTy, VecPred, CostKind,
+                                       Op1Info, Op2Info, I);
+    }
     if (CondTy->isVectorTy()) {
       if (ValTy->getScalarSizeInBits() == 1) {
         // vmandn.mm v8, v8, v9
diff --git a/llvm/test/Analysis/CostModel/RISCV/select-fp-zve32x.ll b/llvm/test/Analysis/CostModel/RISCV/select-fp-zve32x.ll
new file mode 100644
index 0000000000000..98333a50d3ad7
--- /dev/null
+++ b/llvm/test/Analysis/CostModel/RISCV/select-fp-zve32x.ll
@@ -0,0 +1,57 @@
+; NOTE: Assertions have been autogenerated by utils/update_analyze_test_checks.py UTC_ARGS: --version 6
+; RUN: opt -passes="print<cost-model>" 2>&1 -disable-output -mtriple=riscv32 -mattr=+zve32x,+zvl64b < %s | FileCheck %s
+
+define void @test_v2f32(<2 x i1> %c, <2 x float> %t, <2 x float> %f) {
+; CHECK-LABEL: 'test_v2f32'
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %sel = select <2 x i1> %c, <2 x float> %t, <2 x float> %f
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 0 for instruction: ret void
+;
+  %sel = select <2 x i1> %c, <2 x float> %t, <2 x float> %f
+  ret void
+}
+
+define void @test_v4f32(<4 x i1> %c, <4 x float> %t, <4 x float> %f) {
+; CHECK-LABEL: 'test_v4f32'
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 4 for instruction: %sel = select <4 x i1> %c, <4 x float> %t, <4 x float> %f
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 0 for instruction: ret void
+;
+  %sel = select <4 x i1> %c, <4 x float> %t, <4 x float> %f
+  ret void
+}
+
+define void @test_nxv2f32(<vscale x 2 x i1> %c, <vscale x 2 x float> %t, <vscale x 2 x float> %f) {
+; CHECK-LABEL: 'test_nxv2f32'
+; CHECK-NEXT:  Cost Model: Invalid cost for instruction: %sel = select <vscale x 2 x i1> %c, <vscale x 2 x float> %t, <vscale x 2 x float> %f
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 0 for instruction: ret void
+;
+  %sel = select <vscale x 2 x i1> %c, <vscale x 2 x float> %t, <vscale x 2 x float> %f
+  ret void
+}
+
+define void @test_nxv4f32(<vscale x 4 x i1> %c, <vscale x 4 x float> %t, <vscale x 4 x float> %f) {
+; CHECK-LABEL: 'test_nxv4f32'
+; CHECK-NEXT:  Cost Model: Invalid cost for instruction: %sel = select <vscale x 4 x i1> %c, <vscale x 4 x float> %t, <vscale x 4 x float> %f
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 0 for instruction: ret void
+;
+  %sel = select <vscale x 4 x i1> %c, <vscale x 4 x float> %t, <vscale x 4 x float> %f
+  ret void
+}
+
+define void @test_v4bf16(<4 x i1> %c, <4 x bfloat> %t, <4 x bfloat> %f) {
+; CHECK-LABEL: 'test_v4bf16'
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 4 for instruction: %sel = select <4 x i1> %c, <4 x bfloat> %t, <4 x bfloat> %f
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 0 for instruction: ret void
+;
+  %sel = select <4 x i1> %c, <4 x bfloat> %t, <4 x bfloat> %f
+  ret void
+}
+
+define void @test_nxv4bf16(<vscale x 4 x i1> %c, <vscale x 4 x bfloat> %t, <vscale x 4 x bfloat> %f) {
+; CHECK-LABEL: 'test_nxv4bf16'
+; CHECK-NEXT:  Cost Model: Invalid cost for instruction: %sel = select <vscale x 4 x i1> %c, <vscale x 4 x bfloat> %t, <vscale x 4 x bfloat> %f
+; CHECK-NEXT:  Cost Model: Found an estimated cost of 0 for instruction: ret void
+;
+  %sel = select <vscale x 4 x i1> %c, <vscale x 4 x bfloat> %t, <vscale x 4 x bfloat> %f
+  ret void
+}
+